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| author | David Woodhouse <David.Woodhouse@intel.com> | 2009-01-05 10:50:33 +0100 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-01-05 10:50:33 +0100 |
| commit | 353816f43d1fb340ff2d9a911dd5d0799c09f6a5 (patch) | |
| tree | 517290fd884d286fe2971137ac89f89e3567785a /drivers/net/e1000e/defines.h | |
| parent | 160bbab3000dafccbe43688e48208cecf4deb879 (diff) | |
| parent | fe0bdec68b77020281dc814805edfe594ae89e0f (diff) | |
| download | kernel-crypto-353816f43d1fb340ff2d9a911dd5d0799c09f6a5.tar.gz kernel-crypto-353816f43d1fb340ff2d9a911dd5d0799c09f6a5.tar.xz kernel-crypto-353816f43d1fb340ff2d9a911dd5d0799c09f6a5.zip | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
arch/arm/mach-pxa/corgi.c
arch/arm/mach-pxa/poodle.c
arch/arm/mach-pxa/spitz.c
Diffstat (limited to 'drivers/net/e1000e/defines.h')
| -rw-r--r-- | drivers/net/e1000e/defines.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index 48f79ecb82a..e6caf29d425 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h @@ -372,6 +372,13 @@ #define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */ #define E1000_ICR_OTHER 0x01000000 /* Other Interrupts */ +/* PBA ECC Register */ +#define E1000_PBA_ECC_COUNTER_MASK 0xFFF00000 /* ECC counter mask */ +#define E1000_PBA_ECC_COUNTER_SHIFT 20 /* ECC counter shift value */ +#define E1000_PBA_ECC_CORR_EN 0x00000001 /* ECC correction enable */ +#define E1000_PBA_ECC_STAT_CLR 0x00000002 /* Clear ECC error counter */ +#define E1000_PBA_ECC_INT_EN 0x00000004 /* Enable ICR bit 5 for ECC */ + /* * This defines the bits that are set in the Interrupt Mask * Set/Read Register. Each bit is documented below: @@ -565,6 +572,7 @@ #define E1000_EECD_FLUPD 0x00080000 /* Update FLASH */ #define E1000_EECD_AUPDEN 0x00100000 /* Enable Autonomous FLASH update */ #define E1000_EECD_SEC1VAL 0x00400000 /* Sector One Valid */ +#define E1000_EECD_SEC1VAL_VALID_MASK (E1000_EECD_AUTO_RD | E1000_EECD_PRES) #define E1000_NVM_RW_REG_DATA 16 /* Offset to data in NVM read/write registers */ #define E1000_NVM_RW_REG_DONE 2 /* Offset to READ/WRITE done bit */ |