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authorNathan Scott <nathans@sgi.com>2006-06-20 14:56:23 +1000
committerNathan Scott <nathans@sgi.com>2006-06-20 14:56:23 +1000
commit98174e46974323e4941c72e46345f7277755e146 (patch)
treec4644c8f38a519cfb3929d1175fc7107eefe48b9 /arch/mips/pci/fixup-wrppmc.c
parentd8ce75324135ea7100124c1fff4ec5090a350607 (diff)
parent25f42b6af09e34c3f92107b36b5aa6edc2fdba2f (diff)
downloadkernel-crypto-98174e46974323e4941c72e46345f7277755e146.tar.gz
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Merge HEAD from ../linux-2.6
Diffstat (limited to 'arch/mips/pci/fixup-wrppmc.c')
-rw-r--r--arch/mips/pci/fixup-wrppmc.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/mips/pci/fixup-wrppmc.c b/arch/mips/pci/fixup-wrppmc.c
new file mode 100644
index 00000000000..3357c1300bb
--- /dev/null
+++ b/arch/mips/pci/fixup-wrppmc.c
@@ -0,0 +1,37 @@
+/*
+ * fixup-wrppmc.c: PPMC board specific PCI fixup
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006, Wind River Inc. Rongkai.zhan (rongkai.zhan@windriver.com)
+ */
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/gt64120.h>
+
+/* PCI interrupt pins */
+#define PCI_INTA 1
+#define PCI_INTB 2
+#define PCI_INTC 3
+#define PCI_INTD 4
+
+#define PCI_SLOT_MAXNR 32 /* Each PCI bus has 32 physical slots */
+
+static char pci_irq_tab[PCI_SLOT_MAXNR][5] __initdata = {
+ /* 0 INTA INTB INTC INTD */
+ [0] = {0, 0, 0, 0, 0}, /* Slot 0: GT64120 PCI bridge */
+ [6] = {0, WRPPMC_PCI_INTA_IRQ, 0, 0, 0},
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return pci_irq_tab[slot][pin];
+}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}