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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-07-04 09:47:01 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-07-04 09:47:01 -0700 |
commit | 4806626782b4408e468ef686229556899be345c8 (patch) | |
tree | 3ddfd5a5f0f456295d900ad77c181e2cb79f5945 /arch/mips/kernel/smp-cmp.c | |
parent | f1a745710f001e8c2eec6d525396083e1f4c389a (diff) | |
parent | baf922780251d12bc1c24c83df60c4c278abb745 (diff) | |
download | kernel-crypto-4806626782b4408e468ef686229556899be345c8.tar.gz kernel-crypto-4806626782b4408e468ef686229556899be345c8.tar.xz kernel-crypto-4806626782b4408e468ef686229556899be345c8.zip |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
MIPS: Fix CONFIG_FLATMEM version of pfn_valid()
MIPS: Reorganize Cavium OCTEON PCI support.
Update Yoichi Yuasa's e-mail address
MIPS: Allow suspend and hibernation again on uniprocessor kernels.
MIPS: 64-bit: Fix o32 core dump
MIPS: BC47xx: Fix SSB irq setup
MIPS: CMP: Update sync-r4k for current kernel
MIPS: CMP: Move gcmp_probe to before the SMP ops
MIPS: CMP: activate CMP support
MIPS: CMP: Extend IPI handling to CPU number
MIPS: CMP: Extend the GIC IPI interrupts beyond 32
MIPS: Define __arch_swab64 for all mips r2 cpus
MIPS: Update VR41xx GPIO driver to use gpiolib
MIPS: Hookup new syscalls sys_rt_tgsigqueueinfo and sys_perf_counter_open.
MIPS: Malta: Remove unnecessary function prototypes
MIPS: MT: Remove unnecessary semicolons
MIPS: Add support for Texas Instruments AR7 System-on-a-Chip
Diffstat (limited to 'arch/mips/kernel/smp-cmp.c')
-rw-r--r-- | arch/mips/kernel/smp-cmp.c | 66 |
1 files changed, 5 insertions, 61 deletions
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c index 653be061b9e..ad0ff5dc4d5 100644 --- a/arch/mips/kernel/smp-cmp.c +++ b/arch/mips/kernel/smp-cmp.c @@ -37,80 +37,24 @@ #include <asm/mipsregs.h> #include <asm/mipsmtregs.h> #include <asm/mips_mt.h> - -/* - * Crude manipulation of the CPU masks to control which - * which CPU's are brought online during initialisation - * - * Beware... this needs to be called after CPU discovery - * but before CPU bringup - */ -static int __init allowcpus(char *str) -{ - cpumask_t cpu_allow_map; - char buf[256]; - int len; - - cpus_clear(cpu_allow_map); - if (cpulist_parse(str, &cpu_allow_map) == 0) { - cpu_set(0, cpu_allow_map); - cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map); - len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map); - buf[len] = '\0'; - pr_debug("Allowable CPUs: %s\n", buf); - return 1; - } else - return 0; -} -__setup("allowcpus=", allowcpus); +#include <asm/amon.h> +#include <asm/gic.h> static void ipi_call_function(unsigned int cpu) { - unsigned int action = 0; - pr_debug("CPU%d: %s cpu %d status %08x\n", smp_processor_id(), __func__, cpu, read_c0_status()); - switch (cpu) { - case 0: - action = GIC_IPI_EXT_INTR_CALLFNC_VPE0; - break; - case 1: - action = GIC_IPI_EXT_INTR_CALLFNC_VPE1; - break; - case 2: - action = GIC_IPI_EXT_INTR_CALLFNC_VPE2; - break; - case 3: - action = GIC_IPI_EXT_INTR_CALLFNC_VPE3; - break; - } - gic_send_ipi(action); + gic_send_ipi(plat_ipi_call_int_xlate(cpu)); } static void ipi_resched(unsigned int cpu) { - unsigned int action = 0; - pr_debug("CPU%d: %s cpu %d status %08x\n", smp_processor_id(), __func__, cpu, read_c0_status()); - switch (cpu) { - case 0: - action = GIC_IPI_EXT_INTR_RESCHED_VPE0; - break; - case 1: - action = GIC_IPI_EXT_INTR_RESCHED_VPE1; - break; - case 2: - action = GIC_IPI_EXT_INTR_RESCHED_VPE2; - break; - case 3: - action = GIC_IPI_EXT_INTR_RESCHED_VPE3; - break; - } - gic_send_ipi(action); + gic_send_ipi(plat_ipi_resched_int_xlate(cpu)); } /* @@ -206,7 +150,7 @@ static void cmp_boot_secondary(int cpu, struct task_struct *idle) (unsigned long)(gp + sizeof(struct thread_info))); #endif - amon_cpu_start(cpu, pc, sp, gp, a0); + amon_cpu_start(cpu, pc, sp, (unsigned long)gp, a0); } /* |