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authorIngo Molnar <mingo@elte.hu>2008-07-18 22:39:59 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-18 22:39:59 +0200
commit0679c2f47d50651018dd5e0bf35330f6e6ae35ec (patch)
tree2df65ebb958f930abf0b7ad35fd6e528398b1679 /arch/mips/kernel/cevt-txx9.c
parent76fbc263ff7e42ce8b21b8aee176e3c74b45f81a (diff)
parent5b664cb235e97afbf34db9c4d77f08ebd725335e (diff)
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Merge branch 'linus' into pci-for-jesse
Diffstat (limited to 'arch/mips/kernel/cevt-txx9.c')
-rw-r--r--arch/mips/kernel/cevt-txx9.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c
index 795cb8fb0d7..b5fc4eb412d 100644
--- a/arch/mips/kernel/cevt-txx9.c
+++ b/arch/mips/kernel/cevt-txx9.c
@@ -161,6 +161,9 @@ void __init txx9_tmr_init(unsigned long baseaddr)
struct txx9_tmr_reg __iomem *tmrptr;
tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg));
+ /* Start once to make CounterResetEnable effective */
+ __raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr);
+ /* Stop and reset the counter */
__raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr);
__raw_writel(0, &tmrptr->tisr);
__raw_writel(0xffffffff, &tmrptr->cpra);