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authorIngo Molnar <mingo@elte.hu>2009-11-26 10:50:39 +0100
committerIngo Molnar <mingo@elte.hu>2009-11-26 10:50:42 +0100
commit16bc67edeb49b531940b2ba6c183780a1b5c472d (patch)
tree71b4bc48e47e54f2c0b3126d8f81d2f31b707ea8 /arch/arm/mm/mmu.c
parentf6630114d9198aa959ac95c131334c020038f253 (diff)
parent047106adcc85e3023da210143a6ab8a55df9e0fc (diff)
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Merge branch 'sched/urgent' into sched/core
Merge reason: Pick up fixes that did not make it into .32.0 Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r--arch/arm/mm/mmu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 02243eeccf5..ea67be0223a 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -117,6 +117,13 @@ static void __init early_cachepolicy(char **p)
}
if (i == ARRAY_SIZE(cache_policies))
printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n");
+ /*
+ * This restriction is partly to do with the way we boot; it is
+ * unpredictable to have memory mapped using two different sets of
+ * memory attributes (shared, type, and cache attribs). We can not
+ * change these attributes once the initial assembly has setup the
+ * page tables.
+ */
if (cpu_architecture() >= CPU_ARCH_ARMv6) {
printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n");
cachepolicy = CPOLICY_WRITEBACK;