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authorLinus Torvalds <torvalds@linux-foundation.org>2009-11-02 09:53:19 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-11-02 09:53:19 -0800
commitc35102c3e15f90fe604523a2fbffd9dc158b455a (patch)
tree0c248939a1f424701b583873360c91e081bfe810 /arch/arm/mm/flush.c
parent20107f84b29536887b958e38b20474cccc619322 (diff)
parent4b46d6416548fb6a0940dfd9911fd895eb6247b3 (diff)
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Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: ensure initial page tables are setup for SMP systems ARM: 5776/1: Check compiler version and EABI support when adding ARM unwind support. ARM: 5774/1: Fix Realview ARM1176PB board reboot ARM: Fix errata 411920 workarounds ARM: Fix sparsemem with SPARSEMEM_EXTREME enabled ARM: Use GFP_DMA only for masks _less_ than 32-bit ARM: integrator: allow Integrator to be built with highmem ARM: Fix signal restart issues with NX and OABI compat
Diffstat (limited to 'arch/arm/mm/flush.c')
-rw-r--r--arch/arm/mm/flush.c31
1 files changed, 6 insertions, 25 deletions
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index b27942909b2..7f294f307c8 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -18,10 +18,6 @@
#include "mm.h"
-#ifdef CONFIG_ARM_ERRATA_411920
-extern void v6_icache_inval_all(void);
-#endif
-
#ifdef CONFIG_CPU_CACHE_VIPT
#define ALIAS_FLUSH_START 0xffff4000
@@ -35,16 +31,11 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
flush_tlb_kernel_page(to);
asm( "mcrr p15, 0, %1, %0, c14\n"
- " mcr p15, 0, %2, c7, c10, 4\n"
-#ifndef CONFIG_ARM_ERRATA_411920
- " mcr p15, 0, %2, c7, c5, 0\n"
-#endif
+ " mcr p15, 0, %2, c7, c10, 4"
:
: "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
: "cc");
-#ifdef CONFIG_ARM_ERRATA_411920
- v6_icache_inval_all();
-#endif
+ __flush_icache_all();
}
void flush_cache_mm(struct mm_struct *mm)
@@ -57,16 +48,11 @@ void flush_cache_mm(struct mm_struct *mm)
if (cache_is_vipt_aliasing()) {
asm( "mcr p15, 0, %0, c7, c14, 0\n"
- " mcr p15, 0, %0, c7, c10, 4\n"
-#ifndef CONFIG_ARM_ERRATA_411920
- " mcr p15, 0, %0, c7, c5, 0\n"
-#endif
+ " mcr p15, 0, %0, c7, c10, 4"
:
: "r" (0)
: "cc");
-#ifdef CONFIG_ARM_ERRATA_411920
- v6_icache_inval_all();
-#endif
+ __flush_icache_all();
}
}
@@ -81,16 +67,11 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned
if (cache_is_vipt_aliasing()) {
asm( "mcr p15, 0, %0, c7, c14, 0\n"
- " mcr p15, 0, %0, c7, c10, 4\n"
-#ifndef CONFIG_ARM_ERRATA_411920
- " mcr p15, 0, %0, c7, c5, 0\n"
-#endif
+ " mcr p15, 0, %0, c7, c10, 4"
:
: "r" (0)
: "cc");
-#ifdef CONFIG_ARM_ERRATA_411920
- v6_icache_inval_all();
-#endif
+ __flush_icache_all();
}
}