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| author | Harald Welte <HaraldWelte@viatech.com> | 2009-06-18 16:53:38 +0200 |
|---|---|---|
| committer | Pierre Ossman <pierre@ossman.eu> | 2009-06-21 21:00:59 +0200 |
| commit | 557b06971b1f05cbadec2f376a305ee1954e9b0d (patch) | |
| tree | 08f0fa936e2483afd3e91fc17277fcc45d5c3469 | |
| parent | fe9db6cbf16ed64f882999dc0bffef0c65f70c4f (diff) | |
| download | kernel-crypto-557b06971b1f05cbadec2f376a305ee1954e9b0d.tar.gz kernel-crypto-557b06971b1f05cbadec2f376a305ee1954e9b0d.tar.xz kernel-crypto-557b06971b1f05cbadec2f376a305ee1954e9b0d.zip | |
sdhci: Specific quirk vor VIA SDHCI controller in VX855ES
The SDHCI controller found in the VX855ES requires 10ms
delay between applying power and applying clock.
This issue has been discovered and documented by the OLPC XO1.5 team.
Signed-off-by: Harald Welte <HaraldWelte@viatech.com>
Signed-off-by: Pierre Ossman <pierre@ossman.eu>
| -rw-r--r-- | drivers/mmc/host/sdhci-pci.c | 20 | ||||
| -rw-r--r-- | drivers/mmc/host/sdhci.c | 7 | ||||
| -rw-r--r-- | drivers/mmc/host/sdhci.h | 2 |
3 files changed, 29 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index 65be27995d5..2f15cc17d88 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -284,6 +284,18 @@ static const struct sdhci_pci_fixes sdhci_jmicron = { .resume = jmicron_resume, }; +static int via_probe(struct sdhci_pci_chip *chip) +{ + if (chip->pdev->revision == 0x10) + chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER; + + return 0; +} + +static const struct sdhci_pci_fixes sdhci_via = { + .probe = via_probe, +}; + static const struct pci_device_id pci_ids[] __devinitdata = { { .vendor = PCI_VENDOR_ID_RICOH, @@ -349,6 +361,14 @@ static const struct pci_device_id pci_ids[] __devinitdata = { .driver_data = (kernel_ulong_t)&sdhci_jmicron, }, + { + .vendor = PCI_VENDOR_ID_VIA, + .device = 0x95d0, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .driver_data = (kernel_ulong_t)&sdhci_via, + }, + { /* Generic SD host controller */ PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00) }, diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index c7586739be1..f4066fdc890 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1057,6 +1057,13 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power) pwr |= SDHCI_POWER_ON; sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); + + /* + * Some controllers need an extra 10ms delay of 10ms before they + * can apply clock after applying power + */ + if ((host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER)) + mdelay(10); } /*****************************************************************************\ diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 5d37dd94b53..831ddf7dcb4 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -230,6 +230,8 @@ struct sdhci_host { #define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21) /* Controller can only handle 1-bit data transfers */ #define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22) +/* Controller needs 10ms delay between applying power and clock */ +#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23) int irq; /* Device IRQ */ void __iomem * ioaddr; /* Mapped address */ |