diff options
| author | Marcelo Tosatti <marcelo.tosatti@cyclades.com> | 2006-01-17 00:24:42 -0200 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-01-20 16:13:50 +1100 |
| commit | 0ec57e53c945fe962b190953f61e1ffd127e68d3 (patch) | |
| tree | 2c8cf3e91aa3222be2f7e55bbbd4f55c4deef98f | |
| parent | f4fc4a5b74cff2a487222f05704a2bd01953d250 (diff) | |
| download | kernel-crypto-0ec57e53c945fe962b190953f61e1ffd127e68d3.tar.gz kernel-crypto-0ec57e53c945fe962b190953f61e1ffd127e68d3.tar.xz kernel-crypto-0ec57e53c945fe962b190953f61e1ffd127e68d3.zip | |
[PATCH] powerpc: generalize PPC44x_PIN_SIZE
The following patch generalizes PPC44x_PIN_SIZE by changing it to
PPC_PIN_SIZE, which can be defined by any sub-arch to automatically adjust
VMALLOC_START.
Define PPC_PIN_SIZE on 8xx, avoiding potential conflicts with the
pinned space.
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
| -rw-r--r-- | arch/ppc/mm/44x_mmu.c | 4 | ||||
| -rw-r--r-- | include/asm-ppc/ibm44x.h | 2 | ||||
| -rw-r--r-- | include/asm-ppc/mpc8xx.h | 2 | ||||
| -rw-r--r-- | include/asm-ppc/pgtable.h | 6 |
4 files changed, 8 insertions, 6 deletions
diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c index 3d79ce281b6..e0152a9b26e 100644 --- a/arch/ppc/mm/44x_mmu.c +++ b/arch/ppc/mm/44x_mmu.c @@ -104,7 +104,7 @@ unsigned long __init mmu_mapin_ram(void) /* Determine number of entries necessary to cover lowmem */ pinned_tlbs = (unsigned int) - (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT); + (_ALIGN(total_lowmem, PPC_PIN_SIZE) >> PPC44x_PIN_SHIFT); /* Write upper watermark to save location */ tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs; @@ -112,7 +112,7 @@ unsigned long __init mmu_mapin_ram(void) /* If necessary, set additional pinned TLBs */ if (pinned_tlbs > 1) for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) { - unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE; + unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC_PIN_SIZE; ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr); } diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h index f835066fb3c..3acc382cc83 100644 --- a/include/asm-ppc/ibm44x.h +++ b/include/asm-ppc/ibm44x.h @@ -29,7 +29,7 @@ /* TLB entry offset/size used for pinning kernel lowmem */ #define PPC44x_PIN_SHIFT 28 -#define PPC44x_PIN_SIZE (1 << PPC44x_PIN_SHIFT) +#define PPC_PIN_SIZE (1 << PPC44x_PIN_SHIFT) /* Lowest TLB slot consumed by the default pinned TLBs */ #define PPC44x_LOW_SLOT 63 diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h index 46f159cf589..73ec9a6db0b 100644 --- a/include/asm-ppc/mpc8xx.h +++ b/include/asm-ppc/mpc8xx.h @@ -113,6 +113,8 @@ enum ppc_sys_devices { MPC8xx_CPM_USB, }; +#define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */ + #ifndef BOARD_CHIP_NAME #define BOARD_CHIP_NAME "" #endif diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h index 6d1c39e8a6a..e1c62da12e7 100644 --- a/include/asm-ppc/pgtable.h +++ b/include/asm-ppc/pgtable.h @@ -12,6 +12,7 @@ #include <asm/processor.h> /* For TASK_SIZE */ #include <asm/mmu.h> #include <asm/page.h> +#include <asm/io.h> /* For sub-arch specific PPC_PIN_SIZE */ struct mm_struct; extern unsigned long va_to_phys(unsigned long address); @@ -127,9 +128,8 @@ extern unsigned long ioremap_bot, ioremap_base; * of RAM. -- Cort */ #define VMALLOC_OFFSET (0x1000000) /* 16M */ -#ifdef CONFIG_44x -#include <asm/ibm44x.h> -#define VMALLOC_START (((_ALIGN((long)high_memory, PPC44x_PIN_SIZE) + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))) +#ifdef PPC_PIN_SIZE +#define VMALLOC_START (((_ALIGN((long)high_memory, PPC_PIN_SIZE) + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))) #else #define VMALLOC_START ((((long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))) #endif |