linux.git - Andy Grover's kernel tree

	Commit message (Collapse)	Author	Age	Files	Lines
*	drm/nouveau/fifo: turn all fifo modules into engine modules	Ben Skeggs	2012-05-24	1	-0/+1
\| \| \| \| \| \| \| \| \| \| \| \| \|	Been tested on each major revision that's relevant here, but I'm sure there are still bugs waiting to be ironed out. This is a very invasive change. There's a couple of pieces left that I don't like much (eg. other engines using fifo_priv for the channel count), but that's an artefact of there being a master channel list still. This is changing, slowly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
*	drm/nouveau: just pass gpio line to pwm_*, not entire gpio struct	Ben Skeggs	2011-12-21	1	-10/+8
\| \| \| \| \| \| \|	We don't need more than the line id to determine the PWM controller, and the GPIO interfaces are about to change somewhat. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
*	drm/nouveau/pm: make clocks_set return an error code clocks_set can fail.	Martin Peres	2011-12-21	1	-2/+5
\| \| \| \| \| \| \| \| \|	Reporting an error is better than silently refusing to reclock. V2: Use the same logic on nv40 Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
*	drm/nv40/pm: convert to new pwm hooks, also fixing pwm type detection	Ben Skeggs	2011-12-21	1	-40/+32
\| \| \| \| \| \| \| \| \| \| \| \|	A NV49 appeared a while back that was using the "nv41 style" pwm registers, rather than the "nv40 style" ones my board is using. This disproves the previous theory that the pwm controller choice is chipset-specific. So, after looking at a bunch of vbios images it appears that the next viable theory is that we should select the pwm controller to use based on the gpio line the fan is tied to, just like we do on nv50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
*	drm/nv41/pm: implement a second type of fanspeed pwm	Ben Skeggs	2011-12-21	1	-0/+27
\| \| \| \|	Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
*	drm/nv40/pm: implement first type of pwm fanspeed funcs	Ben Skeggs	2011-12-21	1	-0/+26
\| \| \| \|	Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
*	drm/nv40/pm: fix issues on igp chipsets, which don't have memory	Ben Skeggs	2011-11-10	1	-5/+15
\| \| \| \|	Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
*	drm/nv40/pm: execute memory reset script from vbios	Ben Skeggs	2011-09-20	1	-0/+5
\| \| \| \|	Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
*	drm/nv40/pm: write nv40-specific reclocking routines	Ben Skeggs	2011-09-20	1	-0/+333
	Not 100% perfect yet, but a good start towards what it'll look like in the end. Actually seems stable on a NV44 I have here, as much as running around OA for a fair amount of time constantly switching between performance levels can prove.. My NV49 isn't quite so happy, and semaphores mess up somehow (sometimes) as a result of the memory reclocking. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>