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* ARM: Remove current_mm per-cpu variableCatalin Marinas2012-04-171-11/+1
* ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUsCatalin Marinas2012-04-171-2/+2
* ARM: Use TTBR1 instead of reserved context IDWill Deacon2012-04-171-18/+27
* ARM: LPAE: Add context switching supportCatalin Marinas2011-12-081-2/+17
* locking, ARM: Annotate low level hw locks as rawThomas Gleixner2011-09-131-7/+7
* Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks"Russell King2011-06-091-3/+3
* Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID"Russell King2011-06-091-6/+5
* ARM: 6944/1: mm: allow ASID 0 to be allocated to tasksWill Deacon2011-05-261-3/+3
* ARM: 6943/1: mm: use TTBR1 instead of reserved context IDWill Deacon2011-05-261-5/+6
* ARM: 5905/1: ARM: Global ASID allocation on SMPCatalin Marinas2010-02-151-14/+110
* ARM: Fix errata 411920 workaroundsRussell King2009-10-291-4/+1
* cpumask: use mm_cpumask() wrapper: armRusty Russell2009-09-241-1/+1
*-. Merge branches 'armv7', 'at91', 'misc' and 'omap' into develRussell King2007-05-091-3/+7
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| | * [ARM] Fix ASID version switchRussell King2007-05-081-3/+7
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* / [ARM] armv7: add support for asid-tagged VIVT I-cacheCatalin Marinas2007-05-091-0/+7
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* [ARM] 4128/1: Architecture compliant TTBR changing sequenceCatalin Marinas2007-02-081-2/+10
* [ARM] Move mmu.c out of the wayRussell King2006-09-201-0/+45
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