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path: root/arch/arm/mm/cache-l2x0.c
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* ARM: 7398/1: l2x0: only write to debug registers on PL310Will Deacon2012-04-231-5/+8
* ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310Will Deacon2012-04-231-6/+6
* ARM: cache-l2x0.c: consistently use u32Russell King2012-01-201-11/+11
* ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workaroundsWill Deacon2011-11-211-1/+1
* Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2011-10-261-23/+23
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| * locking, ARM: Annotate low level hw locks as rawThomas Gleixner2011-09-131-23/+23
* | ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure modeBarry Song2011-10-171-10/+119
* | ARM: 7090/1: CACHE-L2X0: filter start address can be 0 and is often 0Barry Song2011-10-171-1/+1
* | ARM: 7089/1: L2X0: add explicit cpu_relax() for busy wait loopBarry Song2011-10-171-1/+1
* | ARM: 7009/1: l2x0: Add OF based initializationRob Herring2011-10-171-0/+103
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* ARM: 7080/1: l2x0: make sure I&D are not locked down on initLinus Walleij2011-09-071-0/+21
* ARM: 6987/1: l2x0: fix disabling function to avoid deadlockWill Deacon2011-07-061-6/+13
* Merge branch 'misc' into develRussell King2011-03-161-14/+18
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| * ARM: 6795/1: l2x0: Errata fix for flush by Way operation can cause data corruptiSantosh Shilimkar2011-03-091-14/+18
* | ARM: 6741/1: errata: pl310 cache sync operation may be faultySrinidhi Kasagar2011-02-191-0/+6
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* ARM: l2x0: Optimise the range based operationsSantosh Shilimkar2010-10-261-0/+22
* ARM: l2x0: Determine the cache sizeSantosh Shilimkar2010-10-261-2/+11
* arm: Implement l2x0 cache disable functionsThomas Gleixner2010-10-261-1/+27
* ARM: Improve the L2 cache performance when PL310 is usedCatalin Marinas2010-10-261-3/+12
* ARM: 6272/1: Convert L2x0 to use the IO relaxed operationsCatalin Marinas2010-07-291-13/+13
* ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRLSascha Hauer2010-07-091-2/+3
* Merge branch 'devel-stable' into develRussell King2010-05-171-0/+10
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| * ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4)Catalin Marinas2010-03-251-0/+10
* | ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310Jason McMullan2010-05-151-5/+34
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* ARM: 5919/1: ARM: L2 : Errata 588369: Clean & Invalidate do not invalidate cl...Santosh Shilimkar2010-02-151-0/+36
* ARM: 5916/1: ARM: L2 : Add maintainace by line helper functionsSantosh Shilimkar2010-02-151-10/+26
* Merge branch 'pending-l2x0' into cacheRussell King2009-12-141-21/+72
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| * ARM: cache-l2x0: make better use of background cache handlingRussell King2009-12-141-11/+23
| * ARM: cache-l2x0: avoid taking spinlock for every iterationRussell King2009-12-141-13/+52
* | ARM: 5845/1: l2x0: check whether l2x0 already enabledSrinidhi Kasagar2009-12-031-9/+16
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* [ARM] Convert asm/io.h to linux/io.hRussell King2008-09-061-1/+1
* [ARM] 4568/1: fix l2x0 cache invalidate handling of unaligned addressesRui Sousa2007-09-171-1/+11
* [ARM] 4500/1: Add locking around the background L2x0 cache operationsCatalin Marinas2007-07-201-0/+6
* [ARM] 4135/1: Add support for the L210/L220 cache controllersCatalin Marinas2007-02-111-0/+104
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