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authorShimoda, Yoshihiro <yoshihiro.shimoda.uh@renesas.com>2012-04-12 19:19:21 +0900
committerPaul Mundt <lethal@linux-sh.org>2012-04-12 19:19:21 +0900
commita4e02f6d83d4fcdb13bcaba76878fc5ea0da9911 (patch)
tree03fa3cfb50f700049f4389b642cd1e232ea3ab89 /drivers/tty/serial
parentee565105ccedc63728a83f4deb1c10dc57091959 (diff)
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serial: sh-sci: Update break_ctl handling for all SCSPTR-capable regtypes.
This updates the earlier break_ctl support regardless of regtype so long as the requisite SCSPTR exists. This is the same approach used by sci_init_pins() for providing a generic solution now that we're able to detect register capabilities on a per-port basis. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/tty/serial')
-rw-r--r--drivers/tty/serial/sh-sci.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 3e471fc12991..be31d85a50e3 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1565,31 +1565,31 @@ static void sci_enable_ms(struct uart_port *port)
static void sci_break_ctl(struct uart_port *port, int break_state)
{
struct sci_port *s = to_sci_port(port);
+ struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR;
unsigned short scscr, scsptr;
- switch (s->cfg->regtype) {
- case SCIx_SH4_SCIF_REGTYPE:
- scsptr = serial_port_in(port, SCSPTR);
- scscr = serial_port_in(port, SCSCR);
-
- if (break_state == -1) {
- scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
- scscr &= ~SCSCR_TE;
- } else {
- scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO;
- scscr |= SCSCR_TE;
- }
-
- serial_port_out(port, SCSPTR, scsptr);
- serial_port_out(port, SCSCR, scscr);
- break;
- default:
+ /* check wheter the port has SCSPTR */
+ if (!reg->size) {
/*
* Not supported by hardware. Most parts couple break and rx
* interrupts together, with break detection always enabled.
*/
- break;
+ return;
}
+
+ scsptr = serial_port_in(port, SCSPTR);
+ scscr = serial_port_in(port, SCSCR);
+
+ if (break_state == -1) {
+ scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
+ scscr &= ~SCSCR_TE;
+ } else {
+ scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO;
+ scscr |= SCSCR_TE;
+ }
+
+ serial_port_out(port, SCSPTR, scsptr);
+ serial_port_out(port, SCSCR, scscr);
}
#ifdef CONFIG_SERIAL_SH_SCI_DMA