From ceec4c8746567a0be70147f2c6f25e767347b0a0 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:17 +0900 Subject: kbuild: import Kbuild.include from linux v3.13 tag Signed-off-by: Masahiro Yamada --- scripts/Kbuild.include | 278 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 278 insertions(+) create mode 100644 scripts/Kbuild.include (limited to 'scripts/Kbuild.include') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include new file mode 100644 index 0000000000..547e15daf0 --- /dev/null +++ b/scripts/Kbuild.include @@ -0,0 +1,278 @@ +#### +# kbuild: Generic definitions + +# Convenient variables +comma := , +squote := ' +empty := +space := $(empty) $(empty) + +### +# Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o +dot-target = $(dir $@).$(notdir $@) + +### +# The temporary file to save gcc -MD generated dependencies must not +# contain a comma +depfile = $(subst $(comma),_,$(dot-target).d) + +### +# filename of target with directory and extension stripped +basetarget = $(basename $(notdir $@)) + +### +# filename of first prerequisite with directory and extension stripped +baseprereq = $(basename $(notdir $<)) + +### +# Escape single quote for use in echo statements +escsq = $(subst $(squote),'\$(squote)',$1) + +### +# Easy method for doing a status message + kecho := : + quiet_kecho := echo +silent_kecho := : +kecho := $($(quiet)kecho) + +### +# filechk is used to check if the content of a generated file is updated. +# Sample usage: +# define filechk_sample +# echo $KERNELRELEASE +# endef +# version.h : Makefile +# $(call filechk,sample) +# The rule defined shall write to stdout the content of the new file. +# The existing file will be compared with the new one. +# - If no file exist it is created +# - If the content differ the new file is used +# - If they are equal no change, and no timestamp update +# - stdin is piped in from the first prerequisite ($<) so one has +# to specify a valid file as first prerequisite (often the kbuild file) +define filechk + $(Q)set -e; \ + $(kecho) ' CHK $@'; \ + mkdir -p $(dir $@); \ + $(filechk_$(1)) < $< > $@.tmp; \ + if [ -r $@ ] && cmp -s $@ $@.tmp; then \ + rm -f $@.tmp; \ + else \ + $(kecho) ' UPD $@'; \ + mv -f $@.tmp $@; \ + fi +endef + +###### +# gcc support functions +# See documentation in Documentation/kbuild/makefiles.txt + +# cc-cross-prefix +# Usage: CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu- m68k-linux-) +# Return first prefix where a prefix$(CC) is found in PATH. +# If no $(CC) found in PATH with listed prefixes return nothing +cc-cross-prefix = \ + $(word 1, $(foreach c,$(1), \ + $(shell set -e; \ + if (which $(strip $(c))$(CC)) > /dev/null 2>&1 ; then \ + echo $(c); \ + fi))) + +# output directory for tests below +TMPOUT := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/) + +# try-run +# Usage: option = $(call try-run, $(CC)...-o "$$TMP",option-ok,otherwise) +# Exit code chooses option. "$$TMP" is can be used as temporary file and +# is automatically cleaned up. +try-run = $(shell set -e; \ + TMP="$(TMPOUT).$$$$.tmp"; \ + TMPO="$(TMPOUT).$$$$.o"; \ + if ($(1)) >/dev/null 2>&1; \ + then echo "$(2)"; \ + else echo "$(3)"; \ + fi; \ + rm -f "$$TMP" "$$TMPO") + +# as-option +# Usage: cflags-y += $(call as-option,-Wa$(comma)-isa=foo,) + +as-option = $(call try-run,\ + $(CC) $(KBUILD_CFLAGS) $(1) -c -x assembler /dev/null -o "$$TMP",$(1),$(2)) + +# as-instr +# Usage: cflags-y += $(call as-instr,instr,option1,option2) + +as-instr = $(call try-run,\ + printf "%b\n" "$(1)" | $(CC) $(KBUILD_AFLAGS) -c -x assembler -o "$$TMP" -,$(2),$(3)) + +# cc-option +# Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586) + +cc-option = $(call try-run,\ + $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2)) + +# cc-option-yn +# Usage: flag := $(call cc-option-yn,-march=winchip-c6) +cc-option-yn = $(call try-run,\ + $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n) + +# cc-option-align +# Prefix align with either -falign or -malign +cc-option-align = $(subst -functions=0,,\ + $(call cc-option,-falign-functions=0,-malign-functions=0)) + +# cc-disable-warning +# Usage: cflags-y += $(call cc-disable-warning,unused-but-set-variable) +cc-disable-warning = $(call try-run,\ + $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1))) + +# cc-version +# Usage gcc-ver := $(call cc-version) +cc-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh $(CC)) + +# cc-fullversion +# Usage gcc-ver := $(call cc-fullversion) +cc-fullversion = $(shell $(CONFIG_SHELL) \ + $(srctree)/scripts/gcc-version.sh -p $(CC)) + +# cc-ifversion +# Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1) +cc-ifversion = $(shell [ $(call cc-version, $(CC)) $(1) $(2) ] && echo $(3)) + +# cc-ldoption +# Usage: ldflags += $(call cc-ldoption, -Wl$(comma)--hash-style=both) +cc-ldoption = $(call try-run,\ + $(CC) $(1) -nostdlib -x c /dev/null -o "$$TMP",$(1),$(2)) + +# ld-option +# Usage: LDFLAGS += $(call ld-option, -X) +ld-option = $(call try-run,\ + $(CC) -x c /dev/null -c -o "$$TMPO" ; $(LD) $(1) "$$TMPO" -o "$$TMP",$(1),$(2)) + +# ar-option +# Usage: KBUILD_ARFLAGS := $(call ar-option,D) +# Important: no spaces around options +ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2)) + +###### + +### +# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj= +# Usage: +# $(Q)$(MAKE) $(build)=dir +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj + +### +# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj= +# Usage: +# $(Q)$(MAKE) $(modbuiltin)=dir +modbuiltin := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.modbuiltin obj + +# Prefix -I with $(srctree) if it is not an absolute path. +# skip if -I has no parameter +addtree = $(if $(patsubst -I%,%,$(1)), \ +$(if $(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1)) + +# Find all -I options and call addtree +flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o))) + +# echo command. +# Short version is used, if $(quiet) equals `quiet_', otherwise full one. +echo-cmd = $(if $($(quiet)cmd_$(1)),\ + echo ' $(call escsq,$($(quiet)cmd_$(1)))$(echo-why)';) + +# printing commands +cmd = @$(echo-cmd) $(cmd_$(1)) + +# Add $(obj)/ for paths that are not absolute +objectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o))) + +### +# if_changed - execute command if any prerequisite is newer than +# target, or command line has changed +# if_changed_dep - as if_changed, but uses fixdep to reveal dependencies +# including used config symbols +# if_changed_rule - as if_changed but execute rule instead +# See Documentation/kbuild/makefiles.txt for more info + +ifneq ($(KBUILD_NOCMDDEP),1) +# Check if both arguments has same arguments. Result is empty string if equal. +# User may override this check using make KBUILD_NOCMDDEP=1 +arg-check = $(strip $(filter-out $(cmd_$(1)), $(cmd_$@)) \ + $(filter-out $(cmd_$@), $(cmd_$(1))) ) +else +arg-check = $(if $(strip $(cmd_$@)),,1) +endif + +# >'< substitution is for echo to work, +# >$< substitution to preserve $ when reloading .cmd file +# note: when using inline perl scripts [perl -e '...$$t=1;...'] +# in $(cmd_xxx) double $$ your perl vars +make-cmd = $(subst \\,\\\\,$(subst \#,\\\#,$(subst $$,$$$$,$(call escsq,$(cmd_$(1)))))) + +# Find any prerequisites that is newer than target or that does not exist. +# PHONY targets skipped in both cases. +any-prereq = $(filter-out $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^) + +# Execute command if command has changed or prerequisite(s) are updated. +# +if_changed = $(if $(strip $(any-prereq) $(arg-check)), \ + @set -e; \ + $(echo-cmd) $(cmd_$(1)); \ + echo 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd) + +# Execute the command and also postprocess generated .d dependencies file. +if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ), \ + @set -e; \ + $(echo-cmd) $(cmd_$(1)); \ + scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).tmp;\ + rm -f $(depfile); \ + mv -f $(dot-target).tmp $(dot-target).cmd) + +# Usage: $(call if_changed_rule,foo) +# Will check if $(cmd_foo) or any of the prerequisites changed, +# and if so will execute $(rule_foo). +if_changed_rule = $(if $(strip $(any-prereq) $(arg-check) ), \ + @set -e; \ + $(rule_$(1))) + +### +# why - tell why a a target got build +# enabled by make V=2 +# Output (listed in the order they are checked): +# (1) - due to target is PHONY +# (2) - due to target missing +# (3) - due to: file1.h file2.h +# (4) - due to command line change +# (5) - due to missing .cmd file +# (6) - due to target not in $(targets) +# (1) PHONY targets are always build +# (2) No target, so we better build it +# (3) Prerequisite is newer than target +# (4) The command line stored in the file named dir/.target.cmd +# differed from actual command line. This happens when compiler +# options changes +# (5) No dir/.target.cmd file (used to store command line) +# (6) No dir/.target.cmd file and target not listed in $(targets) +# This is a good hint that there is a bug in the kbuild file +ifeq ($(KBUILD_VERBOSE),2) +why = \ + $(if $(filter $@, $(PHONY)),- due to target is PHONY, \ + $(if $(wildcard $@), \ + $(if $(strip $(any-prereq)),- due to: $(any-prereq), \ + $(if $(arg-check), \ + $(if $(cmd_$@),- due to command line change, \ + $(if $(filter $@, $(targets)), \ + - due to missing .cmd file, \ + - due to $(notdir $@) not in $$(targets) \ + ) \ + ) \ + ) \ + ), \ + - due to target missing \ + ) \ + ) + +echo-why = $(call escsq, $(strip $(why))) +endif -- cgit From bf4b3de1013c1643ffb8f071292c0f0eabb265c3 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:18 +0900 Subject: kbuild: Use Kbuild.include This commit adjusts some files to use Kbuild.include. - Use cc-option defined in Kbuild.include (Delete cc-option in config.mk) - Use cc-version defined in (Delete cc-version in config.mk) - Move binutils-version and dtc-version to Kbuild.include by analogy to cc-version This commit also adds srctree (same as SRCTREE) to use Kbuild scripts. Signed-off-by: Masahiro Yamada --- scripts/Kbuild.include | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'scripts/Kbuild.include') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index 547e15daf0..ca5fd56ca2 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -140,6 +140,10 @@ cc-fullversion = $(shell $(CONFIG_SHELL) \ # Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1) cc-ifversion = $(shell [ $(call cc-version, $(CC)) $(1) $(2) ] && echo $(3)) +# added for U-Boot +binutils-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/binutils-version.sh $(AS)) +dtc-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/dtc-version.sh $(DTC)) + # cc-ldoption # Usage: ldflags += $(call cc-ldoption, -Wl$(comma)--hash-style=both) cc-ldoption = $(call try-run,\ @@ -161,7 +165,9 @@ ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2)) # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj= # Usage: # $(Q)$(MAKE) $(build)=dir -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj +#build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj +# temporary +build := -f $(srctree)/scripts/Makefile.build -C ### # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj= -- cgit From 9e4140329ee9a787d0f96ac2829d618d47f7973f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:24 +0900 Subject: kbuild: change out-of-tree build This commit changes the working directory where the build process occurs. Before this commit, build process occurred under the source tree for both in-tree and out-of-tree build. That's why we needed to add $(obj) prefix to all generated files in makefiles like follows: $(obj)u-boot.bin: $(obj)u-boot Here, $(obj) is empty for in-tree build, whereas it points to the output directory for out-of-tree build. And our old build system changes the current working directory with "make -C " syntax when descending into the sub-directories. On the other hand, Kbuild uses a different idea to handle out-of-tree build and directory descending. The build process of Kbuild always occurs under the output tree. When "O=dir/to/store/output/files" is given, the build system changes the current working directory to that directory and restarts the make. Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=" syntax for descending into sub-directories. (We can write it like "make $(obj)=" with a shorthand.) This means the current working directory is always the top of the output directory. Signed-off-by: Masahiro Yamada Tested-by: Gerhard Sittig --- scripts/Kbuild.include | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'scripts/Kbuild.include') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index ca5fd56ca2..6113c13d16 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -165,9 +165,7 @@ ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2)) # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj= # Usage: # $(Q)$(MAKE) $(build)=dir -#build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj -# temporary -build := -f $(srctree)/scripts/Makefile.build -C +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj ### # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj= -- cgit From ec626f11392ca1bc5e83199ceb74e41f0d9ea0c3 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:26 +0900 Subject: Makefile: rename scripts/Makefile.build to scripts/Makefile.build.tmp Some build scripts including scripts/Makefile.build will be imported from Linux Kernel in the next commit. We need to adjust them for U-Boot in the following commits. To make it easier for reviewers to track the modification, this commit renames scripts/Makefile.build to scripts/Makefile.build.tmp beforehand. Signed-off-by: Masahiro Yamada --- scripts/Kbuild.include | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'scripts/Kbuild.include') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index 6113c13d16..30a5551a4d 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -165,7 +165,7 @@ ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2)) # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj= # Usage: # $(Q)$(MAKE) $(build)=dir -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj ### # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj= -- cgit From 6825a95b0ba72c4e5667d02d8b31986e2e9abd5a Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:28 +0900 Subject: kbuild: use Linux Kernel build scripts Now we are ready to switch over to real Kbuild. This commit disables temporary scripts: scripts/{Makefile.build.tmp, Makefile.host.tmp} and enables real Kbuild scripts: scripts/{Makefile.build,Makefile.host,Makefile.lib}. This switch is triggered by the line in scripts/Kbuild.include -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj We need to adjust some build scripts for U-Boot. But smaller amount of modification is preferable. Additionally, we need to fix compiler flags which are locally added or removed. In Kbuild, it is not allowed to change CFLAGS locally. Instead, ccflags-y, asflags-y, cppflags-y, CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o are prepared for that purpose. Signed-off-by: Masahiro Yamada Tested-by: Gerhard Sittig --- scripts/Kbuild.include | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'scripts/Kbuild.include') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index 30a5551a4d..6113c13d16 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -165,7 +165,7 @@ ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2)) # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj= # Usage: # $(Q)$(MAKE) $(build)=dir -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj ### # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj= -- cgit From 9a368d0f5818bb671c4567ca0e2dbabbf9c6724d Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 4 Feb 2014 17:24:44 +0900 Subject: kbuild: Do not generate .*.su files at the top directory Without this workaround, you will see a lot of ".*.su" files at the top directory after building with a compiler which supports "-fstack-usage" option. Signed-off-by: Masahiro Yamada --- scripts/Kbuild.include | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'scripts/Kbuild.include') diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index 6113c13d16..650457191a 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -85,14 +85,16 @@ TMPOUT := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/) # Usage: option = $(call try-run, $(CC)...-o "$$TMP",option-ok,otherwise) # Exit code chooses option. "$$TMP" is can be used as temporary file and # is automatically cleaned up. +# modifed for U-Boot: prevent cc-option from leaving .*.su files try-run = $(shell set -e; \ TMP="$(TMPOUT).$$$$.tmp"; \ TMPO="$(TMPOUT).$$$$.o"; \ + TMPSU="$(TMPOUT).$$$$.su"; \ if ($(1)) >/dev/null 2>&1; \ then echo "$(2)"; \ else echo "$(3)"; \ fi; \ - rm -f "$$TMP" "$$TMPO") + rm -f "$$TMP" "$$TMPO" "$$TMPSU") # as-option # Usage: cflags-y += $(call as-option,-Wa$(comma)-isa=foo,) -- cgit