From 154502fe0796f3b7a4698378c5d2080ae28a9782 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 7 Aug 2008 13:21:11 -0400 Subject: Blackfin: add defines to describe active bootrom behavior Signed-off-by: Mike Frysinger --- include/asm-blackfin/mach-common/bits/bootrom.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/mach-common/bits/bootrom.h b/include/asm-blackfin/mach-common/bits/bootrom.h index 6cdaa4f894..bf661f0c10 100644 --- a/include/asm-blackfin/mach-common/bits/bootrom.h +++ b/include/asm-blackfin/mach-common/bits/bootrom.h @@ -88,6 +88,8 @@ #define _BOOTROM_REV 0xEF000040 #define _BOOTROM_SESR 0xEF001000 +#define BOOTROM_FOLLOWS_C_ABI 1 + #define BOOTROM_CAPS_ADI_BOOT_STRUCTS 1 /* Not available on initial BF54x or BF52x */ @@ -100,6 +102,9 @@ #endif +#ifndef BOOTROM_FOLLOWS_C_ABI +#define BOOTROM_FOLLOWS_C_ABI 0 +#endif #ifndef BOOTROM_CAPS_ADI_BOOT_STRUCTS #define BOOTROM_CAPS_ADI_BOOT_STRUCTS 0 #endif @@ -109,6 +114,12 @@ #ifndef __ASSEMBLY__ +#if BOOTROM_FOLLOWS_C_ABI +# define BOOTROM_CALLED_FUNC_ATTR +#else +# define BOOTROM_CALLED_FUNC_ATTR __attribute__((saveall)) +#endif + /* Structures for the syscontrol() function */ typedef struct ADI_SYSCTRL_VALUES { uint16_t uwVrCtl; -- cgit From c8054bc12e00669bd7588f2b30fef48aa94babac Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 7 Aug 2008 13:21:27 -0400 Subject: Blackfin: add bit defines for DDR parts Signed-off-by: Mike Frysinger --- include/asm-blackfin/mach-common/bits/ebiu.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-common/bits/ebiu.h b/include/asm-blackfin/mach-common/bits/ebiu.h index ab530ad869..af456fbe98 100644 --- a/include/asm-blackfin/mach-common/bits/ebiu.h +++ b/include/asm-blackfin/mach-common/bits/ebiu.h @@ -410,12 +410,31 @@ /* EBIU_SDSTAT Masks */ #define SDCI 0x0001 /* SDRAM controller is idle */ -#define SDSRA 0x0002 /* SDRAM SDRAM self refresh is active */ +#define SDSRA 0x0002 /* SDRAM self refresh is active */ #define SDPUA 0x0004 /* SDRAM power up active */ #define SDRS 0x0008 /* SDRAM is in reset state */ #define SDEASE 0x0010 /* SDRAM EAB sticky error status - W1C */ #define BGSTAT 0x0020 /* Bus granted */ +/* Only available on DDR based-parts */ +#else + +/* EBIU_ERRMST Masks */ +#define DEB0_ERROR 0x0001 /* DEB0 access on reserved memory */ +#define DEB1_ERROR 0x0002 /* DEB1 access on reserved memory */ +#define DEB2_ERROR 0x0004 /* DEB2 (USB) access on reserved memory */ +#define CORE_ERROR 0x0008 /* Core access on reserved memory */ +#define DEB0_MERROR 0x0010 /* DEB0 access on reserved memory and DEB0_ERROR is set */ +#define DEB1_MERROR 0x0020 /* DEB1 access on reserved memory and DEB1_ERROR is set */ +#define DEB2_MERROR 0x0040 /* DEB2 access on reserved memory and DEB2_ERROR is set */ +#define CORE_MERROR 0x0080 /* Core access on reserved memory and CORE_ERROR is set */ + +/* EBIU_RSTCTL Masks */ +#define DDR_SRESET 0x0001 /* Reset Control to DDR Controller */ +#define SRREQ 0x0008 /* Self Refresh Request */ +#define SRACK 0x0010 /* Self Refresh Request Acknowledgement */ +#define MDDRENABLE 0x0020 /* Mobile DDR Enable */ + #endif /* EBIU_SDGCTL */ #endif -- cgit From 36cd52a00794fb15ffab05d640acca92d7482993 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 7 Aug 2008 15:24:59 -0400 Subject: Blackfin: convert CMD_LINE_ADDR to CONFIG_LINUX_CMDLINE_{ADDR,SIZE} Signed-off-by: Mike Frysinger --- include/asm-blackfin/blackfin-config-post.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/blackfin-config-post.h b/include/asm-blackfin/blackfin-config-post.h index 0ab68ace75..936001aa7e 100644 --- a/include/asm-blackfin/blackfin-config-post.h +++ b/include/asm-blackfin/blackfin-config-post.h @@ -65,8 +65,11 @@ #endif /* Using L1 scratch pad makes sense for everyone by default. */ -#ifndef CMD_LINE_ADDR -# define CMD_LINE_ADDR L1_SRAM_SCRATCH +#ifndef CONFIG_LINUX_CMDLINE_ADDR +# define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH +#endif +#ifndef CONFIG_LINUX_CMDLINE_SIZE +# define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE #endif #endif -- cgit From d7ca7dd5bfc418ac173e9d2712f6cc2d8147a091 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 7 Aug 2008 13:22:37 -0400 Subject: Blackfin: set more sane default board config values Signed-off-by: Mike Frysinger --- include/asm-blackfin/blackfin-config-post.h | 77 ++++++++++++++++++++++++++--- 1 file changed, 71 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/blackfin-config-post.h b/include/asm-blackfin/blackfin-config-post.h index 936001aa7e..21abd724fb 100644 --- a/include/asm-blackfin/blackfin-config-post.h +++ b/include/asm-blackfin/blackfin-config-post.h @@ -1,7 +1,7 @@ /* * blackfin-config-post.h - setup common defines for Blackfin boards based on config.h * - * Copyright (c) 2007 Analog Devices Inc. + * Copyright (c) 2007-2008 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ @@ -9,11 +9,6 @@ #ifndef __ASM_BLACKFIN_CONFIG_POST_H__ #define __ASM_BLACKFIN_CONFIG_POST_H__ -/* Check to make sure everything fits in external RAM */ -#if ((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE) -# error Memory Map does not fit into configuration -#endif - /* Sanity check CONFIG_BFIN_CPU */ #ifndef CONFIG_BFIN_CPU # error CONFIG_BFIN_CPU: your board config needs to define this @@ -72,4 +67,74 @@ # define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE #endif +/* Default/common Blackfin memory layout */ +#ifndef CONFIG_SYS_SDRAM_BASE +# define CONFIG_SYS_SDRAM_BASE 0 +#endif +#ifndef CONFIG_SYS_MAX_RAM_SIZE +# define CONFIG_SYS_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024) +#endif +#ifndef CONFIG_SYS_MONITOR_BASE +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_MAX_RAM_SIZE - CONFIG_SYS_MONITOR_LEN) +#endif +#ifndef CONFIG_SYS_MALLOC_BASE +# define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) +#endif +#ifndef CONFIG_SYS_GBL_DATA_SIZE +# define CONFIG_SYS_GBL_DATA_SIZE (128) +#endif +#ifndef CONFIG_SYS_GBL_DATA_ADDR +# define CONFIG_SYS_GBL_DATA_ADDR (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) +#endif +#ifndef CONFIG_STACKBASE +# define CONFIG_STACKBASE (CONFIG_SYS_GBL_DATA_ADDR - 4) +#endif +#ifndef CONFIG_SYS_MEMTEST_START +# define CONFIG_SYS_MEMTEST_START 0 +#endif +#ifndef CONFIG_SYS_MEMTEST_END +# define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 8192 + 4) +#endif + +/* Check to make sure everything fits in external RAM */ +#if ((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE) +# error Memory Map does not fit into configuration +#endif + +/* Default/common Blackfin environment settings */ +#ifndef CONFIG_LOADADDR +# define CONFIG_LOADADDR 0x1000000 +#endif +#ifndef CONFIG_SYS_LOAD_ADDR +# define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#endif +#ifndef CONFIG_SYS_BOOTM_LEN +# define CONFIG_SYS_BOOTM_LEN 0x4000000 +#endif +#ifndef CONFIG_SYS_PROMPT +# define CONFIG_SYS_PROMPT "bfin> " +#endif +#ifndef CONFIG_SYS_CBSIZE +# ifdef CONFIG_CMD_KGDB +# define CONFIG_SYS_CBSIZE 1024 +# else +# define CONFIG_SYS_CBSIZE 256 +# endif +#endif +#ifndef CONFIG_SYS_BARGSIZE +# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#endif +#ifndef CONFIG_SYS_PBSIZE +# define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#endif +#ifndef CONFIG_SYS_MAXARGS +# define CONFIG_SYS_MAXARGS 16 +#endif +#ifndef CONFIG_SYS_HZ +# define CONFIG_SYS_HZ 1000 +#endif +#ifndef CONFIG_SYS_BAUDRATE_TABLE +# define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#endif + #endif -- cgit From 05b75e48832fc4afeecf8e76d704349557dffa35 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 6 Oct 2008 03:35:44 -0400 Subject: Blackfin: fix dcache handling when doing dma memcpy's Our dcache invalidate function doesn't just invalidate, it also flushes. So rename the function accordingly and fix the dma_memcpy() function so it doesn't inadvertently corrupt the data destination. Signed-off-by: Mike Frysinger --- include/asm-blackfin/blackfin_local.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-blackfin/blackfin_local.h b/include/asm-blackfin/blackfin_local.h index 6f0e662a95..c9ee91a439 100644 --- a/include/asm-blackfin/blackfin_local.h +++ b/include/asm-blackfin/blackfin_local.h @@ -58,7 +58,7 @@ extern u_long get_sclk(void); extern void blackfin_icache_flush_range(const void *, const void *); extern void blackfin_dcache_flush_range(const void *, const void *); -extern void blackfin_dcache_invalidate_range(const void *, const void *); +extern void blackfin_dcache_flush_invalidate_range(const void *, const void *); /* Use DMA to move data from on chip to external memory. While this is * required for only L1 instruction (it is not directly readable by the -- cgit From 01815c2d06c5b838f2cd536703e47bd2c9148194 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 6 Oct 2008 03:52:24 -0400 Subject: Blackfin: implement general support for CONFIG_STATUS_LED Here are the Blackfin-specific and board-independent pieces for status leds. Signed-off-by: Mike Frysinger --- include/status_led.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/status_led.h b/include/status_led.h index 79be698850..175972a052 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -346,6 +346,9 @@ void status_led_set (int led, int state); #elif defined(CONFIG_NIOS2) /* XXX empty just to avoid the error */ /************************************************************************/ +#elif defined(CONFIG_BLACKFIN) +/* XXX empty just to avoid the error */ +/************************************************************************/ #elif defined(CONFIG_V38B) # define STATUS_LED_BIT 0x0010 /* Timer7 GPIO */ -- cgit From be853bf86b41e91f4c422f0f56fdf87ea3191266 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 6 Oct 2008 04:16:47 -0400 Subject: Blackfin: overhaul i2c driver The current Blackfin i2c driver does not work properly with certain devices due to it breaking up transfers incorrectly. This is a rewrite of the driver and relocates it to the newer place in the source tree. Also remove duplicated I2C speed defines in Blackfin board configs and disable I2C slave address usage since it isn't implemented. Signed-off-by: Mike Frysinger --- include/configs/bf533-ezkit.h | 2 +- include/configs/bf533-stamp.h | 2 +- include/configs/bf537-stamp.h | 43 ++++--------------------------------------- 3 files changed, 6 insertions(+), 41 deletions(-) (limited to 'include') diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h index e871737177..48c0252e46 100644 --- a/include/configs/bf533-ezkit.h +++ b/include/configs/bf533-ezkit.h @@ -198,7 +198,7 @@ #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ #define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_SLAVE 0 #define CONFIG_SYS_BOOTM_LEN 0x4000000 /* Large Image Length, set to 64 Meg */ diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index 5ad99a2fd4..ee41c7e78f 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -300,7 +300,7 @@ #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ #define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_SLAVE 0 #endif /* CONFIG_SOFT_I2C */ /* diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index ac5aaa59ae..27567faab2 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -305,13 +305,11 @@ /* * I2C settings - * By default PF1 is used as SDA and PF0 as SCL on the Stamp board */ -/* #define CONFIG_SOFT_I2C 1*/ /* I2C bit-banged */ -#define CONFIG_HARD_I2C 1 /* I2C TWI */ -#if defined CONFIG_HARD_I2C -#define CONFIG_TWICLK_KHZ 50 -#endif +#define CONFIG_HARD_I2C 1 +#define CONFIG_BFIN_TWI_I2C 1 +#define CFG_I2C_SPEED 50000 +#define CFG_I2C_SLAVE 0 #define CONFIG_EBIU_SDRRC_VAL 0x306 #define CONFIG_EBIU_SDGCTL_VAL 0x91114d @@ -321,39 +319,6 @@ #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 -#if defined CONFIG_SOFT_I2C -/* - * Software (bit-bang) I2C driver configuration - */ -#define PF_SCL PF0 -#define PF_SDA PF1 - -#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;") -#define I2C_ACTIVE (*pFIO_DIR |= PF_SDA); *pFIO_INEN &= ~PF_SDA; asm("ssync;") -#define I2C_TRISTATE (*pFIO_DIR &= ~PF_SDA); *pFIO_INEN |= PF_SDA; asm("ssync;") -#define I2C_READ ((volatile)(*pFIO_FLAG_D & PF_SDA) != 0); asm("ssync;") -#define I2C_SDA(bit) if(bit) { \ - *pFIO_FLAG_S = PF_SDA; \ - asm("ssync;"); \ - } \ - else { \ - *pFIO_FLAG_C = PF_SDA; \ - asm("ssync;"); \ - } -#define I2C_SCL(bit) if(bit) { \ - *pFIO_FLAG_S = PF_SCL; \ - asm("ssync;"); \ - } \ - else { \ - *pFIO_FLAG_C = PF_SCL; \ - asm("ssync;"); \ - } -#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ -#endif - -#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0xFE - /* 0xFF, 0x7BB07BB0, 0x22547BB0 */ /* #define AMGCTLVAL (AMBEN_P0 | AMBEN_P1 | AMBEN_P2 | AMCKEN) #define AMBCTL0VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B1TT_4 | ~B1RDYPOL | \ -- cgit From 36ea8e9ad1107af12d244bba8c73e85b9f655e45 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 11 Oct 2008 21:51:20 -0400 Subject: Blackfin: support console-over-JTAG The Blackfin JTAG has the ability to pass data via a back-channel without halting the processor. Utilize that channel to emulate a console. Signed-off-by: Mike Frysinger --- include/devices.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/devices.h b/include/devices.h index 20ddfc4342..84c4514880 100644 --- a/include/devices.h +++ b/include/devices.h @@ -116,5 +116,8 @@ int drv_usbtty_init (void); #ifdef CONFIG_NETCONSOLE int drv_nc_init (void); #endif +#ifdef CONFIG_JTAG_CONSOLE +int drv_jtag_console_init (void); +#endif #endif /* _DEVICES_H_ */ -- cgit From 9372c3214808fab545227d8d0f76b3bfcc6760ec Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 11 Oct 2008 22:04:05 -0400 Subject: Blackfin: update on-chip ROM API This brings the API for the on-chip ROM in line with the toolchain and hardware documentation. Signed-off-by: Mike Frysinger --- include/asm-blackfin/mach-common/bits/bootrom.h | 63 +++++++++++++------------ include/asm-blackfin/mach-common/bits/otp.h | 21 ++++----- 2 files changed, 44 insertions(+), 40 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-common/bits/bootrom.h b/include/asm-blackfin/mach-common/bits/bootrom.h index bf661f0c10..fb97ff81b3 100644 --- a/include/asm-blackfin/mach-common/bits/bootrom.h +++ b/include/asm-blackfin/mach-common/bits/bootrom.h @@ -92,14 +92,6 @@ #define BOOTROM_CAPS_ADI_BOOT_STRUCTS 1 -/* Not available on initial BF54x or BF52x */ -#if (defined(__ADSPBF54x__) && __SILICON_REVISION__ < 1) || \ - (defined(__ADSPBF52x__) && __SILICON_REVISION__ < 2) -#define BOOTROM_CAPS_SYSCONTROL 0 -#else -#define BOOTROM_CAPS_SYSCONTROL 1 -#endif - #endif #ifndef BOOTROM_FOLLOWS_C_ABI @@ -108,9 +100,21 @@ #ifndef BOOTROM_CAPS_ADI_BOOT_STRUCTS #define BOOTROM_CAPS_ADI_BOOT_STRUCTS 0 #endif -#ifndef BOOTROM_CAPS_SYSCONTROL -#define BOOTROM_CAPS_SYSCONTROL 0 -#endif + +/* Possible syscontrol action flags */ +#define SYSCTRL_READ 0x00000000 /* read registers */ +#define SYSCTRL_WRITE 0x00000001 /* write registers */ +#define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */ +#define SYSCTRL_CORERESET 0x00000004 /* perform core reset */ +#define SYSCTRL_SOFTRESET 0x00000006 /* perform core and system reset */ +#define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */ +#define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */ +#define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */ +#define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */ +#define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */ +#define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */ +#define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */ +#define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */ #ifndef __ASSEMBLY__ @@ -132,25 +136,26 @@ typedef struct ADI_SYSCTRL_VALUES { #ifndef _BOOTROM_SYSCONTROL #define _BOOTROM_SYSCONTROL 0 #endif -static uint32_t (* const syscontrol)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)_BOOTROM_SYSCONTROL; +static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)_BOOTROM_SYSCONTROL; -#endif /* __ASSEMBLY__ */ - -/* Possible syscontrol action flags */ -#define SYSCTRL_READ 0x00000000 /* read registers */ -#define SYSCTRL_WRITE 0x00000001 /* write registers */ -#define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */ -#define SYSCTRL_SOFTRESET 0x00000004 /* perform core and system reset */ -#define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */ -#define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */ -#define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */ -#define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */ -#define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */ -#define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */ -#define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */ -#define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */ - -#ifndef __ASSEMBLY__ +/* We need a dedicated function since we need to screw with the stack pointer + * when resetting. The on-chip ROM will save/restore registers on the stack + * when doing a system reset, so the stack cannot be outside of the chip. + */ +__attribute__((__noreturn__)) +static inline void bfrom_SoftReset(void *new_stack) +{ + while (1) + __asm__ __volatile__( + "sp = %[stack];" + "jump (%[bfrom_syscontrol]);" + : : [bfrom_syscontrol] "p"(bfrom_SysControl), + "q0"(SYSCTRL_SOFTRESET), + "q1"(0), + "q2"(NULL), + [stack] "p"(new_stack) + ); +} /* Structures for working with LDRs and boot rom callbacks */ typedef struct ADI_BOOT_HEADER { diff --git a/include/asm-blackfin/mach-common/bits/otp.h b/include/asm-blackfin/mach-common/bits/otp.h index d529a0a982..4e3f1afcfa 100644 --- a/include/asm-blackfin/mach-common/bits/otp.h +++ b/include/asm-blackfin/mach-common/bits/otp.h @@ -9,23 +9,22 @@ #include "bootrom.h" -static uint32_t (* const otp_command)(uint32_t command, uint32_t value) = (void *)_BOOTROM_OTP_COMMAND; -static uint32_t (* const otp_read)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)_BOOTROM_OTP_READ; -static uint32_t (* const otp_write)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)_BOOTROM_OTP_WRITE; +static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)_BOOTROM_OTP_COMMAND; +static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)_BOOTROM_OTP_READ; +static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)_BOOTROM_OTP_WRITE; #endif /* otp_command(): defines for "command" */ -#define OTP_INIT 0x00000001 -#define OTP_CLOSE 0x00000002 +#define OTP_INIT 0x00000001 +#define OTP_CLOSE 0x00000002 /* otp_{read,write}(): defines for "flags" */ -#define OTP_LOWER_HALF 0x00000000 /* select upper/lower 64-bit half (bit 0) */ -#define OTP_UPPER_HALF 0x00000001 -#define OTP_NO_ECC 0x00000010 /* do not use ECC */ -#define OTP_LOCK 0x00000020 /* sets page protection bit for page */ -#define OTP_ACCESS_READ 0x00001000 -#define OTP_ACCESS_READWRITE 0x00002000 +#define OTP_LOWER_HALF 0x00000000 /* select upper/lower 64-bit half (bit 0) */ +#define OTP_UPPER_HALF 0x00000001 +#define OTP_NO_ECC 0x00000010 /* do not use ECC */ +#define OTP_LOCK 0x00000020 /* sets page protection bit for page */ +#define OTP_CHECK_FOR_PREV_WRITE 0x00000080 /* Return values for all functions */ #define OTP_SUCCESS 0x00000000 -- cgit