From a3063eec775719b7e91023bbec3f64b3118791df Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 11 Oct 2007 00:18:48 -0500 Subject: Set OF_STDOUT_PATH to match the default console on MPC8568 MDS On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured console. Make it so we match that config what we tell Linux as the early STDOUT console. Signed-off-by: Kumar Gala --- include/configs/MPC8568MDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ba744e99f8..548e1582a8 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -297,7 +297,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8568@e0000000" #define OF_QE "qe@e0080000" #define OF_TBCLK (bd->bi_busfreq / 8) -#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4600" +#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4500" /* * I2C -- cgit From 7600d47b8f6a10019e537dc9a62aa1498df58d25 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 11 Oct 2007 00:29:18 -0500 Subject: Improve handling of PCI interrupt device tree fixup on MPC85xx CDS On the MPC85xx CDS we have two issues: 1. The device tree fixup code did not check to see if the property we are trying to update is actually found. Its possible that it would update random memory starting at 0. 2. Newer Linux kernel's have moved the location of the PCI nodes to be sibilings of the soc node and not children. The explicit PATH to the PCI node would not be found for these device trees. Add the ability to handle both paths. In the future we shouldn't handle such fixups by explicit path. Signed-off-by: Kumar Gala --- include/configs/MPC8541CDS.h | 1 + include/configs/MPC8548CDS.h | 1 + include/configs/MPC8555CDS.h | 1 + 3 files changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 4e061bd9ff..8dda6651ef 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8541@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8541@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 6083715189..4edc7fd2b6 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -340,6 +340,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8548@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 1d1b7c9079..c414bf033e 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8555@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8555@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C -- cgit From de9a738faa7c2f47286119c3bfebc3dfbfe7d86d Mon Sep 17 00:00:00 2001 From: Vlad Lungu Date: Sun, 21 Oct 2007 22:10:10 +0900 Subject: [MIPS] Fix UNCACHED_SDRAM PHYSADDR is for physical address, KSEG1ADDR is for uncached. Signed-off-by: Vlad Lungu Signed-off-by: Shinya Kuribayashi --- include/asm-mips/addrspace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index b8214b1c85..0e6abd7d0f 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -49,7 +49,7 @@ cannot access physical memory directly from core */ #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) #else /* !CONFIG_AU1X00 */ -#define UNCACHED_SDRAM(a) PHYSADDR(a) +#define UNCACHED_SDRAM(a) KSEG1ADDR(a) #endif /* CONFIG_AU1X00 */ #endif /* __ASSEMBLY__ */ /* -- cgit From 1a0ce20aa4cb4e3068da04e7290ee9986fd0b834 Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Wed, 24 Oct 2007 08:42:25 +0200 Subject: TQM5200: fix spurious characters on second serial interface With this patch PSC3 is configured as UART. This is done, because if the pins of PSC3 are not configured at all (-> all pins are GPI), due to crosstalk, spurious characters may be send over the RX232_2_TXD signal line. Signed-off-by: Martin Krause Signed-off-by: Grant Likely --- include/configs/TQM5200.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index d55340404d..c3f16f524e 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -547,7 +547,7 @@ # if defined (CONFIG_TQM5200_REV100) # error TQM5200 REV100 not supported on STK52XX REV200 or above # else/* TQM5200 REV200 and above */ -# define CFG_GPS_PORT_CONFIG 0x91500004 +# define CFG_GPS_PORT_CONFIG 0x91500404 # endif # endif #elif defined (CONFIG_FO300) -- cgit From 2acefa72ee0026f862ab65597ca687428f63a973 Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:09:17 -0500 Subject: ColdFire 5282: Fix external flash boot and return dramsize Signed-off-by: TsiChungLiew --- include/configs/M5282EVB.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 3c17c1ea14..7bb9f60f76 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -163,7 +163,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CFG_FLASH_BASE 0xffe00000 #define CFG_INT_FLASH_BASE 0xf0000000 #define CFG_INT_FLASH_ENABLE 0x21 -- cgit From 95e9f2c212a65610b2e59a5c00d0113383a4da0b Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:10:23 -0500 Subject: ColdFire 5253: Assign correct SDRAM size Signed-off-by: TsiChungLiew --- include/configs/M5253EVBE.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 48170e7a35..f5e1b646ca 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -146,7 +146,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ #ifdef CONFIG_MONITOR_IS_IN_RAM #define CFG_MONITOR_BASE 0x20000 -- cgit From c67e12e705b204cfe914e3e3e693d69a445dcabf Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:12:36 -0500 Subject: ColdFire 5329: Assign correct SDRAM size and fix cache Signed-off-by: TsiChungLiew --- include/configs/M5329EVB.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d3b160505b..47d74a3c37 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -175,7 +175,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x40000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 32 /* SDRAM size in MB */ #define CFG_SDRAM_CFG1 0x53722730 #define CFG_SDRAM_CFG2 0x56670000 #define CFG_SDRAM_CTRL 0xE1092000 -- cgit From e8ee8f3ade2a06c1893dd5e68f223070d650c7ed Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:16:22 -0500 Subject: ColdFire 54455: Fix correct boot location for atmel and intel Signed-off-by: TsiChungLiew --- include/configs/M54455EVB.h | 36 ++++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 6f4859c238..ba050cb7e4 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -27,8 +27,8 @@ * board/config.h - configuration options, board specific */ -#ifndef _JAMICA54455_H -#define _JAMICA54455_H +#ifndef _M54455EVB_H +#define _M54455EVB_H /* * High Level Configuration Options @@ -75,7 +75,7 @@ #define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_NET -#define CONFIG_CMD_PCI +#undef CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO @@ -129,8 +129,8 @@ "u-boot=u-boot.bin\0" \ "load=tftp ${loadaddr) ${u-boot}\0" \ "upd=run load; run prog\0" \ - "prog=prot off 0 2ffff;" \ - "era 0 2ffff;" \ + "prog=prot off 4000000 402ffff;" \ + "era 4000000 402ffff;" \ "cp.b ${loadaddr} 0 ${filesize};" \ "save\0" \ "" @@ -174,6 +174,7 @@ #define CFG_IMMR CFG_MBAR /* PCI */ +#ifdef CONFIG_CMD_PCI #define CONFIG_PCI 1 #define CFG_PCI_MEM_BUS 0xA0000000 @@ -187,6 +188,7 @@ #define CFG_PCI_CFG_BUS 0xB0000000 #define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS #define CFG_PCI_CFG_SIZE 0x01000000 +#endif /* FPGA - Spartan 2 */ /* experiment @@ -268,8 +270,6 @@ /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ -#define CFG_ENV_OFFSET 0x4000 -#define CFG_ENV_SECT_SIZE 0x2000 #define CFG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_OVERWRITE 1 #undef CFG_ENV_IS_EMBEDDED @@ -278,13 +278,17 @@ * FLASH organization */ #ifdef CFG_ATMEL_BOOT -# define CFG_FLASH_BASE 0 +# define CFG_FLASH_BASE CFG_CS0_BASE # define CFG_FLASH0_BASE CFG_CS0_BASE # define CFG_FLASH1_BASE CFG_CS1_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) +# define CFG_ENV_SECT_SIZE 0x2000 #else # define CFG_FLASH_BASE CFG_FLASH0_BASE # define CFG_FLASH0_BASE CFG_CS1_BASE # define CFG_FLASH1_BASE CFG_CS0_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000) +# define CFG_ENV_SECT_SIZE 0x20000 #endif /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system @@ -328,9 +332,9 @@ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. */ #ifdef CFG_ATMEL_BOOT -# define CONFIG_JFFS2_DEV "nor0" +# define CONFIG_JFFS2_DEV "nor1" # define CONFIG_JFFS2_PART_SIZE 0x01000000 -# define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE +# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH1_BASE + 0x500000) #else # define CONFIG_JFFS2_DEV "nor0" # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000) @@ -356,20 +360,20 @@ #ifdef CFG_ATMEL_BOOT /* Atmel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x04000000 #define CFG_CS0_MASK 0x00070001 #define CFG_CS0_CTRL 0x00001140 /* Intel Flash */ -#define CFG_CS1_BASE 0x04000000 +#define CFG_CS1_BASE 0x00000000 #define CFG_CS1_MASK 0x01FF0001 -#define CFG_CS1_CTRL 0x003F3D60 +#define CFG_CS1_CTRL 0x00000D60 #define CFG_ATMEL_BASE CFG_CS0_BASE #else /* Intel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x00000000 #define CFG_CS0_MASK 0x01FF0001 -#define CFG_CS0_CTRL 0x003F3D60 +#define CFG_CS0_CTRL 0x00000D60 /* Atmel Flash */ #define CFG_CS1_BASE 0x04000000 #define CFG_CS1_MASK 0x00070001 @@ -388,4 +392,4 @@ #define CFG_CS3_MASK 0x00070001 #define CFG_CS3_CTRL 0x00000020 -#endif /* _JAMICA54455_H */ +#endif /* _M54455EVB_H */ -- cgit From 8b6684a698500be9c142ec2c9f46cfc348e17f0c Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Wed, 24 Oct 2007 15:48:37 +0200 Subject: ATSTK1002: Remove default ethernet addresses Wolfgang is right: It's not a good idea to set up default initial ethernet addresses for a board, even though they belong to the local range. This will change the failure mode from "IT manager screams at you for using duplicate ethernet addresses" to a nice error message explaining that the ethernet address hasn't been set properly. Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 1809fc5d86..b33e26fe01 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -114,15 +114,10 @@ #define CONFIG_AUTOBOOT_STOP_STR " " /* - * These are "locally administered ethernet addresses" generated by - * ./tools/gen_eth_addr - * - * After booting the board for the first time, new addresses should be - * generated and assigned to the environment variables "ethaddr" and - * "eth1addr". + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. */ -#define CONFIG_ETHADDR 6a:87:71:14:cd:cb -#define CONFIG_ETH1ADDR ca:f8:15:e6:3e:e6 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 #define CONFIG_NET_MULTI 1 -- cgit