From 0a42a132a4b846031df2c4a7d04692240ed34843 Mon Sep 17 00:00:00 2001 From: Tien Fong Chee Date: Tue, 7 May 2019 17:42:28 +0800 Subject: ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading Add FPGA driver to support program FPGA with FPGA bitstream loading from filesystem. The driver are designed based on generic firmware loader framework. The driver can handle FPGA program operation from loading FPGA bitstream in flash to memory and then to program FPGA. Signed-off-by: Tien Fong Chee --- include/image.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/image.h b/include/image.h index bfe4e0b5e7..bb7089ef5d 100644 --- a/include/image.h +++ b/include/image.h @@ -1046,6 +1046,10 @@ int fit_check_format(const void *fit); int fit_conf_find_compat(const void *fit, const void *fdt); int fit_conf_get_node(const void *fit, const char *conf_uname); +int fit_conf_get_prop_node_count(const void *fit, int noffset, + const char *prop_name); +int fit_conf_get_prop_node_index(const void *fit, int noffset, + const char *prop_name, int index); /** * fit_conf_get_prop_node() - Get node refered to by a configuration -- cgit From da0d5f6f731d44b66eb645920f7a9e6735b490cf Mon Sep 17 00:00:00 2001 From: Tien Fong Chee Date: Tue, 7 May 2019 17:42:32 +0800 Subject: ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL Increasing Malloc pool size up to 0x15000 is required to support FAT in SPL . The result of calculation is come from default max cluster(0x10000) + others(0x2000) + additional memory for headroom(0x3000). Signed-off-by: Tien Fong Chee --- include/configs/socfpga_arria10_socdk.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index 92630c5e6e..645e66e6b0 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2015-2017 Altera Corporation + * Copyright (C) 2015-2019 Altera Corporation */ #ifndef __CONFIG_SOCFGPA_ARRIA10_H__ @@ -36,6 +36,9 @@ */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 +/* SPL memory allocation configuration, this is for FAT implementation */ +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000 + /* The rest of the configuration is shared */ #include -- cgit