From 7e6ee7ad27de5216db1baef76f38c3429c8f4a2a Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Wed, 19 Nov 2008 16:32:36 +0100 Subject: UBI: Add basic UBI support to U-Boot (Part 6/8) This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park Signed-off-by: Stefan Roese --- include/exports.h | 1 + include/jffs2/load_kernel.h | 5 + include/linux/crc32.h | 27 +++++ include/linux/mtd/partitions.h | 84 ++++++++++++++++ include/linux/types.h | 24 +++++ include/ubi_uboot.h | 217 +++++++++++++++++++++++++++++++++++++++++ 6 files changed, 358 insertions(+) create mode 100644 include/linux/crc32.h create mode 100644 include/linux/mtd/partitions.h create mode 100644 include/ubi_uboot.h (limited to 'include') diff --git a/include/exports.h b/include/exports.h index 6377875bc9..0620e9eb89 100644 --- a/include/exports.h +++ b/include/exports.h @@ -25,6 +25,7 @@ char *getenv (char *name); int setenv (char *varname, char *varvalue); long simple_strtol(const char *cp,char **endp,unsigned int base); int strcmp(const char * cs,const char * ct); +int ustrtoul(const char *cp, char **endp, unsigned int base); #ifdef CONFIG_HAS_UID void forceenv (char *varname, char *varvalue); #endif diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h index 551fd0c442..e9b7d6e7c9 100644 --- a/include/jffs2/load_kernel.h +++ b/include/jffs2/load_kernel.h @@ -73,4 +73,9 @@ struct mtdids { #define putLabeledWord(x, y) printf("%s %08x\n", x, (unsigned int)y) #define led_blink(x, y, z, a) +/* common/cmd_jffs2.c */ +extern int mtdparts_init(void); +extern int find_dev_and_part(const char *id, struct mtd_device **dev, + u8 *part_num, struct part_info **part); + #endif /* load_kernel_h */ diff --git a/include/linux/crc32.h b/include/linux/crc32.h new file mode 100644 index 0000000000..e1331571e1 --- /dev/null +++ b/include/linux/crc32.h @@ -0,0 +1,27 @@ +/* + * crc32.h + * See linux/lib/crc32.c for license and changes + */ +#ifndef _LINUX_CRC32_H +#define _LINUX_CRC32_H + +#include +//#include + +extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); +//extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); + +#define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)data, length) + +/* + * Helpers for hash table generation of ethernet nics: + * + * Ethernet sends the least significant bit of a byte first, thus crc32_le + * is used. The output of crc32_le is bit reversed [most significant bit + * is in bit nr 0], thus it must be reversed before use. Except for + * nics that bit swap the result internally... + */ +//#define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) +//#define ether_crc_le(length, data) crc32_le(~0, data, length) + +#endif /* _LINUX_CRC32_H */ diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h new file mode 100644 index 0000000000..b41e5f564c --- /dev/null +++ b/include/linux/mtd/partitions.h @@ -0,0 +1,84 @@ +/* + * MTD partitioning layer definitions + * + * (C) 2000 Nicolas Pitre + * + * This code is GPL + * + * $Id: partitions.h,v 1.17 2005/11/07 11:14:55 gleixner Exp $ + */ + +#ifndef MTD_PARTITIONS_H +#define MTD_PARTITIONS_H + +#include + + +/* + * Partition definition structure: + * + * An array of struct partition is passed along with a MTD object to + * add_mtd_partitions() to create them. + * + * For each partition, these fields are available: + * name: string that will be used to label the partition's MTD device. + * size: the partition size; if defined as MTDPART_SIZ_FULL, the partition + * will extend to the end of the master MTD device. + * offset: absolute starting position within the master MTD device; if + * defined as MTDPART_OFS_APPEND, the partition will start where the + * previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block. + * mask_flags: contains flags that have to be masked (removed) from the + * master MTD flag set for the corresponding MTD partition. + * For example, to force a read-only partition, simply adding + * MTD_WRITEABLE to the mask_flags will do the trick. + * + * Note: writeable partitions require their size and offset be + * erasesize aligned (e.g. use MTDPART_OFS_NEXTBLK). + */ + +struct mtd_partition { + char *name; /* identifier string */ + u_int32_t size; /* partition size */ + u_int32_t offset; /* offset within the master MTD space */ + u_int32_t mask_flags; /* master MTD flags to mask out for this partition */ + struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only)*/ + struct mtd_info **mtdp; /* pointer to store the MTD object */ +}; + +#define MTDPART_OFS_NXTBLK (-2) +#define MTDPART_OFS_APPEND (-1) +#define MTDPART_SIZ_FULL (0) + + +int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int); +int del_mtd_partitions(struct mtd_info *); + +#if 0 +/* + * Functions dealing with the various ways of partitioning the space + */ + +struct mtd_part_parser { + struct list_head list; + struct module *owner; + const char *name; + int (*parse_fn)(struct mtd_info *, struct mtd_partition **, unsigned long); +}; + +extern int register_mtd_parser(struct mtd_part_parser *parser); +extern int deregister_mtd_parser(struct mtd_part_parser *parser); +extern int parse_mtd_partitions(struct mtd_info *master, const char **types, + struct mtd_partition **pparts, unsigned long origin); + +#define put_partition_parser(p) do { module_put((p)->owner); } while(0) + +struct device; +struct device_node; + +int __devinit of_mtd_parse_partitions(struct device *dev, + struct mtd_info *mtd, + struct device_node *node, + struct mtd_partition **pparts); +#endif + +#endif diff --git a/include/linux/types.h b/include/linux/types.h index df4808fcdf..1b0b4a44c4 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -119,6 +119,30 @@ typedef __s64 int64_t; * Below are truly Linux-specific types that should never collide with * any application/library that wants linux/types.h. */ +#ifdef __CHECKER__ +#define __bitwise__ __attribute__((bitwise)) +#else +#define __bitwise__ +#endif +#ifdef __CHECK_ENDIAN__ +#define __bitwise __bitwise__ +#else +#define __bitwise +#endif + +typedef __u16 __bitwise __le16; +typedef __u16 __bitwise __be16; +typedef __u32 __bitwise __le32; +typedef __u32 __bitwise __be32; +#if defined(__GNUC__) +typedef __u64 __bitwise __le64; +typedef __u64 __bitwise __be64; +#endif +typedef __u16 __bitwise __sum16; +typedef __u32 __bitwise __wsum; + + +typedef unsigned __bitwise__ gfp_t; struct ustat { __kernel_daddr_t f_tfree; diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h new file mode 100644 index 0000000000..295f2c0ffc --- /dev/null +++ b/include/ubi_uboot.h @@ -0,0 +1,217 @@ +/* + * Header file for UBI support for U-Boot + * + * Adaptation from kernel to U-Boot + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __UBOOT_UBI_H +#define __UBOOT_UBI_H + +#include +#include +#include +#include +#include + +#ifdef CONFIG_CMD_ONENAND +#include +#endif + +#include + +#define DPRINTK(format, args...) \ +do { \ + printf("%s[%d]: " format "\n", __func__, __LINE__, ##args); \ +} while (0) + +/* configurable */ +#define CONFIG_MTD_UBI_WL_THRESHOLD 4096 +#define CONFIG_MTD_UBI_BEB_RESERVE 1 +#define UBI_IO_DEBUG 0 + +/* debug options (Linux: drivers/mtd/ubi/Kconfig.debug) */ +#undef CONFIG_MTD_UBI_DEBUG +#undef CONFIG_MTD_UBI_DEBUG_PARANOID +#undef CONFIG_MTD_UBI_DEBUG_MSG +#undef CONFIG_MTD_UBI_DEBUG_MSG_EBA +#undef CONFIG_MTD_UBI_DEBUG_MSG_WL +#undef CONFIG_MTD_UBI_DEBUG_MSG_IO +#undef CONFIG_MTD_UBI_DEBUG_MSG_BLD +#define CONFIG_MTD_UBI_DEBUG_DISABLE_BGT + +/* compiler options */ +#define uninitialized_var(x) x = x + +/* build.c */ +#define get_device(...) +#define put_device(...) +#define ubi_sysfs_init(...) 0 +#define ubi_sysfs_close(...) do { } while (0) +static inline int is_power_of_2(unsigned long n) +{ + return (n != 0 && ((n & (n - 1)) == 0)); +} + +/* FIXME */ +#define MKDEV(...) 0 +#define MAJOR(dev) 0 +#define MINOR(dev) 0 + +#define alloc_chrdev_region(...) 0 +#define unregister_chrdev_region(...) + +#define class_create(...) __builtin_return_address(0) +#define class_create_file(...) 0 +#define class_remove_file(...) +#define class_destroy(...) +#define misc_register(...) 0 +#define misc_deregister(...) + +/* vmt.c */ +#define device_register(...) 0 +#define volume_sysfs_init(...) 0 +#define volume_sysfs_close(...) do { } while (0) + +/* kapi.c */ + +/* eba.c */ + +/* io.c */ +#define init_waitqueue_head(...) do { } while (0) +#define wait_event_interruptible(...) 0 +#define wake_up_interruptible(...) do { } while (0) +#define print_hex_dump(...) do { } while (0) +#define dump_stack(...) do { } while (0) + +/* wl.c */ +#define task_pid_nr(x) 0 +#define set_freezable(...) do { } while (0) +#define try_to_freeze(...) 0 +#define set_current_state(...) do { } while (0) +#define kthread_should_stop(...) 0 +#define schedule() do { } while (0) + +/* upd.c */ +static inline unsigned long copy_from_user(void *dest, const void *src, + unsigned long count) +{ + memcpy((void *)dest, (void *)src, count); + return 0; +} + +/* common */ +typedef int spinlock_t; +typedef int wait_queue_head_t; +#define spin_lock_init(...) +#define spin_lock(...) +#define spin_unlock(...) + +#define mutex_init(...) +#define mutex_lock(...) +#define mutex_unlock(...) + +#define init_rwsem(...) do { } while (0) +#define down_read(...) do { } while (0) +#define down_write(...) do { } while (0) +#define down_write_trylock(...) 0 +#define up_read(...) do { } while (0) +#define up_write(...) do { } while (0) + +struct kmem_cache { int i; }; +#define kmem_cache_create(...) 1 +#define kmem_cache_alloc(obj, gfp) malloc(sizeof(struct ubi_wl_entry)) +#define kmem_cache_free(obj, size) free(size) +#define kmem_cache_destroy(...) + +#define cond_resched() do { } while (0) +#define yield() do { } while (0) + +#define KERN_WARNING +#define KERN_ERR +#define KERN_NOTICE +#define KERN_DEBUG + +#define GFP_KERNEL 0 +#define GFP_NOFS 1 + +#define __user +#define __init +#define __exit + +#define kthread_create(...) __builtin_return_address(0) +#define kthread_stop(...) do { } while (0) +#define wake_up_process(...) do { } while (0) + +#define BUS_ID_SIZE 20 + +struct rw_semaphore { int i; }; +struct device { + struct device *parent; + struct class *class; + char bus_id[BUS_ID_SIZE]; /* position on parent bus */ + dev_t devt; /* dev_t, creates the sysfs "dev" */ + void (*release)(struct device *dev); +}; +struct mutex { int i; }; +struct kernel_param { int i; }; + +struct cdev { + int owner; + dev_t dev; +}; +#define cdev_init(...) do { } while (0) +#define cdev_add(...) 0 +#define cdev_del(...) do { } while (0) + +#define MAX_ERRNO 4095 +#define IS_ERR_VALUE(x) ((x) >= (unsigned long)-MAX_ERRNO) + +static inline void *ERR_PTR(long error) +{ + return (void *) error; +} + +static inline long PTR_ERR(const void *ptr) +{ + return (long) ptr; +} + +static inline long IS_ERR(const void *ptr) +{ + return IS_ERR_VALUE((unsigned long)ptr); +} + +/* Force a compilation error if condition is true */ +#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) + +/* module */ +#define THIS_MODULE 0 +#define try_module_get(...) 0 +#define module_put(...) do { } while (0) +#define module_init(...) +#define module_exit(...) +#define EXPORT_SYMBOL(...) +#define EXPORT_SYMBOL_GPL(...) +#define module_param_call(...) +#define MODULE_PARM_DESC(...) +#define MODULE_VERSION(...) +#define MODULE_DESCRIPTION(...) +#define MODULE_AUTHOR(...) +#define MODULE_LICENSE(...) + +#include "../drivers/mtd/ubi/ubi.h" + +/* functions */ +extern int ubi_mtd_param_parse(const char *val, struct kernel_param *kp); +extern int ubi_init(void); + +extern struct ubi_device *ubi_devices[]; + +#endif -- cgit From 47ae6693f54f80455ae32c2e0d995e0e4bdc15b9 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Wed, 19 Nov 2008 16:36:36 +0100 Subject: UBI: Add basic UBI support to U-Boot (Part 7/8) This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park Signed-off-by: Stefan Roese --- include/linux/mtd/ubi.h | 186 +++++++++++++++++++++++++++++++++ include/mtd/ubi-user.h | 268 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 454 insertions(+) create mode 100644 include/linux/mtd/ubi.h create mode 100644 include/mtd/ubi-user.h (limited to 'include') diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h new file mode 100644 index 0000000000..a017891acf --- /dev/null +++ b/include/linux/mtd/ubi.h @@ -0,0 +1,186 @@ +/* + * Copyright (c) International Business Machines Corp., 2006 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + * the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Author: Artem Bityutskiy (Битюцкий Артём) + */ + +#ifndef __LINUX_UBI_H__ +#define __LINUX_UBI_H__ + +//#include +#include +#include + +/* + * enum ubi_open_mode - UBI volume open mode constants. + * + * UBI_READONLY: read-only mode + * UBI_READWRITE: read-write mode + * UBI_EXCLUSIVE: exclusive mode + */ +enum { + UBI_READONLY = 1, + UBI_READWRITE, + UBI_EXCLUSIVE +}; + +/** + * struct ubi_volume_info - UBI volume description data structure. + * @vol_id: volume ID + * @ubi_num: UBI device number this volume belongs to + * @size: how many physical eraseblocks are reserved for this volume + * @used_bytes: how many bytes of data this volume contains + * @used_ebs: how many physical eraseblocks of this volume actually contain any + * data + * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) + * @corrupted: non-zero if the volume is corrupted (static volumes only) + * @upd_marker: non-zero if the volume has update marker set + * @alignment: volume alignment + * @usable_leb_size: how many bytes are available in logical eraseblocks of + * this volume + * @name_len: volume name length + * @name: volume name + * @cdev: UBI volume character device major and minor numbers + * + * The @corrupted flag is only relevant to static volumes and is always zero + * for dynamic ones. This is because UBI does not care about dynamic volume + * data protection and only cares about protecting static volume data. + * + * The @upd_marker flag is set if the volume update operation was interrupted. + * Before touching the volume data during the update operation, UBI first sets + * the update marker flag for this volume. If the volume update operation was + * further interrupted, the update marker indicates this. If the update marker + * is set, the contents of the volume is certainly damaged and a new volume + * update operation has to be started. + * + * To put it differently, @corrupted and @upd_marker fields have different + * semantics: + * o the @corrupted flag means that this static volume is corrupted for some + * reasons, but not because an interrupted volume update + * o the @upd_marker field means that the volume is damaged because of an + * interrupted update operation. + * + * I.e., the @corrupted flag is never set if the @upd_marker flag is set. + * + * The @used_bytes and @used_ebs fields are only really needed for static + * volumes and contain the number of bytes stored in this static volume and how + * many eraseblock this data occupies. In case of dynamic volumes, the + * @used_bytes field is equivalent to @size*@usable_leb_size, and the @used_ebs + * field is equivalent to @size. + * + * In general, logical eraseblock size is a property of the UBI device, not + * of the UBI volume. Indeed, the logical eraseblock size depends on the + * physical eraseblock size and on how much bytes UBI headers consume. But + * because of the volume alignment (@alignment), the usable size of logical + * eraseblocks if a volume may be less. The following equation is true: + * @usable_leb_size = LEB size - (LEB size mod @alignment), + * where LEB size is the logical eraseblock size defined by the UBI device. + * + * The alignment is multiple to the minimal flash input/output unit size or %1 + * if all the available space is used. + * + * To put this differently, alignment may be considered is a way to change + * volume logical eraseblock sizes. + */ +struct ubi_volume_info { + int ubi_num; + int vol_id; + int size; + long long used_bytes; + int used_ebs; + int vol_type; + int corrupted; + int upd_marker; + int alignment; + int usable_leb_size; + int name_len; + const char *name; + dev_t cdev; +}; + +/** + * struct ubi_device_info - UBI device description data structure. + * @ubi_num: ubi device number + * @leb_size: logical eraseblock size on this UBI device + * @min_io_size: minimal I/O unit size + * @ro_mode: if this device is in read-only mode + * @cdev: UBI character device major and minor numbers + * + * Note, @leb_size is the logical eraseblock size offered by the UBI device. + * Volumes of this UBI device may have smaller logical eraseblock size if their + * alignment is not equivalent to %1. + */ +struct ubi_device_info { + int ubi_num; + int leb_size; + int min_io_size; + int ro_mode; + dev_t cdev; +}; + +/* UBI descriptor given to users when they open UBI volumes */ +struct ubi_volume_desc; + +int ubi_get_device_info(int ubi_num, struct ubi_device_info *di); +void ubi_get_volume_info(struct ubi_volume_desc *desc, + struct ubi_volume_info *vi); +struct ubi_volume_desc *ubi_open_volume(int ubi_num, int vol_id, int mode); +struct ubi_volume_desc *ubi_open_volume_nm(int ubi_num, const char *name, + int mode); +void ubi_close_volume(struct ubi_volume_desc *desc); +int ubi_leb_read(struct ubi_volume_desc *desc, int lnum, char *buf, int offset, + int len, int check); +int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf, + int offset, int len, int dtype); +int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf, + int len, int dtype); +int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum); +int ubi_leb_unmap(struct ubi_volume_desc *desc, int lnum); +int ubi_leb_map(struct ubi_volume_desc *desc, int lnum, int dtype); +int ubi_is_mapped(struct ubi_volume_desc *desc, int lnum); + +/* + * This function is the same as the 'ubi_leb_read()' function, but it does not + * provide the checking capability. + */ +static inline int ubi_read(struct ubi_volume_desc *desc, int lnum, char *buf, + int offset, int len) +{ + return ubi_leb_read(desc, lnum, buf, offset, len, 0); +} + +/* + * This function is the same as the 'ubi_leb_write()' functions, but it does + * not have the data type argument. + */ +static inline int ubi_write(struct ubi_volume_desc *desc, int lnum, + const void *buf, int offset, int len) +{ + return ubi_leb_write(desc, lnum, buf, offset, len, UBI_UNKNOWN); +} + +/* + * This function is the same as the 'ubi_leb_change()' functions, but it does + * not have the data type argument. + */ +static inline int ubi_change(struct ubi_volume_desc *desc, int lnum, + const void *buf, int len) +{ + return ubi_leb_change(desc, lnum, buf, len, UBI_UNKNOWN); +} + +#endif /* !__LINUX_UBI_H__ */ diff --git a/include/mtd/ubi-user.h b/include/mtd/ubi-user.h new file mode 100644 index 0000000000..a7421f130c --- /dev/null +++ b/include/mtd/ubi-user.h @@ -0,0 +1,268 @@ +/* + * Copyright (c) International Business Machines Corp., 2006 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + * the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Author: Artem Bityutskiy (Битюцкий Артём) + */ + +#ifndef __UBI_USER_H__ +#define __UBI_USER_H__ + +/* + * UBI device creation (the same as MTD device attachment) + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * MTD devices may be attached using %UBI_IOCATT ioctl command of the UBI + * control device. The caller has to properly fill and pass + * &struct ubi_attach_req object - UBI will attach the MTD device specified in + * the request and return the newly created UBI device number as the ioctl + * return value. + * + * UBI device deletion (the same as MTD device detachment) + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * An UBI device maybe deleted with %UBI_IOCDET ioctl command of the UBI + * control device. + * + * UBI volume creation + * ~~~~~~~~~~~~~~~~~~~ + * + * UBI volumes are created via the %UBI_IOCMKVOL IOCTL command of UBI character + * device. A &struct ubi_mkvol_req object has to be properly filled and a + * pointer to it has to be passed to the IOCTL. + * + * UBI volume deletion + * ~~~~~~~~~~~~~~~~~~~ + * + * To delete a volume, the %UBI_IOCRMVOL IOCTL command of the UBI character + * device should be used. A pointer to the 32-bit volume ID hast to be passed + * to the IOCTL. + * + * UBI volume re-size + * ~~~~~~~~~~~~~~~~~~ + * + * To re-size a volume, the %UBI_IOCRSVOL IOCTL command of the UBI character + * device should be used. A &struct ubi_rsvol_req object has to be properly + * filled and a pointer to it has to be passed to the IOCTL. + * + * UBI volume update + * ~~~~~~~~~~~~~~~~~ + * + * Volume update should be done via the %UBI_IOCVOLUP IOCTL command of the + * corresponding UBI volume character device. A pointer to a 64-bit update + * size should be passed to the IOCTL. After this, UBI expects user to write + * this number of bytes to the volume character device. The update is finished + * when the claimed number of bytes is passed. So, the volume update sequence + * is something like: + * + * fd = open("/dev/my_volume"); + * ioctl(fd, UBI_IOCVOLUP, &image_size); + * write(fd, buf, image_size); + * close(fd); + * + * Atomic eraseblock change + * ~~~~~~~~~~~~~~~~~~~~~~~~ + * + * Atomic eraseblock change operation is done via the %UBI_IOCEBCH IOCTL + * command of the corresponding UBI volume character device. A pointer to + * &struct ubi_leb_change_req has to be passed to the IOCTL. Then the user is + * expected to write the requested amount of bytes. This is similar to the + * "volume update" IOCTL. + */ + +/* + * When a new UBI volume or UBI device is created, users may either specify the + * volume/device number they want to create or to let UBI automatically assign + * the number using these constants. + */ +#define UBI_VOL_NUM_AUTO (-1) +#define UBI_DEV_NUM_AUTO (-1) + +/* Maximum volume name length */ +#define UBI_MAX_VOLUME_NAME 127 + +/* IOCTL commands of UBI character devices */ + +#define UBI_IOC_MAGIC 'o' + +/* Create an UBI volume */ +#define UBI_IOCMKVOL _IOW(UBI_IOC_MAGIC, 0, struct ubi_mkvol_req) +/* Remove an UBI volume */ +#define UBI_IOCRMVOL _IOW(UBI_IOC_MAGIC, 1, int32_t) +/* Re-size an UBI volume */ +#define UBI_IOCRSVOL _IOW(UBI_IOC_MAGIC, 2, struct ubi_rsvol_req) + +/* IOCTL commands of the UBI control character device */ + +#define UBI_CTRL_IOC_MAGIC 'o' + +/* Attach an MTD device */ +#define UBI_IOCATT _IOW(UBI_CTRL_IOC_MAGIC, 64, struct ubi_attach_req) +/* Detach an MTD device */ +#define UBI_IOCDET _IOW(UBI_CTRL_IOC_MAGIC, 65, int32_t) + +/* IOCTL commands of UBI volume character devices */ + +#define UBI_VOL_IOC_MAGIC 'O' + +/* Start UBI volume update */ +#define UBI_IOCVOLUP _IOW(UBI_VOL_IOC_MAGIC, 0, int64_t) +/* An eraseblock erasure command, used for debugging, disabled by default */ +#define UBI_IOCEBER _IOW(UBI_VOL_IOC_MAGIC, 1, int32_t) +/* An atomic eraseblock change command */ +#define UBI_IOCEBCH _IOW(UBI_VOL_IOC_MAGIC, 2, int32_t) + +/* Maximum MTD device name length supported by UBI */ +#define MAX_UBI_MTD_NAME_LEN 127 + +/* + * UBI data type hint constants. + * + * UBI_LONGTERM: long-term data + * UBI_SHORTTERM: short-term data + * UBI_UNKNOWN: data persistence is unknown + * + * These constants are used when data is written to UBI volumes in order to + * help the UBI wear-leveling unit to find more appropriate physical + * eraseblocks. + */ +enum { + UBI_LONGTERM = 1, + UBI_SHORTTERM = 2, + UBI_UNKNOWN = 3, +}; + +/* + * UBI volume type constants. + * + * @UBI_DYNAMIC_VOLUME: dynamic volume + * @UBI_STATIC_VOLUME: static volume + */ +enum { + UBI_DYNAMIC_VOLUME = 3, + UBI_STATIC_VOLUME = 4, +}; + +/** + * struct ubi_attach_req - attach MTD device request. + * @ubi_num: UBI device number to create + * @mtd_num: MTD device number to attach + * @vid_hdr_offset: VID header offset (use defaults if %0) + * @padding: reserved for future, not used, has to be zeroed + * + * This data structure is used to specify MTD device UBI has to attach and the + * parameters it has to use. The number which should be assigned to the new UBI + * device is passed in @ubi_num. UBI may automatically assign the number if + * @UBI_DEV_NUM_AUTO is passed. In this case, the device number is returned in + * @ubi_num. + * + * Most applications should pass %0 in @vid_hdr_offset to make UBI use default + * offset of the VID header within physical eraseblocks. The default offset is + * the next min. I/O unit after the EC header. For example, it will be offset + * 512 in case of a 512 bytes page NAND flash with no sub-page support. Or + * it will be 512 in case of a 2KiB page NAND flash with 4 512-byte sub-pages. + * + * But in rare cases, if this optimizes things, the VID header may be placed to + * a different offset. For example, the boot-loader might do things faster if the + * VID header sits at the end of the first 2KiB NAND page with 4 sub-pages. As + * the boot-loader would not normally need to read EC headers (unless it needs + * UBI in RW mode), it might be faster to calculate ECC. This is weird example, + * but it real-life example. So, in this example, @vid_hdr_offer would be + * 2KiB-64 bytes = 1984. Note, that this position is not even 512-bytes + * aligned, which is OK, as UBI is clever enough to realize this is 4th sub-page + * of the first page and add needed padding. + */ +struct ubi_attach_req { + int32_t ubi_num; + int32_t mtd_num; + int32_t vid_hdr_offset; + uint8_t padding[12]; +}; + +/** + * struct ubi_mkvol_req - volume description data structure used in + * volume creation requests. + * @vol_id: volume number + * @alignment: volume alignment + * @bytes: volume size in bytes + * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) + * @padding1: reserved for future, not used, has to be zeroed + * @name_len: volume name length + * @padding2: reserved for future, not used, has to be zeroed + * @name: volume name + * + * This structure is used by user-space programs when creating new volumes. The + * @used_bytes field is only necessary when creating static volumes. + * + * The @alignment field specifies the required alignment of the volume logical + * eraseblock. This means, that the size of logical eraseblocks will be aligned + * to this number, i.e., + * (UBI device logical eraseblock size) mod (@alignment) = 0. + * + * To put it differently, the logical eraseblock of this volume may be slightly + * shortened in order to make it properly aligned. The alignment has to be + * multiple of the flash minimal input/output unit, or %1 to utilize the entire + * available space of logical eraseblocks. + * + * The @alignment field may be useful, for example, when one wants to maintain + * a block device on top of an UBI volume. In this case, it is desirable to fit + * an integer number of blocks in logical eraseblocks of this UBI volume. With + * alignment it is possible to update this volume using plane UBI volume image + * BLOBs, without caring about how to properly align them. + */ +struct ubi_mkvol_req { + int32_t vol_id; + int32_t alignment; + int64_t bytes; + int8_t vol_type; + int8_t padding1; + int16_t name_len; + int8_t padding2[4]; + char name[UBI_MAX_VOLUME_NAME + 1]; +} __attribute__ ((packed)); + +/** + * struct ubi_rsvol_req - a data structure used in volume re-size requests. + * @vol_id: ID of the volume to re-size + * @bytes: new size of the volume in bytes + * + * Re-sizing is possible for both dynamic and static volumes. But while dynamic + * volumes may be re-sized arbitrarily, static volumes cannot be made to be + * smaller then the number of bytes they bear. To arbitrarily shrink a static + * volume, it must be wiped out first (by means of volume update operation with + * zero number of bytes). + */ +struct ubi_rsvol_req { + int64_t bytes; + int32_t vol_id; +} __attribute__ ((packed)); + +/** + * struct ubi_leb_change_req - a data structure used in atomic logical + * eraseblock change requests. + * @lnum: logical eraseblock number to change + * @bytes: how many bytes will be written to the logical eraseblock + * @dtype: data type (%UBI_LONGTERM, %UBI_SHORTTERM, %UBI_UNKNOWN) + * @padding: reserved for future, not used, has to be zeroed + */ +struct ubi_leb_change_req { + int32_t lnum; + int32_t bytes; + uint8_t dtype; + uint8_t padding[7]; +} __attribute__ ((packed)); + +#endif /* __UBI_USER_H__ */ -- cgit From 58be3a1056d88c6d05f3e914389282807e69923a Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Wed, 19 Nov 2008 16:38:24 +0100 Subject: UBI: Add basic UBI support to U-Boot (Part 8/8) This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park Signed-off-by: Stefan Roese --- include/linux/mtd/ubi-header.h | 360 ----------------------------------------- include/linux/mtd/ubi-user.h | 161 ------------------ 2 files changed, 521 deletions(-) delete mode 100644 include/linux/mtd/ubi-header.h delete mode 100644 include/linux/mtd/ubi-user.h (limited to 'include') diff --git a/include/linux/mtd/ubi-header.h b/include/linux/mtd/ubi-header.h deleted file mode 100644 index fa479c71aa..0000000000 --- a/include/linux/mtd/ubi-header.h +++ /dev/null @@ -1,360 +0,0 @@ -/* - * Copyright (c) International Business Machines Corp., 2006 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - * the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Authors: Artem Bityutskiy (Битюцкий Артём) - * Thomas Gleixner - * Frank Haverkamp - * Oliver Lohmann - * Andreas Arnez - */ - -/* - * This file defines the layout of UBI headers and all the other UBI on-flash - * data structures. May be included by user-space. - */ - -#ifndef __UBI_HEADER_H__ -#define __UBI_HEADER_H__ - -#include - -/* The version of UBI images supported by this implementation */ -#define UBI_VERSION 1 - -/* The highest erase counter value supported by this implementation */ -#define UBI_MAX_ERASECOUNTER 0x7FFFFFFF - -/* The initial CRC32 value used when calculating CRC checksums */ -#define UBI_CRC32_INIT 0xFFFFFFFFU - -/* Erase counter header magic number (ASCII "UBI#") */ -#define UBI_EC_HDR_MAGIC 0x55424923 -/* Volume identifier header magic number (ASCII "UBI!") */ -#define UBI_VID_HDR_MAGIC 0x55424921 - -/* - * Volume type constants used in the volume identifier header. - * - * @UBI_VID_DYNAMIC: dynamic volume - * @UBI_VID_STATIC: static volume - */ -enum { - UBI_VID_DYNAMIC = 1, - UBI_VID_STATIC = 2 -}; - -/* - * Compatibility constants used by internal volumes. - * - * @UBI_COMPAT_DELETE: delete this internal volume before anything is written - * to the flash - * @UBI_COMPAT_RO: attach this device in read-only mode - * @UBI_COMPAT_PRESERVE: preserve this internal volume - do not touch its - * physical eraseblocks, don't allow the wear-leveling unit to move them - * @UBI_COMPAT_REJECT: reject this UBI image - */ -enum { - UBI_COMPAT_DELETE = 1, - UBI_COMPAT_RO = 2, - UBI_COMPAT_PRESERVE = 4, - UBI_COMPAT_REJECT = 5 -}; - -/* - * ubi16_t/ubi32_t/ubi64_t - 16, 32, and 64-bit integers used in UBI on-flash - * data structures. - */ -typedef struct { - uint16_t int16; -} __attribute__ ((packed)) ubi16_t; - -typedef struct { - uint32_t int32; -} __attribute__ ((packed)) ubi32_t; - -typedef struct { - uint64_t int64; -} __attribute__ ((packed)) ubi64_t; - -/* - * In this implementation of UBI uses the big-endian format for on-flash - * integers. The below are the corresponding conversion macros. - */ -#define cpu_to_ubi16(x) ((ubi16_t){__cpu_to_be16(x)}) -#define ubi16_to_cpu(x) ((uint16_t)__be16_to_cpu((x).int16)) - -#define cpu_to_ubi32(x) ((ubi32_t){__cpu_to_be32(x)}) -#define ubi32_to_cpu(x) ((uint32_t)__be32_to_cpu((x).int32)) - -#define cpu_to_ubi64(x) ((ubi64_t){__cpu_to_be64(x)}) -#define ubi64_to_cpu(x) ((uint64_t)__be64_to_cpu((x).int64)) - -/* Sizes of UBI headers */ -#define UBI_EC_HDR_SIZE sizeof(struct ubi_ec_hdr) -#define UBI_VID_HDR_SIZE sizeof(struct ubi_vid_hdr) - -/* Sizes of UBI headers without the ending CRC */ -#define UBI_EC_HDR_SIZE_CRC (UBI_EC_HDR_SIZE - sizeof(ubi32_t)) -#define UBI_VID_HDR_SIZE_CRC (UBI_VID_HDR_SIZE - sizeof(ubi32_t)) - -/** - * struct ubi_ec_hdr - UBI erase counter header. - * @magic: erase counter header magic number (%UBI_EC_HDR_MAGIC) - * @version: version of UBI implementation which is supposed to accept this - * UBI image - * @padding1: reserved for future, zeroes - * @ec: the erase counter - * @vid_hdr_offset: where the VID header starts - * @data_offset: where the user data start - * @padding2: reserved for future, zeroes - * @hdr_crc: erase counter header CRC checksum - * - * The erase counter header takes 64 bytes and has a plenty of unused space for - * future usage. The unused fields are zeroed. The @version field is used to - * indicate the version of UBI implementation which is supposed to be able to - * work with this UBI image. If @version is greater then the current UBI - * version, the image is rejected. This may be useful in future if something - * is changed radically. This field is duplicated in the volume identifier - * header. - * - * The @vid_hdr_offset and @data_offset fields contain the offset of the the - * volume identifier header and user data, relative to the beginning of the - * physical eraseblock. These values have to be the same for all physical - * eraseblocks. - */ -struct ubi_ec_hdr { - ubi32_t magic; - uint8_t version; - uint8_t padding1[3]; - ubi64_t ec; /* Warning: the current limit is 31-bit anyway! */ - ubi32_t vid_hdr_offset; - ubi32_t data_offset; - uint8_t padding2[36]; - ubi32_t hdr_crc; -} __attribute__ ((packed)); - -/** - * struct ubi_vid_hdr - on-flash UBI volume identifier header. - * @magic: volume identifier header magic number (%UBI_VID_HDR_MAGIC) - * @version: UBI implementation version which is supposed to accept this UBI - * image (%UBI_VERSION) - * @vol_type: volume type (%UBI_VID_DYNAMIC or %UBI_VID_STATIC) - * @copy_flag: if this logical eraseblock was copied from another physical - * eraseblock (for wear-leveling reasons) - * @compat: compatibility of this volume (%0, %UBI_COMPAT_DELETE, - * %UBI_COMPAT_IGNORE, %UBI_COMPAT_PRESERVE, or %UBI_COMPAT_REJECT) - * @vol_id: ID of this volume - * @lnum: logical eraseblock number - * @leb_ver: version of this logical eraseblock (IMPORTANT: obsolete, to be - * removed, kept only for not breaking older UBI users) - * @data_size: how many bytes of data this logical eraseblock contains - * @used_ebs: total number of used logical eraseblocks in this volume - * @data_pad: how many bytes at the end of this physical eraseblock are not - * used - * @data_crc: CRC checksum of the data stored in this logical eraseblock - * @padding1: reserved for future, zeroes - * @sqnum: sequence number - * @padding2: reserved for future, zeroes - * @hdr_crc: volume identifier header CRC checksum - * - * The @sqnum is the value of the global sequence counter at the time when this - * VID header was created. The global sequence counter is incremented each time - * UBI writes a new VID header to the flash, i.e. when it maps a logical - * eraseblock to a new physical eraseblock. The global sequence counter is an - * unsigned 64-bit integer and we assume it never overflows. The @sqnum - * (sequence number) is used to distinguish between older and newer versions of - * logical eraseblocks. - * - * There are 2 situations when there may be more then one physical eraseblock - * corresponding to the same logical eraseblock, i.e., having the same @vol_id - * and @lnum values in the volume identifier header. Suppose we have a logical - * eraseblock L and it is mapped to the physical eraseblock P. - * - * 1. Because UBI may erase physical eraseblocks asynchronously, the following - * situation is possible: L is asynchronously erased, so P is scheduled for - * erasure, then L is written to,i.e. mapped to another physical eraseblock P1, - * so P1 is written to, then an unclean reboot happens. Result - there are 2 - * physical eraseblocks P and P1 corresponding to the same logical eraseblock - * L. But P1 has greater sequence number, so UBI picks P1 when it attaches the - * flash. - * - * 2. From time to time UBI moves logical eraseblocks to other physical - * eraseblocks for wear-leveling reasons. If, for example, UBI moves L from P - * to P1, and an unclean reboot happens before P is physically erased, there - * are two physical eraseblocks P and P1 corresponding to L and UBI has to - * select one of them when the flash is attached. The @sqnum field says which - * PEB is the original (obviously P will have lower @sqnum) and the copy. But - * it is not enough to select the physical eraseblock with the higher sequence - * number, because the unclean reboot could have happen in the middle of the - * copying process, so the data in P is corrupted. It is also not enough to - * just select the physical eraseblock with lower sequence number, because the - * data there may be old (consider a case if more data was added to P1 after - * the copying). Moreover, the unclean reboot may happen when the erasure of P - * was just started, so it result in unstable P, which is "mostly" OK, but - * still has unstable bits. - * - * UBI uses the @copy_flag field to indicate that this logical eraseblock is a - * copy. UBI also calculates data CRC when the data is moved and stores it at - * the @data_crc field of the copy (P1). So when UBI needs to pick one physical - * eraseblock of two (P or P1), the @copy_flag of the newer one (P1) is - * examined. If it is cleared, the situation* is simple and the newer one is - * picked. If it is set, the data CRC of the copy (P1) is examined. If the CRC - * checksum is correct, this physical eraseblock is selected (P1). Otherwise - * the older one (P) is selected. - * - * Note, there is an obsolete @leb_ver field which was used instead of @sqnum - * in the past. But it is not used anymore and we keep it in order to be able - * to deal with old UBI images. It will be removed at some point. - * - * There are 2 sorts of volumes in UBI: user volumes and internal volumes. - * Internal volumes are not seen from outside and are used for various internal - * UBI purposes. In this implementation there is only one internal volume - the - * layout volume. Internal volumes are the main mechanism of UBI extensions. - * For example, in future one may introduce a journal internal volume. Internal - * volumes have their own reserved range of IDs. - * - * The @compat field is only used for internal volumes and contains the "degree - * of their compatibility". It is always zero for user volumes. This field - * provides a mechanism to introduce UBI extensions and to be still compatible - * with older UBI binaries. For example, if someone introduced a journal in - * future, he would probably use %UBI_COMPAT_DELETE compatibility for the - * journal volume. And in this case, older UBI binaries, which know nothing - * about the journal volume, would just delete this volume and work perfectly - * fine. This is similar to what Ext2fs does when it is fed by an Ext3fs image - * - it just ignores the Ext3fs journal. - * - * The @data_crc field contains the CRC checksum of the contents of the logical - * eraseblock if this is a static volume. In case of dynamic volumes, it does - * not contain the CRC checksum as a rule. The only exception is when the - * data of the physical eraseblock was moved by the wear-leveling unit, then - * the wear-leveling unit calculates the data CRC and stores it in the - * @data_crc field. And of course, the @copy_flag is %in this case. - * - * The @data_size field is used only for static volumes because UBI has to know - * how many bytes of data are stored in this eraseblock. For dynamic volumes, - * this field usually contains zero. The only exception is when the data of the - * physical eraseblock was moved to another physical eraseblock for - * wear-leveling reasons. In this case, UBI calculates CRC checksum of the - * contents and uses both @data_crc and @data_size fields. In this case, the - * @data_size field contains data size. - * - * The @used_ebs field is used only for static volumes and indicates how many - * eraseblocks the data of the volume takes. For dynamic volumes this field is - * not used and always contains zero. - * - * The @data_pad is calculated when volumes are created using the alignment - * parameter. So, effectively, the @data_pad field reduces the size of logical - * eraseblocks of this volume. This is very handy when one uses block-oriented - * software (say, cramfs) on top of the UBI volume. - */ -struct ubi_vid_hdr { - ubi32_t magic; - uint8_t version; - uint8_t vol_type; - uint8_t copy_flag; - uint8_t compat; - ubi32_t vol_id; - ubi32_t lnum; - ubi32_t leb_ver; /* obsolete, to be removed, don't use */ - ubi32_t data_size; - ubi32_t used_ebs; - ubi32_t data_pad; - ubi32_t data_crc; - uint8_t padding1[4]; - ubi64_t sqnum; - uint8_t padding2[12]; - ubi32_t hdr_crc; -} __attribute__ ((packed)); - -/* Internal UBI volumes count */ -#define UBI_INT_VOL_COUNT 1 - -/* - * Starting ID of internal volumes. There is reserved room for 4096 internal - * volumes. - */ -#define UBI_INTERNAL_VOL_START (0x7FFFFFFF - 4096) - -/* The layout volume contains the volume table */ - -#define UBI_LAYOUT_VOL_ID UBI_INTERNAL_VOL_START -#define UBI_LAYOUT_VOLUME_EBS 2 -#define UBI_LAYOUT_VOLUME_NAME "layout volume" -#define UBI_LAYOUT_VOLUME_COMPAT UBI_COMPAT_REJECT - -/* The maximum number of volumes per one UBI device */ -#define UBI_MAX_VOLUMES 128 - -/* The maximum volume name length */ -#define UBI_VOL_NAME_MAX 127 - -/* Size of the volume table record */ -#define UBI_VTBL_RECORD_SIZE sizeof(struct ubi_vtbl_record) - -/* Size of the volume table record without the ending CRC */ -#define UBI_VTBL_RECORD_SIZE_CRC (UBI_VTBL_RECORD_SIZE - sizeof(ubi32_t)) - -/** - * struct ubi_vtbl_record - a record in the volume table. - * @reserved_pebs: how many physical eraseblocks are reserved for this volume - * @alignment: volume alignment - * @data_pad: how many bytes are unused at the end of the each physical - * eraseblock to satisfy the requested alignment - * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) - * @upd_marker: if volume update was started but not finished - * @name_len: volume name length - * @name: the volume name - * @padding2: reserved, zeroes - * @crc: a CRC32 checksum of the record - * - * The volume table records are stored in the volume table, which is stored in - * the layout volume. The layout volume consists of 2 logical eraseblock, each - * of which contains a copy of the volume table (i.e., the volume table is - * duplicated). The volume table is an array of &struct ubi_vtbl_record - * objects indexed by the volume ID. - * - * If the size of the logical eraseblock is large enough to fit - * %UBI_MAX_VOLUMES records, the volume table contains %UBI_MAX_VOLUMES - * records. Otherwise, it contains as many records as it can fit (i.e., size of - * logical eraseblock divided by sizeof(struct ubi_vtbl_record)). - * - * The @upd_marker flag is used to implement volume update. It is set to %1 - * before update and set to %0 after the update. So if the update operation was - * interrupted, UBI knows that the volume is corrupted. - * - * The @alignment field is specified when the volume is created and cannot be - * later changed. It may be useful, for example, when a block-oriented file - * system works on top of UBI. The @data_pad field is calculated using the - * logical eraseblock size and @alignment. The alignment must be multiple to the - * minimal flash I/O unit. If @alignment is 1, all the available space of - * the physical eraseblocks is used. - * - * Empty records contain all zeroes and the CRC checksum of those zeroes. - */ -struct ubi_vtbl_record { - ubi32_t reserved_pebs; - ubi32_t alignment; - ubi32_t data_pad; - uint8_t vol_type; - uint8_t upd_marker; - ubi16_t name_len; - uint8_t name[UBI_VOL_NAME_MAX+1]; - uint8_t padding2[24]; - ubi32_t crc; -} __attribute__ ((packed)); - -#endif /* !__UBI_HEADER_H__ */ diff --git a/include/linux/mtd/ubi-user.h b/include/linux/mtd/ubi-user.h deleted file mode 100644 index fe06ded0e6..0000000000 --- a/include/linux/mtd/ubi-user.h +++ /dev/null @@ -1,161 +0,0 @@ -/* - * Copyright (c) International Business Machines Corp., 2006 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - * the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Author: Artem Bityutskiy (Битюцкий Артём) - */ - -#ifndef __UBI_USER_H__ -#define __UBI_USER_H__ - -/* - * UBI volume creation - * ~~~~~~~~~~~~~~~~~~~ - * - * UBI volumes are created via the %UBI_IOCMKVOL IOCTL command of UBI character - * device. A &struct ubi_mkvol_req object has to be properly filled and a - * pointer to it has to be passed to the IOCTL. - * - * UBI volume deletion - * ~~~~~~~~~~~~~~~~~~~ - * - * To delete a volume, the %UBI_IOCRMVOL IOCTL command of the UBI character - * device should be used. A pointer to the 32-bit volume ID hast to be passed - * to the IOCTL. - * - * UBI volume re-size - * ~~~~~~~~~~~~~~~~~~ - * - * To re-size a volume, the %UBI_IOCRSVOL IOCTL command of the UBI character - * device should be used. A &struct ubi_rsvol_req object has to be properly - * filled and a pointer to it has to be passed to the IOCTL. - * - * UBI volume update - * ~~~~~~~~~~~~~~~~~ - * - * Volume update should be done via the %UBI_IOCVOLUP IOCTL command of the - * corresponding UBI volume character device. A pointer to a 64-bit update - * size should be passed to the IOCTL. After then, UBI expects user to write - * this number of bytes to the volume character device. The update is finished - * when the claimed number of bytes is passed. So, the volume update sequence - * is something like: - * - * fd = open("/dev/my_volume"); - * ioctl(fd, UBI_IOCVOLUP, &image_size); - * write(fd, buf, image_size); - * close(fd); - */ - -/* - * When a new volume is created, users may either specify the volume number they - * want to create or to let UBI automatically assign a volume number using this - * constant. - */ -#define UBI_VOL_NUM_AUTO (-1) - -/* Maximum volume name length */ -#define UBI_MAX_VOLUME_NAME 127 - -/* IOCTL commands of UBI character devices */ - -#define UBI_IOC_MAGIC 'o' - -/* Create an UBI volume */ -#define UBI_IOCMKVOL _IOW(UBI_IOC_MAGIC, 0, struct ubi_mkvol_req) -/* Remove an UBI volume */ -#define UBI_IOCRMVOL _IOW(UBI_IOC_MAGIC, 1, int32_t) -/* Re-size an UBI volume */ -#define UBI_IOCRSVOL _IOW(UBI_IOC_MAGIC, 2, struct ubi_rsvol_req) - -/* IOCTL commands of UBI volume character devices */ - -#define UBI_VOL_IOC_MAGIC 'O' - -/* Start UBI volume update */ -#define UBI_IOCVOLUP _IOW(UBI_VOL_IOC_MAGIC, 0, int64_t) -/* An eraseblock erasure command, used for debugging, disabled by default */ -#define UBI_IOCEBER _IOW(UBI_VOL_IOC_MAGIC, 1, int32_t) - -/* - * UBI volume type constants. - * - * @UBI_DYNAMIC_VOLUME: dynamic volume - * @UBI_STATIC_VOLUME: static volume - */ -enum { - UBI_DYNAMIC_VOLUME = 3, - UBI_STATIC_VOLUME = 4 -}; - -/** - * struct ubi_mkvol_req - volume description data structure used in - * volume creation requests. - * @vol_id: volume number - * @alignment: volume alignment - * @bytes: volume size in bytes - * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) - * @padding1: reserved for future, not used - * @name_len: volume name length - * @padding2: reserved for future, not used - * @name: volume name - * - * This structure is used by userspace programs when creating new volumes. The - * @used_bytes field is only necessary when creating static volumes. - * - * The @alignment field specifies the required alignment of the volume logical - * eraseblock. This means, that the size of logical eraseblocks will be aligned - * to this number, i.e., - * (UBI device logical eraseblock size) mod (@alignment) = 0. - * - * To put it differently, the logical eraseblock of this volume may be slightly - * shortened in order to make it properly aligned. The alignment has to be - * multiple of the flash minimal input/output unit, or %1 to utilize the entire - * available space of logical eraseblocks. - * - * The @alignment field may be useful, for example, when one wants to maintain - * a block device on top of an UBI volume. In this case, it is desirable to fit - * an integer number of blocks in logical eraseblocks of this UBI volume. With - * alignment it is possible to update this volume using plane UBI volume image - * BLOBs, without caring about how to properly align them. - */ -struct ubi_mkvol_req { - int32_t vol_id; - int32_t alignment; - int64_t bytes; - int8_t vol_type; - int8_t padding1; - int16_t name_len; - int8_t padding2[4]; - char name[UBI_MAX_VOLUME_NAME+1]; -} __attribute__ ((packed)); - -/** - * struct ubi_rsvol_req - a data structure used in volume re-size requests. - * @vol_id: ID of the volume to re-size - * @bytes: new size of the volume in bytes - * - * Re-sizing is possible for both dynamic and static volumes. But while dynamic - * volumes may be re-sized arbitrarily, static volumes cannot be made to be - * smaller then the number of bytes they bear. To arbitrarily shrink a static - * volume, it must be wiped out first (by means of volume update operation with - * zero number of bytes). - */ -struct ubi_rsvol_req { - int64_t bytes; - int32_t vol_id; -} __attribute__ ((packed)); - -#endif /* __UBI_USER_H__ */ -- cgit From 8000b086b33a5a81f3f390f37e178db7956dc08b Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Fri, 24 Oct 2008 14:55:33 +0200 Subject: ARM: Add Apollon UBI support To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI macro. Signed-off-by: Kyungmin Park Signed-off-by: Stefan Roese --- include/configs/apollon.h | 74 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 57 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/configs/apollon.h b/include/configs/apollon.h index d71ed44fcd..dff47fc6a6 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -53,6 +53,9 @@ #define CONFIG_SYS_USE_NOR 1 #endif +/* uncommnet if you want to use UBI */ +#define CONFIG_SYS_USE_UBI + #include /* get chip and board defs */ #define V_SCLK 12000000 @@ -73,8 +76,9 @@ * Size of malloc() pool */ #define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M) +/* bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* * Hardware drivers @@ -116,6 +120,13 @@ #define CONFIG_CMD_DIAG #define CONFIG_CMD_ONENAND +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS +#endif + #undef CONFIG_CMD_AUTOSCRIPT #ifndef CONFIG_SYS_USE_NOR @@ -133,24 +144,39 @@ #define CONFIG_BOOTFILE "uImage" #define CONFIG_ETHADDR 00:0E:99:00:24:20 -#ifdef CONFIG_APOLLON_PLUS -# define CONFIG_BOOTARGS "root=/dev/nfs rw mem=64M console=ttyS0,115200n8 ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2" +#ifdef CONFIG_APOLLON_PLUS +#define CONFIG_SYS_MEM "mem=64M" +#else +#define CONFIG_SYS_MEM "mem=128" +#endif + +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_SYS_UBI "ubi.mtd=4" #else -# define CONFIG_BOOTARGS "root=/dev/nfs rw mem=128M console=ttyS0,115200n8 ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2" +#define CONFIG_SYS_UBI "" #endif +#define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \ + " console=ttyS0,115200n8" \ + " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \ + "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \ + CONFIG_SYS_UBI + #define CONFIG_EXTRA_ENV_SETTINGS \ "Image=tftp 0x80008000 Image; go 0x80008000\0" \ "zImage=tftp 0x80180000 zImage; go 0x80180000\0" \ "uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \ "uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \ - "xloader=tftp 0x80180000 x-load.bin; cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \ + "xloader=tftp 0x80180000 x-load.bin; " \ + " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \ "syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \ "syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \ "norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \ - "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0"\ + "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \ "onesyncboot=run syncmode oneboot\0" \ - "updateb=tftp 0x80180000 u-boot-onenand.bin; onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \ + "updateb=tftp 0x80180000 u-boot-onenand.bin; " \ + " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \ + "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \ "bootcmd=run uboot\0" /* @@ -164,14 +190,15 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */ +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) * or by 32KHz clk, or from external sig. This rate is divided by a local @@ -211,13 +238,15 @@ # define CONFIG_SYS_MAX_FLASH_BANKS 1 # define CONFIG_SYS_MAX_FLASH_SECT 1024 /*----------------------------------------------------------------------- - * CFI FLASH driver setup */ -# define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ +/* Flash memory is CFI compliant */ +# define CONFIG_SYS_FLASH_CFI 1 # define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ /* Use buffered writes (~10x faster) */ -# define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w sector protection*/ +/* Use buffered writes (~10x faster) */ +/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ +/* Use h/w sector protection*/ +# define CONFIG_SYS_FLASH_PROTECTION 1 #else /* !CONFIG_SYS_USE_NOR */ # define CONFIG_SYS_NO_FLASH 1 @@ -228,4 +257,15 @@ #define CONFIG_ENV_IS_IN_ONENAND 1 #define CONFIG_ENV_ADDR 0x00020000 +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_JFFS2_CMDLINE +#define MTDIDS_DEFAULT "onenand0=onenand" +#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \ + "128k(params)," \ + "2m(kernel)," \ + "16m(rootfs)," \ + "32m(fs)," \ + "-(ubifs)" +#endif + #endif /* __CONFIG_H */ -- cgit From ad229a44e162af0f65e57e4e3dc133d5f0364ecb Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Fri, 7 Nov 2008 13:55:14 +0100 Subject: AT91: Use AT91_CPU_CLOCK in displays Introduce AT91_CPU_CLOCK and use it for displaying the CPU speed in the LCD driver. Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the corresponding board clocks. Signed-off-by: Stelian Pop --- include/configs/at91cap9adk.h | 7 ++++--- include/configs/at91sam9260ek.h | 8 +++++--- include/configs/at91sam9261ek.h | 7 ++++--- include/configs/at91sam9263ek.h | 7 ++++--- include/configs/at91sam9rlek.h | 7 ++++--- 5 files changed, 21 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 30a7cb41f9..667e0496b6 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -29,9 +29,10 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91CAP9" -#define AT91_MAIN_CLOCK 200000000 /* from 12 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index be9a8eb51e..81c8d39b24 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -28,9 +28,11 @@ #define __CONFIG_H /* ARM asynchronous clock */ -#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */ -#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_CPU_NAME "AT91SAM9260" +#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index add31c95a9..efe35a4b76 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -29,9 +29,10 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9261" -#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */ -#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 555cb7f2ea..ef5b666311 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -29,9 +29,10 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9263" -#define AT91_MAIN_CLOCK 199919000 /* from 16.367 MHz crystal */ -#define AT91_MASTER_CLOCK 99959500 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 648d60ef1d..35dac47ba1 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -29,9 +29,10 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9RL" -#define AT91_MAIN_CLOCK 200000000 /* from 12.000 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ -- cgit From 3e0cda071a67cb5709e3fa4faf6b31a731859acc Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Sun, 9 Nov 2008 00:14:46 +0100 Subject: AT91: Enable PLLB for USB At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly. This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs: - AT91CAP9 - AT91SAM9260 - AT91SAM9263 This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 atmel boards. Signed-off-by: Stelian Pop Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/afeb9260.h | 1 + include/configs/at91cap9adk.h | 3 +++ include/configs/at91sam9260ek.h | 2 ++ include/configs/at91sam9261ek.h | 1 + include/configs/at91sam9263ek.h | 2 ++ 5 files changed, 9 insertions(+) (limited to 'include') diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 755952fe21..f077ad90f4 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -29,6 +29,7 @@ /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ +#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 667e0496b6..aeb06ac64b 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -137,6 +138,8 @@ #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 81c8d39b24..fbc470fbe0 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -123,6 +124,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index efe35a4b76..bd668235d3 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -137,6 +137,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index ef5b666311..a2b09ca9f7 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -143,6 +144,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -- cgit From 711e2b2af820d21d9931d4cf8057d3894600fd54 Mon Sep 17 00:00:00 2001 From: "Steven A. Falco" Date: Thu, 20 Nov 2008 14:37:57 -0500 Subject: ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.h The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed. The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, and are unused, so they can be removed too. A definition for SDR0_DDRCFG is added. Signed-off-by: Steven A. Falco Signed-off-by: Stefan Roese --- include/ppc440.h | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/ppc440.h b/include/ppc440.h index ea0ac86d08..4d2157a8f2 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -169,18 +169,9 @@ #define sdr_ecid1 0x0081 #define sdr_ecid2 0x0082 #define sdr_jtag 0x00c0 -#if !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) -#define sdr_ddrdl 0x00e0 -#else -#define sdr_cfg 0x00e0 -#define SDR_CFG_LT2_MASK 0x01000000 /* Leakage test 2*/ -#define SDR_CFG_64_32BITS_MASK 0x01000000 /* Switch DDR 64 bits or 32 bits */ -#define SDR_CFG_32BITS 0x00000000 /* 32 bits */ -#define SDR_CFG_64BITS 0x01000000 /* 64 bits */ -#define SDR_CFG_MC_V2518_MASK 0x02000000 /* Low VDD2518 (2.5 or 1.8V) */ -#define SDR_CFG_MC_V25 0x00000000 /* 2.5 V */ -#define SDR_CFG_MC_V18 0x02000000 /* 1.8 V */ -#endif /* !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) */ +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#define SDR0_DDRCFG 0x00e0 +#endif /* defined(CONFIG_440EPX) || defined(CONFIG_440GRX) */ #define sdr_ebc 0x0100 #define sdr_uart0 0x0120 /* UART0 Config */ #define sdr_uart1 0x0121 /* UART1 Config */ -- cgit From b14ca4b61a681f75f3125676e09d7ce6af66e927 Mon Sep 17 00:00:00 2001 From: Dave Mitchell Date: Thu, 20 Nov 2008 14:00:49 -0600 Subject: ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and L2 cache DCRs from ppc440.h to this new header. Also converted these DCR defines from lowercase to uppercase and modified referencing modules to use them. Signed-off-by: Dave Mitchell Signed-off-by: Stefan Roese --- include/asm-ppc/ppc4xx-isram.h | 75 ++++++++++++++++++++++++++++++++++++++++++ include/ppc440.h | 39 ---------------------- 2 files changed, 75 insertions(+), 39 deletions(-) create mode 100644 include/asm-ppc/ppc4xx-isram.h (limited to 'include') diff --git a/include/asm-ppc/ppc4xx-isram.h b/include/asm-ppc/ppc4xx-isram.h new file mode 100644 index 0000000000..d6d17ac961 --- /dev/null +++ b/include/asm-ppc/ppc4xx-isram.h @@ -0,0 +1,75 @@ + +/* + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _PPC4xx_ISRAM_H_ +#define _PPC4xx_ISRAM_H_ + +/* + * Internal SRAM + */ +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#define ISRAM0_DCR_BASE 0x380 +#else +#define ISRAM0_DCR_BASE 0x020 +#endif +#define ISRAM0_SB0CR (ISRAM0_DCR_BASE+0x00) /* SRAM bank config 0*/ +#define ISRAM0_SB1CR (ISRAM0_DCR_BASE+0x01) /* SRAM bank config 1*/ +#define ISRAM0_SB2CR (ISRAM0_DCR_BASE+0x02) /* SRAM bank config 2*/ +#define ISRAM0_SB3CR (ISRAM0_DCR_BASE+0x03) /* SRAM bank config 3*/ +#define ISRAM0_BEAR (ISRAM0_DCR_BASE+0x04) /* SRAM bus error addr reg */ +#define ISRAM0_BESR0 (ISRAM0_DCR_BASE+0x05) /* SRAM bus error status reg 0 */ +#define ISRAM0_BESR1 (ISRAM0_DCR_BASE+0x06) /* SRAM bus error status reg 1 */ +#define ISRAM0_PMEG (ISRAM0_DCR_BASE+0x07) /* SRAM power management */ +#define ISRAM0_CID (ISRAM0_DCR_BASE+0x08) /* SRAM bus core id reg */ +#define ISRAM0_REVID (ISRAM0_DCR_BASE+0x09) /* SRAM bus revision id reg */ +#define ISRAM0_DPC (ISRAM0_DCR_BASE+0x0a) /* SRAM data parity check reg */ + +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) +#define ISRAM1_DCR_BASE 0x0B0 +#define ISRAM1_SB0CR (ISRAM1_DCR_BASE+0x00) /* SRAM1 bank config 0*/ +#define ISRAM1_BEAR (ISRAM1_DCR_BASE+0x04) /* SRAM1 bus error addr reg */ +#define ISRAM1_BESR0 (ISRAM1_DCR_BASE+0x05) /* SRAM1 bus error status reg 0 */ +#define ISRAM1_BESR1 (ISRAM1_DCR_BASE+0x06) /* SRAM1 bus error status reg 1 */ +#define ISRAM1_PMEG (ISRAM1_DCR_BASE+0x07) /* SRAM1 power management */ +#define ISRAM1_CID (ISRAM1_DCR_BASE+0x08) /* SRAM1 bus core id reg */ +#define ISRAM1_REVID (ISRAM1_DCR_BASE+0x09) /* SRAM1 bus revision id reg */ +#define ISRAM1_DPC (ISRAM1_DCR_BASE+0x0a) /* SRAM1 data parity check reg */ +#endif /* CONFIG_460EX || CONFIG_460GT */ + +/* + * L2 Cache + */ +#if defined (CONFIG_440GX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ + defined(CONFIG_460SX) +#define L2_CACHE_BASE 0x030 +#define L2_CACHE_CFG (L2_CACHE_BASE+0x00) /* L2 Cache Config */ +#define L2_CACHE_CMD (L2_CACHE_BASE+0x01) /* L2 Cache Command */ +#define L2_CACHE_ADDR (L2_CACHE_BASE+0x02) /* L2 Cache Address */ +#define L2_CACHE_DATA (L2_CACHE_BASE+0x03) /* L2 Cache Data */ +#define L2_CACHE_STAT (L2_CACHE_BASE+0x04) /* L2 Cache Status */ +#define L2_CACHE_CVER (L2_CACHE_BASE+0x05) /* L2 Cache Revision ID */ +#define L2_CACHE_SNP0 (L2_CACHE_BASE+0x06) /* L2 Cache Snoop reg 0 */ +#define L2_CACHE_SNP1 (L2_CACHE_BASE+0x07) /* L2 Cache Snoop reg 1 */ +#endif /* CONFIG_440GX */ + +#endif /* _PPC4xx_ISRAM_H_ */ diff --git a/include/ppc440.h b/include/ppc440.h index 4d2157a8f2..01f6eaf35e 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -607,45 +607,6 @@ #endif /* 440EP || 440GR || 440EPX || 440GRX */ -/*----------------------------------------------------------------------------- - | L2 Cache - +----------------------------------------------------------------------------*/ -#if defined (CONFIG_440GX) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ - defined(CONFIG_460SX) -#define L2_CACHE_BASE 0x030 -#define l2_cache_cfg (L2_CACHE_BASE+0x00) /* L2 Cache Config */ -#define l2_cache_cmd (L2_CACHE_BASE+0x01) /* L2 Cache Command */ -#define l2_cache_addr (L2_CACHE_BASE+0x02) /* L2 Cache Address */ -#define l2_cache_data (L2_CACHE_BASE+0x03) /* L2 Cache Data */ -#define l2_cache_stat (L2_CACHE_BASE+0x04) /* L2 Cache Status */ -#define l2_cache_cver (L2_CACHE_BASE+0x05) /* L2 Cache Revision ID */ -#define l2_cache_snp0 (L2_CACHE_BASE+0x06) /* L2 Cache Snoop reg 0 */ -#define l2_cache_snp1 (L2_CACHE_BASE+0x07) /* L2 Cache Snoop reg 1 */ - -#endif /* CONFIG_440GX */ - -/*----------------------------------------------------------------------------- - | Internal SRAM - +----------------------------------------------------------------------------*/ -#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) -#define ISRAM0_DCR_BASE 0x380 -#else -#define ISRAM0_DCR_BASE 0x020 -#endif -#define isram0_sb0cr (ISRAM0_DCR_BASE+0x00) /* SRAM bank config 0*/ -#define isram0_sb1cr (ISRAM0_DCR_BASE+0x01) /* SRAM bank config 1*/ -#define isram0_sb2cr (ISRAM0_DCR_BASE+0x02) /* SRAM bank config 2*/ -#define isram0_sb3cr (ISRAM0_DCR_BASE+0x03) /* SRAM bank config 3*/ -#define isram0_bear (ISRAM0_DCR_BASE+0x04) /* SRAM bus error addr reg */ -#define isram0_besr0 (ISRAM0_DCR_BASE+0x05) /* SRAM bus error status reg 0 */ -#define isram0_besr1 (ISRAM0_DCR_BASE+0x06) /* SRAM bus error status reg 1 */ -#define isram0_pmeg (ISRAM0_DCR_BASE+0x07) /* SRAM power management */ -#define isram0_cid (ISRAM0_DCR_BASE+0x08) /* SRAM bus core id reg */ -#define isram0_revid (ISRAM0_DCR_BASE+0x09) /* SRAM bus revision id reg */ -#define isram0_dpc (ISRAM0_DCR_BASE+0x0a) /* SRAM data parity check reg */ - #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) -- cgit From ddf45cc758d394591fb9bcdcbe96530f733f2bce Mon Sep 17 00:00:00 2001 From: Dave Mitchell Date: Thu, 20 Nov 2008 14:09:50 -0600 Subject: ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization Expanded OCM TLB to allow access to 64K OCM as well as 256K of internal SRAM. Adjusted internal SRAM initialization to match updated user manual recommendation. OCM & ISRAM are now mapped as follows: physical virtual size ISRAM 0x4_0000_0000 0xE300_0000 256k OCM 0x4_0004_0000 0xE304_0000 64k A single TLB was used for this mapping. Signed-off-by: Dave Mitchell Signed-off-by: Stefan Roese --- include/configs/canyonlands.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index f8e880181b..faf630496d 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -102,7 +102,7 @@ #define CONFIG_SYS_FLASH_BASE_PHYS (((u64)CONFIG_SYS_FLASH_BASE_PHYS_H << 32) | \ (u64)CONFIG_SYS_FLASH_BASE_PHYS_L) -#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 16k */ +#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 64k */ #define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */ #define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000 -- cgit From 1a6a00dcc5bdfc6e9b4b00f39c1f583a7f96fc7f Mon Sep 17 00:00:00 2001 From: Yuri Tikhonov Date: Fri, 14 Nov 2008 16:19:19 +0300 Subject: ppc4xx: katmai: Change default config This patch enables support for EXT2, and increases the CONFIG_SYS_BOOTMAPSZ size for the default configuration of the katmai boards to use them as the RAID-reference AMCC setups. EXT2 enabling allows one to boot kernels from the EXT2 formatted Compact Flash cards. CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the Linux kernels, which use PAGE_SIZE of 256KB. Otherwise, the memory area with DTB file (which is placed at the end of the bootmap area) will turn out to be overlapped with the BSS segment of the 256KB kernel, and zeroed in early_init() of Linux. Actually, increasing of the bootmap size could be done via setting of the bootm_size U-Boot variable, but it looks like the current U-Boot implementation have some bootm_size- related functionality lost. In many places through the U-Boot code the CONFIG_SYS_BOOTMAPSZ definition is used directly (instead of trying to read the corresponding value from the environment). The same is truth for the boot_jump_linux() function in lib_ppc/bootm.c, where U-Boot transfers control to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size) value to the booting kernel. Signed-off-by: Yuri Tikhonov Signed-off-by: Ilya Yanok Signed-off-by: Stefan Roese --- include/configs/katmai.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 58694cca4b..ea6cf0d23f 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -53,6 +53,13 @@ #define CONFIG_HOSTNAME katmai #include "amcc-common.h" +/* + * For booting 256K-paged Linux we should have 16MB of memory + * for Linux initial memory map + */ +#undef CONFIG_SYS_BOOTMAPSZ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #undef CONFIG_SHOW_BOOT_PROGRESS @@ -189,6 +196,7 @@ /* * Commands additional to the ones defined in amcc-common.h */ +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_DATE #define CONFIG_CMD_PCI #define CONFIG_CMD_SDRAM -- cgit From ebc9784ce6528385bb8d2558e783622d4bbf20f8 Mon Sep 17 00:00:00 2001 From: Piotr Ziecik Date: Thu, 20 Nov 2008 15:17:38 +0100 Subject: cfi_flash: Export flash_sector_size() function. Export flash_sector_size() function from drivers/mtd/cfi_flash.c, so that it can be used in the upcoming cfi-mtd driver. Signed-off-by: Piotr Ziecik Signed-off-by: Stefan Roese --- include/flash.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/flash.h b/include/flash.h index a6e91b5e69..8a00c2f899 100644 --- a/include/flash.h +++ b/include/flash.h @@ -58,6 +58,8 @@ typedef struct { #endif } flash_info_t; +typedef unsigned long flash_sect_t; + /* * Values for the width of the port */ @@ -92,6 +94,7 @@ extern int flash_erase (flash_info_t *, int, int); extern int flash_sect_erase (ulong addr_first, ulong addr_last); extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last); extern int flash_sect_roundb (ulong *addr); +extern unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect); /* common/flash.c */ extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info); -- cgit From 6ea808efdf9aa5d9067fbfac32acde8539129ed2 Mon Sep 17 00:00:00 2001 From: Piotr Ziecik Date: Mon, 17 Nov 2008 15:49:32 +0100 Subject: cfi_flash: Add interface for flash verbosity control Add interface for flash verbosity control. It allows to disable output from low-level flash API. It is useful when calling these low-level functions from context other than flash commands (for example the MTD/CFI interface implmentation). Signed-off-by: Piotr Ziecik Signed-off-by: Stefan Roese --- include/flash.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/flash.h b/include/flash.h index 8a00c2f899..05fa57240b 100644 --- a/include/flash.h +++ b/include/flash.h @@ -95,6 +95,7 @@ extern int flash_sect_erase (ulong addr_first, ulong addr_last); extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last); extern int flash_sect_roundb (ulong *addr); extern unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect); +extern void flash_set_verbose(uint); /* common/flash.c */ extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info); -- cgit From 91809ed51d8327a8dbbf29aa98a091154c282171 Mon Sep 17 00:00:00 2001 From: Piotr Ziecik Date: Mon, 17 Nov 2008 15:57:58 +0100 Subject: cfi-mtd: Add cfi-mtd driver. Add cfi-mtd driver, which exports CFI flash to MTD layer. This allows CFI flash devices to be used from MTD layer. Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD option. Initialization is done by calling cfi_mtd_init() from flash_init(). Signed-off-by: Piotr Ziecik Signed-off-by: Stefan Roese --- include/flash.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/flash.h b/include/flash.h index 05fa57240b..6e2981c5ae 100644 --- a/include/flash.h +++ b/include/flash.h @@ -86,6 +86,9 @@ typedef unsigned long flash_sect_t; /* convert between bit value and numeric value */ #define CFI_FLASH_SHIFT_WIDTH 3 + +/* cfi-mtd device name */ +#define CFI_MTD_DEV_NAME "cfi-mtd" /* Prototypes */ extern unsigned long flash_init (void); @@ -103,6 +106,11 @@ extern int flash_write (char *, ulong, ulong); extern flash_info_t *addr2info (ulong); extern int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); +/* drivers/mtd/cfi_mtd.c */ +#ifdef CONFIG_FLASH_CFI_MTD +extern int cfi_mtd_init(void); +#endif + /* board/?/flash.c */ #if defined(CONFIG_SYS_FLASH_PROTECTION) extern int flash_real_protect(flash_info_t *info, long sector, int prot); -- cgit From 8052352f20b33bef8f9872fc983eac73d4693c38 Mon Sep 17 00:00:00 2001 From: Jens Scharsig Date: Tue, 18 Nov 2008 10:48:46 +0100 Subject: at91rm9200: fix broken boot from nor flash This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if CONFIG_AT91RM9200 is defined and nor preloader is used. Signed-off-by: Jens Scharsig --- include/configs/at91rm9200dk.h | 2 ++ include/configs/cmc_pu2.h | 2 ++ include/configs/csb637.h | 2 ++ include/configs/kb9202.h | 2 ++ include/configs/mp2usb.h | 2 ++ 5 files changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 633a053000..5c239d7bf7 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -72,6 +72,8 @@ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#else +#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* * Size of malloc() pool diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h index 527921e8fc..cdd308d8b9 100644 --- a/include/configs/cmc_pu2.h +++ b/include/configs/cmc_pu2.h @@ -71,6 +71,8 @@ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#else +#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* diff --git a/include/configs/csb637.h b/include/configs/csb637.h index 38fd25cb66..682db447dd 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -72,6 +72,8 @@ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#else +#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* * Size of malloc() pool diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h index 55cda329ee..1ce8c6974a 100644 --- a/include/configs/kb9202.h +++ b/include/configs/kb9202.h @@ -51,6 +51,8 @@ #define CONFIG_INITRD_TAG 1 #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT /* undef this for direct boot from */ + /* NOR flash without preloader */ #define CONFIG_SYS_LONGHELP diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index 2ffeae608b..cbbdb0c77e 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -76,6 +76,8 @@ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#else +#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* -- cgit From 24eea623d4974a169026a975ba12fb23d48154b1 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Mon, 24 Nov 2008 15:11:10 +0100 Subject: ppc4xx: Remove unused features This patch disables some unused features from the PCI405 configuration to keep U-Boot image size below 192k. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- include/configs/PCI405.h | 57 ++++++------------------------------------------ 1 file changed, 7 insertions(+), 50 deletions(-) (limited to 'include') diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index 0393366b5c..d0a37d7bc5 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -60,39 +60,24 @@ #define CONFIG_PREBOOT /* enable preboot variable */ -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -#define CONFIG_PPC4xx_EMAC -#define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_PHY_ADDR 0 /* PHY address */ - -#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_ITEST +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + #define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ #define CONFIG_CMD_ELF -#define CONFIG_CMD_DATE #define CONFIG_CMD_I2C #define CONFIG_CMD_BSP #define CONFIG_CMD_EEPROM - #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ @@ -102,7 +87,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ @@ -166,15 +150,9 @@ #define CONFIG_SYS_PCI_PTM1MS 0xff000001 /* 16MB, enable hard-wired to 1 */ #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ -#if 0 /* test-only */ -#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ -#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ -#else #define CONFIG_SYS_PCI_PTM2LA 0xef600000 /* point to internal regs */ #define CONFIG_SYS_PCI_PTM2MS 0xffe00001 /* 2MB, enable */ #define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */ -#endif /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -215,22 +193,10 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#if 0 /* Use NVRAM for environment variables */ -/*----------------------------------------------------------------------- - * NVRAM organization - */ -#define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */ -#define CONFIG_ENV_SIZE 0x0ff8 /* Size of Environment vars */ -#define CONFIG_ENV_ADDR \ - (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-(CONFIG_ENV_SIZE+8)) /* Env */ - -#else /* Use EEPROM for environment variables */ - #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CONFIG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars*/ /* total size of a CAT24WC08 is 1024 bytes */ -#endif #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0200000 /* NVRAM base address */ #define CONFIG_SYS_NVRAM_SIZE (32*1024) /* NVRAM size */ @@ -327,14 +293,6 @@ /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in data cache) */ -#if 0 /* test-only */ -#define CONFIG_SYS_INIT_DCACHE_CS 7 /* use cs # 7 for data cache memory */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* use data cache */ -#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#else /* use on chip memory ( OCM ) for temperary stack until sdram is tested */ #define CONFIG_SYS_TEMP_STACK_OCM 1 /* On Chip Memory location */ @@ -346,7 +304,6 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#endif /* * Internal Definitions -- cgit From de39f8c19d7c12017248c49d432dcb81db68f724 Mon Sep 17 00:00:00 2001 From: Michael Trimarchi Date: Wed, 26 Nov 2008 17:41:34 +0100 Subject: USB style patch, 80 chars strict MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit USB Code style patch Signed-off-by: Michael Trimarchi Signed-off-by: Remy Böhmer --- include/usb.h | 222 ++++++++++++++++++++++++++++++++-------------------------- 1 file changed, 124 insertions(+), 98 deletions(-) (limited to 'include') diff --git a/include/usb.h b/include/usb.h index 9a2e72c9d0..84a77b2f8b 100644 --- a/include/usb.h +++ b/include/usb.h @@ -43,89 +43,88 @@ /* String descriptor */ struct usb_string_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned short wData[1]; + unsigned char bLength; + unsigned char bDescriptorType; + unsigned short wData[1]; } __attribute__ ((packed)); /* device request (setup) */ struct devrequest { - unsigned char requesttype; - unsigned char request; - unsigned short value; - unsigned short index; - unsigned short length; + unsigned char requesttype; + unsigned char request; + unsigned short value; + unsigned short index; + unsigned short length; } __attribute__ ((packed)); - /* All standard descriptors have these 2 fields in common */ struct usb_descriptor_header { - unsigned char bLength; - unsigned char bDescriptorType; + unsigned char bLength; + unsigned char bDescriptorType; } __attribute__ ((packed)); /* Device descriptor */ struct usb_device_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned short bcdUSB; - unsigned char bDeviceClass; - unsigned char bDeviceSubClass; - unsigned char bDeviceProtocol; - unsigned char bMaxPacketSize0; - unsigned short idVendor; - unsigned short idProduct; - unsigned short bcdDevice; - unsigned char iManufacturer; - unsigned char iProduct; - unsigned char iSerialNumber; - unsigned char bNumConfigurations; + unsigned char bLength; + unsigned char bDescriptorType; + unsigned short bcdUSB; + unsigned char bDeviceClass; + unsigned char bDeviceSubClass; + unsigned char bDeviceProtocol; + unsigned char bMaxPacketSize0; + unsigned short idVendor; + unsigned short idProduct; + unsigned short bcdDevice; + unsigned char iManufacturer; + unsigned char iProduct; + unsigned char iSerialNumber; + unsigned char bNumConfigurations; } __attribute__ ((packed)); - /* Endpoint descriptor */ struct usb_endpoint_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned char bEndpointAddress; - unsigned char bmAttributes; - unsigned short wMaxPacketSize; - unsigned char bInterval; - unsigned char bRefresh; - unsigned char bSynchAddress; - + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bEndpointAddress; + unsigned char bmAttributes; + unsigned short wMaxPacketSize; + unsigned char bInterval; + unsigned char bRefresh; + unsigned char bSynchAddress; } __attribute__ ((packed)); + /* Interface descriptor */ struct usb_interface_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned char bInterfaceNumber; - unsigned char bAlternateSetting; - unsigned char bNumEndpoints; - unsigned char bInterfaceClass; - unsigned char bInterfaceSubClass; - unsigned char bInterfaceProtocol; - unsigned char iInterface; - - unsigned char no_of_ep; - unsigned char num_altsetting; - unsigned char act_altsetting; + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bInterfaceNumber; + unsigned char bAlternateSetting; + unsigned char bNumEndpoints; + unsigned char bInterfaceClass; + unsigned char bInterfaceSubClass; + unsigned char bInterfaceProtocol; + unsigned char iInterface; + + unsigned char no_of_ep; + unsigned char num_altsetting; + unsigned char act_altsetting; + struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; } __attribute__ ((packed)); /* Configuration descriptor information.. */ struct usb_config_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned short wTotalLength; - unsigned char bNumInterfaces; - unsigned char bConfigurationValue; - unsigned char iConfiguration; - unsigned char bmAttributes; - unsigned char MaxPower; - - unsigned char no_of_if; /* number of interfaces */ + unsigned char bLength; + unsigned char bDescriptorType; + unsigned short wTotalLength; + unsigned char bNumInterfaces; + unsigned char bConfigurationValue; + unsigned char iConfiguration; + unsigned char bmAttributes; + unsigned char MaxPower; + + unsigned char no_of_if; /* number of interfaces */ struct usb_interface_descriptor if_desc[USB_MAXINTERFACES]; } __attribute__ ((packed)); @@ -138,19 +137,20 @@ enum { }; struct usb_device { - int devnum; /* Device number on USB bus */ - int slow; /* Slow device? */ - char mf[32]; /* manufacturer */ - char prod[32]; /* product */ - char serial[32]; /* serial number */ + int devnum; /* Device number on USB bus */ + int slow; /* Slow device? */ + char mf[32]; /* manufacturer */ + char prod[32]; /* product */ + char serial[32]; /* serial number */ /* Maximum packet size; one of: PACKET_SIZE_* */ int maxpacketsize; /* one bit for each endpoint ([0] = IN, [1] = OUT) */ unsigned int toggle[2]; - /* endpoint halts; one bit per endpoint # & direction; */ + /* endpoint halts; one bit per endpoint # & direction; + * [0] = IN, [1] = OUT + */ unsigned int halted[2]; - /* [0] = IN, [1] = OUT */ int epmaxpacketin[16]; /* INput endpoint specific maximums */ int epmaxpacketout[16]; /* OUTput endpoint specific maximums */ @@ -180,21 +180,22 @@ struct usb_device { */ #if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \ - defined(CONFIG_USB_OHCI_NEW) || defined (CONFIG_USB_SL811HS) || \ + defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_SL811HS) || \ defined(CONFIG_USB_ISP116X_HCD) || defined(CONFIG_USB_R8A66597_HCD) int usb_lowlevel_init(void); int usb_lowlevel_stop(void); -int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len); +int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, + void *buffer, int transfer_len); int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int transfer_len,struct devrequest *setup); + int transfer_len, struct devrequest *setup); int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len, int interval); void usb_event_poll(void); /* Defines */ -#define USB_UHCI_VEND_ID 0x8086 -#define USB_UHCI_DEV_ID 0x7112 +#define USB_UHCI_VEND_ID 0x8086 +#define USB_UHCI_DEV_ID 0x7112 #else #error USB Lowlevel not defined @@ -221,8 +222,9 @@ int usb_stop(void); /* stop the USB Controller */ int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol); -int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id); -struct usb_device * usb_get_dev_index(int index); +int usb_set_idle(struct usb_device *dev, int ifnum, int duration, + int report_id); +struct usb_device *usb_get_dev_index(int index); int usb_control_msg(struct usb_device *dev, unsigned int pipe, unsigned char request, unsigned char requesttype, unsigned short value, unsigned short index, @@ -230,14 +232,17 @@ int usb_control_msg(struct usb_device *dev, unsigned int pipe, int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout); int usb_submit_int_msg(struct usb_device *dev, unsigned long pipe, - void *buffer,int transfer_len, int interval); + void *buffer, int transfer_len, int interval); void usb_disable_asynch(int disable); -int usb_maxpacket(struct usb_device *dev,unsigned long pipe); -void __inline__ wait_ms(unsigned long ms); -int usb_get_configuration_no(struct usb_device *dev,unsigned char *buffer,int cfgno); -int usb_get_report(struct usb_device *dev, int ifnum, unsigned char type, unsigned char id, void *buf, int size); +int usb_maxpacket(struct usb_device *dev, unsigned long pipe); +inline void wait_ms(unsigned long ms); +int usb_get_configuration_no(struct usb_device *dev, unsigned char *buffer, + int cfgno); +int usb_get_report(struct usb_device *dev, int ifnum, unsigned char type, + unsigned char id, void *buf, int size); int usb_get_class_descriptor(struct usb_device *dev, int ifnum, - unsigned char type, unsigned char id, void *buf, int size); + unsigned char type, unsigned char id, void *buf, + int size); int usb_clear_halt(struct usb_device *dev, int pipe); int usb_string(struct usb_device *dev, int index, char *buf, size_t size); int usb_set_interface(struct usb_device *dev, int interface, int alternate); @@ -247,7 +252,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); #define __swap_16(x) \ ({ unsigned short x_ = (unsigned short)x; \ (unsigned short)( \ - ((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8) ); \ + ((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8)); \ }) #define __swap_32(x) \ ({ unsigned long x_ = (unsigned long)x; \ @@ -255,7 +260,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); ((x_ & 0x000000FFUL) << 24) | \ ((x_ & 0x0000FF00UL) << 8) | \ ((x_ & 0x00FF0000UL) >> 8) | \ - ((x_ & 0xFF000000UL) >> 24) ); \ + ((x_ & 0xFF000000UL) >> 24)); \ }) #ifdef LITTLEENDIAN @@ -286,12 +291,14 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); * unsigned int. The encoding is: * * - max size: bits 0-1 (00 = 8, 01 = 16, 10 = 32, 11 = 64) - * - direction: bit 7 (0 = Host-to-Device [Out], 1 = Device-to-Host [In]) + * - direction: bit 7 (0 = Host-to-Device [Out], + * (1 = Device-to-Host [In]) * - device: bits 8-14 * - endpoint: bits 15-18 * - Data0/1: bit 19 * - speed: bit 26 (0 = Full, 1 = Low Speed) - * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, 10 = control, 11 = bulk) + * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, + * 10 = control, 11 = bulk) * * Why? Because it's arbitrary, and whatever encoding we select is really * up to us. This one happens to share a lot of bit positions with the UHCI @@ -300,24 +307,42 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); */ /* Create various pipes... */ #define create_pipe(dev,endpoint) \ - (((dev)->devnum << 8) | (endpoint << 15) | ((dev)->slow << 26) | (dev)->maxpacketsize) -#define default_pipe(dev) ((dev)->slow <<26) - -#define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint)) -#define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | create_pipe(dev,endpoint)) -#define usb_rcvisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | create_pipe(dev,endpoint)) -#define usb_rcvbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | create_pipe(dev,endpoint)) -#define usb_rcvintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_snddefctrl(dev) ((PIPE_CONTROL << 30) | default_pipe(dev)) -#define usb_rcvdefctrl(dev) ((PIPE_CONTROL << 30) | default_pipe(dev) | USB_DIR_IN) + (((dev)->devnum << 8) | (endpoint << 15) | \ + ((dev)->slow << 26) | (dev)->maxpacketsize) +#define default_pipe(dev) ((dev)->slow << 26) + +#define usb_sndctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \ + create_pipe(dev, endpoint)) +#define usb_rcvctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \ + create_pipe(dev, endpoint) | \ + USB_DIR_IN) +#define usb_sndisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \ + create_pipe(dev, endpoint)) +#define usb_rcvisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \ + create_pipe(dev, endpoint) | \ + USB_DIR_IN) +#define usb_sndbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \ + create_pipe(dev, endpoint)) +#define usb_rcvbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \ + create_pipe(dev, endpoint) | \ + USB_DIR_IN) +#define usb_sndintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \ + create_pipe(dev, endpoint)) +#define usb_rcvintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \ + create_pipe(dev, endpoint) | \ + USB_DIR_IN) +#define usb_snddefctrl(dev) ((PIPE_CONTROL << 30) | \ + default_pipe(dev)) +#define usb_rcvdefctrl(dev) ((PIPE_CONTROL << 30) | \ + default_pipe(dev) | \ + USB_DIR_IN) /* The D0/D1 toggle bits */ #define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> ep) & 1) #define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << ep)) -#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << ep)) | ((bit) << ep)) +#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = \ + ((dev)->toggle[out] & \ + ~(1 << ep)) | ((bit) << ep)) /* Endpoint halt control/status */ #define usb_endpoint_out(ep_dir) (((ep_dir >> 7) & 1) ^ 1) @@ -325,7 +350,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); #define usb_endpoint_running(dev, ep, out) ((dev)->halted[out] &= ~(1 << (ep))) #define usb_endpoint_halted(dev, ep, out) ((dev)->halted[out] & (1 << (ep))) -#define usb_packetid(pipe) (((pipe) & USB_DIR_IN) ? USB_PID_IN : USB_PID_OUT) +#define usb_packetid(pipe) (((pipe) & USB_DIR_IN) ? USB_PID_IN : \ + USB_PID_OUT) #define usb_pipeout(pipe) ((((pipe) >> 7) & 1) ^ 1) #define usb_pipein(pipe) (((pipe) >> 7) & 1) @@ -365,7 +391,7 @@ struct usb_hub_descriptor { unsigned char bHubContrCurrent; unsigned char DeviceRemovable[(USB_MAXCHILDREN+1+7)/8]; unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8]; - /* DeviceRemovable and PortPwrCtrlMask want to be variable-length + /* DeviceRemovable and PortPwrCtrlMask want to be variable-length bitmaps that hold max 255 entries. (bit0 is ignored) */ } __attribute__ ((packed)); -- cgit From f698738e46cb461e28c2d58228bb34a2fcf5a475 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 20 Nov 2008 14:02:56 -0600 Subject: 86xx: Fix non-64-bit compilation problems. Introducing 64-bit (36-bit) support for the MPC8641HPCN failed to accomodate the other two 86xx boards. Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH} CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L} with nominal 32-bit values. Signed-off-by: Jon Loeliger Acked-by: Becky Bruce --- include/configs/MPC8610HPCD.h | 14 ++++++++++++++ include/configs/sbc8641d.h | 14 ++++++++++++++ 2 files changed, 28 insertions(+) (limited to 'include') diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index f2fe4a6cf9..56850271cb 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -81,6 +81,9 @@ #define CONFIG_SYS_CCSRBAR 0xe0000000 /* relocated CCSRBAR */ #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 + #define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000) @@ -388,6 +391,17 @@ #define CONFIG_SYS_IBAT3L (CONFIG_SYS_CCSRBAR | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT3U CONFIG_SYS_DBAT3U +#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR) +#define CONFIG_SYS_CCSR_DEFAULT_DBATL (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATL_PP_RW | BATL_CACHEINHIBIT \ + | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_CCSR_DEFAULT_DBATU (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_CCSR_DEFAULT_IBATL (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_CCSR_DEFAULT_IBATU CONFIG_SYS_CCSR_DEFAULT_DBATU +#endif + /* * BAT4 32M Cache-inhibited, guarded * 0xe200_0000 1M PCI-Express 2 I/O diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 45d81792e0..fa97827259 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -104,6 +104,9 @@ #define CONFIG_SYS_CCSRBAR 0xf8000000 /* relocated CCSRBAR */ #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 + #define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000) #define CONFIG_SYS_PCI2_ADDR (CONFIG_SYS_CCSRBAR+0x9000) @@ -433,6 +436,17 @@ #define CONFIG_SYS_IBAT3L (CONFIG_SYS_CCSRBAR | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT3U CONFIG_SYS_DBAT3U +#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR) +#define CONFIG_SYS_CCSR_DEFAULT_DBATL (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATL_PP_RW | BATL_CACHEINHIBIT \ + | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_CCSR_DEFAULT_DBATU (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_CCSR_DEFAULT_IBATL (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_CCSR_DEFAULT_IBATU CONFIG_SYS_CCSR_DEFAULT_DBATU +#endif + /* * BAT4 32M Cache-inhibited, guarded * 0xe200_0000 16M PCI-Express 1 I/O -- cgit From 801a194616d95e6fc426a176d9615ccbf9876c7f Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 20 Nov 2008 12:01:02 -0600 Subject: Removed unused CONFIG_L1_INIT_RAM symbol. Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger --- include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349ITX.h | 1 - include/configs/MPC8536DS.h | 2 -- include/configs/MPC8540ADS.h | 1 - include/configs/MPC8540EVAL.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 2 -- include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8572DS.h | 2 -- include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/PM854.h | 1 - include/configs/PM856.h | 1 - include/configs/SBC8540.h | 1 - include/configs/TQM834x.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/sbc8349.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8560.h | 1 - include/configs/sbc8641d.h | 1 - include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - 27 files changed, 30 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bbdc211c06..8e82aac7b7 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -193,7 +193,6 @@ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR|0x00000801) /* Port-size=8bit, MSEL=GPCM */ #define CONFIG_SYS_OR1_PRELIM 0xFFFFE8F0 /* length 32K */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index f633f24bd5..14cbc45715 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -266,7 +266,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index fff888abc6..f3eee23aa1 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -231,8 +231,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ #define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0 -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 79a52d9d1d..0b8fe6ad68 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -258,7 +258,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 46a141a2c0..21cf965ab3 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 7ada8a222b..eaa737b88e 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -281,7 +281,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index cdbbea60d6..ff24fa50eb 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -207,8 +207,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER) -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 083afba9a3..62955909e7 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -303,7 +303,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f9419ccd0f..40b40ed3af 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -279,7 +279,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index f67d489636..2b5b2c1064 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -254,7 +254,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ab3e6d6948..9e16bb451f 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -265,7 +265,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR5_PRELIM 0xf8010801 #define CONFIG_SYS_OR5_PRELIM 0xffff69f7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index c3693b8565..9f01f9aaa8 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -248,8 +248,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); | PIXIS_VCFGEN1_TSEC3SER \ | PIXIS_VCFGEN1_TSEC4SER) -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 56850271cb..27517e5b1f 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -209,7 +209,6 @@ #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 69b4c4410d..cd9889495d 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -268,7 +268,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index bc2d8253b0..4ecf8068ec 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -130,7 +130,6 @@ #define CONFIG_SYS_MONITOR_BASE TEXT_BASE #undef CONFIG_SYS_RAMBOOT -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/PM854.h b/include/configs/PM854.h index c3a7f816f9..1cc80ad214 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index b3bcf23c5c..698ad2d911 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 48c9339802..2853fba065 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -186,7 +186,6 @@ #define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) /* the size of CS5 needs to be >= 16M for TLB and LAW setups */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 2961a1b2a0..796030d060 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -171,7 +171,6 @@ extern int tqm834x_num_flash_banks; #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 2d4048a928..300f49079d 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -234,7 +234,6 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_CCSRBAR \ + 0x04010000) /* Initial RAM address */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 174149b616..0603e3c8a4 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -162,7 +162,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index aefd30a1ed..5ce4dac5e5 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -280,7 +280,6 @@ | CONFIG_SYS_LBC_LSDMR_RFEN \ ) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 43012754d2..e1d3a52b5e 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -180,7 +180,6 @@ #define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) /* the size of CS5 needs to be >= 16M for TLB and LAW setups */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index fa97827259..0012945758 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -244,7 +244,6 @@ #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c67db8f25d..e89b5a3fb0 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -167,7 +167,6 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End used area in RAM */ diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 2188e5401b..a0f2ed0daf 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -151,7 +151,6 @@ #define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 #define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index b0bd0508bb..f0990c6799 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 #define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ -- cgit From 4a129a57d923f7c15aa1f567028a80a32d66a100 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 30 Nov 2008 19:36:53 +0100 Subject: at91rm9200dk: Fix typo Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/at91rm9200dk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 5c239d7bf7..746f0ef102 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -1,7 +1,7 @@ /* * Rick Bronson * - * Configuation settings for the AT91RM9200DK board. + * Configuration settings for the AT91RM9200DK board. * * See file CREDITS for list of people who contributed to this * project. -- cgit From 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Tue, 28 Oct 2008 17:53:38 +0800 Subject: 85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu Acked-by: Andy Fleming --- include/configs/MPC8536DS.h | 2 +- include/configs/MPC8544DS.h | 2 +- include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8568MDS.h | 2 +- include/configs/MPC8572DS.h | 1 + 5 files changed, 5 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index fff888abc6..7c94c81a5d 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -99,7 +99,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_DDR_SPD #undef CONFIG_DDR_DLL -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index cdbbea60d6..a2d12aefd4 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -97,7 +97,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 083afba9a3..df26f101aa 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -100,7 +100,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ab3e6d6948..60e6041f0e 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -92,7 +92,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index c3693b8565..ed25c99684 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -99,6 +99,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_DDR_SPD #undef CONFIG_DDR_DLL +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -- cgit From 5a105a333dab6a23e92d763ce76d6f31d57f45df Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 20 Nov 2008 15:36:48 -0600 Subject: Removed unused CONFIG_L1_INIT_RAM symbol. Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger Acked-by: Andy Fleming --- include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349ITX.h | 1 - include/configs/MPC8536DS.h | 2 -- include/configs/MPC8540ADS.h | 1 - include/configs/MPC8540EVAL.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 2 -- include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8572DS.h | 2 -- include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/PM854.h | 1 - include/configs/PM856.h | 1 - include/configs/SBC8540.h | 1 - include/configs/TQM834x.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/sbc8349.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8560.h | 1 - include/configs/sbc8641d.h | 1 - include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - 27 files changed, 30 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bbdc211c06..8e82aac7b7 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -193,7 +193,6 @@ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR|0x00000801) /* Port-size=8bit, MSEL=GPCM */ #define CONFIG_SYS_OR1_PRELIM 0xFFFFE8F0 /* length 32K */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index f633f24bd5..14cbc45715 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -266,7 +266,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 7c94c81a5d..5a99d5fe79 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -231,8 +231,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ #define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0 -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 79a52d9d1d..0b8fe6ad68 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -258,7 +258,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 46a141a2c0..21cf965ab3 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 7ada8a222b..eaa737b88e 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -281,7 +281,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index a2d12aefd4..b31c2bb371 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -207,8 +207,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER) -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index df26f101aa..7a7e5a1457 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -303,7 +303,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f9419ccd0f..40b40ed3af 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -279,7 +279,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index f67d489636..2b5b2c1064 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -254,7 +254,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 60e6041f0e..8bdec65b7c 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -265,7 +265,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR5_PRELIM 0xf8010801 #define CONFIG_SYS_OR5_PRELIM 0xffff69f7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index ed25c99684..f17639a7c6 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -249,8 +249,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); | PIXIS_VCFGEN1_TSEC3SER \ | PIXIS_VCFGEN1_TSEC4SER) -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index f2fe4a6cf9..7d57c1c660 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -206,7 +206,6 @@ #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 69b4c4410d..cd9889495d 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -268,7 +268,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index bc2d8253b0..4ecf8068ec 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -130,7 +130,6 @@ #define CONFIG_SYS_MONITOR_BASE TEXT_BASE #undef CONFIG_SYS_RAMBOOT -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/PM854.h b/include/configs/PM854.h index c3a7f816f9..1cc80ad214 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index b3bcf23c5c..698ad2d911 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 48c9339802..2853fba065 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -186,7 +186,6 @@ #define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) /* the size of CS5 needs to be >= 16M for TLB and LAW setups */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 2961a1b2a0..796030d060 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -171,7 +171,6 @@ extern int tqm834x_num_flash_banks; #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 2d4048a928..300f49079d 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -234,7 +234,6 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_CCSRBAR \ + 0x04010000) /* Initial RAM address */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 174149b616..0603e3c8a4 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -162,7 +162,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index aefd30a1ed..5ce4dac5e5 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -280,7 +280,6 @@ | CONFIG_SYS_LBC_LSDMR_RFEN \ ) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 43012754d2..e1d3a52b5e 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -180,7 +180,6 @@ #define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) /* the size of CS5 needs to be >= 16M for TLB and LAW setups */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 45d81792e0..752a9058d5 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -241,7 +241,6 @@ #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c67db8f25d..e89b5a3fb0 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -167,7 +167,6 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End used area in RAM */ diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 2188e5401b..a0f2ed0daf 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -151,7 +151,6 @@ #define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 #define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index b0bd0508bb..f0990c6799 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 #define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ -- cgit From 9427ccde0355a2ebf47454e8e1be59f5b9864e08 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 1 Dec 2008 13:47:12 -0600 Subject: 85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser Signed-off-by: Andy Fleming --- include/asm-ppc/immap_85xx.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 75b451d201..e5046bef32 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1569,6 +1569,7 @@ typedef struct ccsr_gur { #define MPC85xx_PORDEVSR_SGMII3_DIS 0x08000000 #define MPC85xx_PORDEVSR_SGMII4_DIS 0x04000000 #define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000 +#define MPC85xx_PORDEVSR_PCI1 0x00800000 #define MPC85xx_PORDEVSR_IO_SEL 0x00780000 #define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000 #define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000 @@ -1647,8 +1648,6 @@ typedef struct ccsr_gur { char res15[61648]; /* 0xe0f30 to 0xefffff */ } ccsr_gur_t; -#define PORDEVSR_PCI (0x00800000) /* PCI Mode */ - #define CONFIG_SYS_MPC85xx_GUTS_OFFSET (0xE0000) #define CONFIG_SYS_MPC85xx_GUTS_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET) #define CONFIG_SYS_MPC85xx_ECM_OFFSET (0x0000) -- cgit From ea154a1781135d822eedee7567cc156089eae93c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 24 Nov 2008 10:25:14 -0600 Subject: FSL: Moved BR_PHYS_ADDR for localbus to common header The BR_PHYS_ADDR macro is useful on all machines that have local bus which is pretty much all 83xx/85xx/86xx chips. Additionally most 85xx & 86xx will need it if they want to support 36-bit physical addresses. Signed-off-by: Kumar Gala Acked-by: Andy Fleming --- include/asm-ppc/fsl_lbc.h | 8 ++++++++ include/configs/MPC8641HPCN.h | 9 --------- 2 files changed, 8 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index cac7bf6bf5..51fc5c13b0 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -69,6 +69,14 @@ #define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_ATOM | BR_V) #endif +/* Convert an address into the right format for the BR registers */ +#ifdef CONFIG_PHYS_64BIT +#define BR_PHYS_ADDR(x) ((unsigned long)((x & 0x0ffff8000ULL) | \ + ((x & 0x300000000ULL) >> 19))) +#else +#define BR_PHYS_ADDR(x) (x & 0xffff8000) +#endif + /* OR - Option Registers */ #define OR0 0x5004 /* Register offset to immr */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index cd9889495d..5a832961c2 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -186,17 +186,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_BASE_PHYS (CONFIG_SYS_FLASH_BASE \ | CONFIG_SYS_PHYS_ADDR_HIGH) - #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} -/* Convert an address into the right format for the BR registers */ -#ifdef CONFIG_PHYS_64BIT -#define BR_PHYS_ADDR(x) ((unsigned long)((x & 0x0ffff8000ULL) | \ - ((x & 0x300000000ULL) >> 19))) -#else -#define BR_PHYS_ADDR(x) (x & 0xffff8000) -#endif - #define CONFIG_SYS_BR0_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \ | 0x00001001) /* port size 16bit */ #define CONFIG_SYS_OR0_PRELIM 0xff806ff7 /* 8MB Boot Flash area*/ -- cgit From dc889e865356497d3e495570118c2245ebce2631 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Fri, 28 Nov 2008 20:16:58 +0800 Subject: 85xx: fix the wrong DDR settings for MPC8572DS The default DDR freq is 400MHz or 800M data rate, the old settings is pure wrong for the default case. Signed-off-by: Dave Liu Acked-by: Andy Fleming --- include/configs/MPC8572DS.h | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index f17639a7c6..9a66ca8102 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -115,22 +115,22 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define SPD_EEPROM_ADDRESS2 0x52 /* CTLR 1 DIMM 0 */ /* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 256 /* DDR is 256MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000001F -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80010102 /* Enable, no interleaving */ -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 -#define CONFIG_SYS_DDR_TIMING_0 0x00260802 -#define CONFIG_SYS_DDR_TIMING_1 0x3935d322 -#define CONFIG_SYS_DDR_TIMING_2 0x14904cc8 -#define CONFIG_SYS_DDR_MODE_1 0x00480432 +#define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */ +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000001F +#define CONFIG_SYS_DDR_CS0_CONFIG 0x80010202 /* Enable, no interleaving */ +#define CONFIG_SYS_DDR_TIMING_3 0x00020000 +#define CONFIG_SYS_DDR_TIMING_0 0x00260802 +#define CONFIG_SYS_DDR_TIMING_1 0x626b2634 +#define CONFIG_SYS_DDR_TIMING_2 0x062874cf +#define CONFIG_SYS_DDR_MODE_1 0x00440462 #define CONFIG_SYS_DDR_MODE_2 0x00000000 -#define CONFIG_SYS_DDR_INTERVAL 0x06180100 +#define CONFIG_SYS_DDR_INTERVAL 0x0c300100 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef -#define CONFIG_SYS_DDR_CLK_CTRL 0x03800000 -#define CONFIG_SYS_DDR_OCD_CTRL 0x00000000 +#define CONFIG_SYS_DDR_CLK_CTRL 0x00800000 +#define CONFIG_SYS_DDR_OCD_CTRL 0x00000000 #define CONFIG_SYS_DDR_OCD_STATUS 0x00000000 -#define CONFIG_SYS_DDR_CONTROL 0xC3008000 /* Type = DDR2 */ -#define CONFIG_SYS_DDR_CONTROL2 0x04400010 +#define CONFIG_SYS_DDR_CONTROL 0xc3000008 /* Type = DDR2 */ +#define CONFIG_SYS_DDR_CONTROL2 0x24400000 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d #define CONFIG_SYS_DDR_ERR_DIS 0x00000000 -- cgit From 3c2c2f427905040c1513d0c51d637689cba48346 Mon Sep 17 00:00:00 2001 From: Remy Bohmer Date: Thu, 27 Nov 2008 22:30:27 +0100 Subject: Remove non-ascii characters from fat code This code contains some non-ascii characters in comment lines and code. Most editors do not display those characters properly and editing those files results always in diffs at these places which are usually not required to be changed at all. This is error prone. So, remove those weird characters and replace them by normal C-style equivalents for which the proper defines were already in the header. Signed-off-by: Remy Bohmer --- include/fat.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/fat.h b/include/fat.h index 59de3fbec5..c8b9493620 100644 --- a/include/fat.h +++ b/include/fat.h @@ -67,7 +67,7 @@ #define ATTR_VFAT (ATTR_RO | ATTR_HIDDEN | ATTR_SYS | ATTR_VOLUME) #define DELETED_FLAG ((char)0xe5) /* Marks deleted files when in name[0] */ -#define aRING 0x05 /* Used to represent '' in name[0] */ +#define aRING 0x05 /* Used as special character in name[0] */ /* Indicates that the entry is the last long entry in a set of long * dir entries -- cgit From 23afaba65ec5206757e589ef334a8b38168c045f Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Tue, 2 Dec 2008 10:31:04 +0100 Subject: net: tsec: Fix Marvell 88E1121R phy init This patch tries to ensure that phy interrupt pin won't be asserted after booting. We experienced following issues with current 88E1121R phy init: Marvell 88E1121R phy can be hardware-configured to share MDC/MDIO and interrupt pins for both ports P0 and P1 (e.g. as configured on socrates board). Port 0 interrupt pin will be shared by both ports in such configuration. After booting Linux and configuring eth0 interface, port 0 phy interrupts are enabled. After rebooting without proper eth0 interface shutdown port 0 phy interrupts remain enabled so any change on port 0 (link status, etc.) cause assertion of the interrupt. Now booting Linux and configuring eth1 interface will cause permanent phy interrupt storm as the registered phy 1 interrupt handler doesn't acknowledge phy 0 interrupts. This of course should be fixed in Linux driver too. Signed-off-by: Anatolij Gustschin Acked-by: Andy Fleming Signed-off-by: Ben Warren --- include/tsec.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/tsec.h b/include/tsec.h index d2951f6d33..7b52e06ab0 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -226,6 +226,10 @@ #define MIIM_88E1121_PHY_LED_PAGE 3 #define MIIM_88E1121_PHY_LED_DEF 0x0030 +/* 88E1121 PHY IRQ Enable/Status Register */ +#define MIIM_88E1121_PHY_IRQ_EN 18 +#define MIIM_88E1121_PHY_IRQ_STATUS 19 + #define MIIM_88E1121_PHY_PAGE 22 /* 88E1145 Extended PHY Specific Control Register */ -- cgit From e0c07b868cab405ab4b5335a0247899bfc5ea0b6 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 1 Dec 2008 16:26:20 -0600 Subject: net: Define IP flag field values These defines were pulled from the "Add simple IP/UDP fragmentation support" patch from Frank Haverkamp . Signed-off-by: Peter Tyser Signed-off-by: Ben Warren --- include/net.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/net.h b/include/net.h index a5a256bcd0..d2d394f0da 100644 --- a/include/net.h +++ b/include/net.h @@ -200,6 +200,12 @@ typedef struct { ushort udp_xsum; /* Checksum */ } IP_t; +#define IP_OFFS 0x1fff /* ip offset *= 8 */ +#define IP_FLAGS 0xe000 /* first 3 bits */ +#define IP_FLAGS_RES 0x8000 /* reserved */ +#define IP_FLAGS_DFRAG 0x4000 /* don't fragments */ +#define IP_FLAGS_MFRAG 0x2000 /* more fragments */ + #define IP_HDR_SIZE_NO_UDP (sizeof (IP_t) - 8) #define IP_HDR_SIZE (sizeof (IP_t)) -- cgit From 89a7a87f084c657f8e32b513a77b50eca07e17ec Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Sat, 6 Dec 2008 13:11:14 +0100 Subject: at91: Choose environment variables location within make config target This patch adds the possiblity to choose the media where the environment will be located. This allow to choose this fundamental configuration without editing config files. Documentation file added. Signed-off-by: Nicolas Ferre Acked-by: Stelian Pop Acked-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/at91sam9260ek.h | 4 ---- include/configs/at91sam9261ek.h | 19 +++++++++++++++---- include/configs/at91sam9263ek.h | 3 --- include/configs/at91sam9rlek.h | 3 --- 4 files changed, 15 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index fbc470fbe0..2df8d54915 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -131,10 +131,6 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END 0x23e00000 -#undef CONFIG_SYS_USE_DATAFLASH_CS0 -#define CONFIG_SYS_USE_DATAFLASH_CS1 1 -#undef CONFIG_SYS_USE_NANDFLASH - #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index bd668235d3..0016b4fbfb 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -144,15 +144,12 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END 0x23e00000 -#define CONFIG_SYS_USE_DATAFLASH_CS0 1 -#undef CONFIG_SYS_USE_NANDFLASH - #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ #define CONFIG_ENV_IS_IN_DATAFLASH 1 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) -#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_OFFSET 0x4200 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" @@ -161,6 +158,20 @@ "mtdparts=at91_nand:-(root) " \ "rw rootfstype=jffs2" +#elif CONFIG_SYS_USE_DATAFLASH_CS3 + +/* bootstrap + u-boot + env + linux in dataflash on CS3 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock0 " \ + "mtdparts=at91_nand:-(root) " \ + "rw rootfstype=jffs2" + #else /* CONFIG_SYS_USE_NANDFLASH */ /* bootstrap + u-boot + env + linux in nandflash */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index a2b09ca9f7..fc7c94126e 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -151,9 +151,6 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END 0x23e00000 -#define CONFIG_SYS_USE_DATAFLASH 1 -#undef CONFIG_SYS_USE_NANDFLASH - #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 35dac47ba1..35fefc4213 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -118,9 +118,6 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END 0x23e00000 -#define CONFIG_SYS_USE_DATAFLASH 1 -#undef CONFIG_SYS_USE_NANDFLASH - #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -- cgit From 561858ee7d0274c3e89dc98d4d0698cb6fcf6fd9 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 3 Nov 2008 09:30:59 -0600 Subject: Update U-Boot's build timestamp on every compile Use the GNU 'date' command to auto-generate a new U-Boot timestamp on every compile. Signed-off-by: Peter Tyser --- include/.gitignore | 1 + include/configs/NETPHONE.h | 2 +- include/configs/NETTA.h | 2 +- include/configs/NETTA2.h | 2 +- include/timestamp.h | 30 ++++++++++++++++++++++++++++++ 5 files changed, 34 insertions(+), 3 deletions(-) create mode 100644 include/timestamp.h (limited to 'include') diff --git a/include/.gitignore b/include/.gitignore index ef7dd5fc8a..4481412022 100644 --- a/include/.gitignore +++ b/include/.gitignore @@ -5,4 +5,5 @@ /bmp_logo.h /config.h /config.mk +/timestamp_autogenerated.h /version_autogenerated.h diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index a147aff407..34de94797c 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -799,7 +799,7 @@ typedef unsigned int led_id_t; #define CONFIG_CDP_DEVICE_ID_PREFIX "NP" /* netphone */ #define CONFIG_CDP_PORT_ID "eth%d" #define CONFIG_CDP_CAPABILITIES 0x00000010 -#define CONFIG_CDP_VERSION "u-boot" " " __DATE__ " " __TIME__ +#define CONFIG_CDP_VERSION "u-boot" " " U_BOOT_DATE " " U_BOOT_TIME #define CONFIG_CDP_PLATFORM "Intracom NetPhone" #define CONFIG_CDP_TRIGGER 0x20020001 #define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 63810b3305..004b3c8a41 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -775,7 +775,7 @@ #define CONFIG_CDP_DEVICE_ID_PREFIX "NT" /* netta */ #define CONFIG_CDP_PORT_ID "eth%d" #define CONFIG_CDP_CAPABILITIES 0x00000010 -#define CONFIG_CDP_VERSION "u-boot 1.0" " " __DATE__ " " __TIME__ +#define CONFIG_CDP_VERSION "u-boot 1.0" " " U_BOOT_DATE " " U_BOOT_TIME #define CONFIG_CDP_PLATFORM "Intracom NetTA" #define CONFIG_CDP_TRIGGER 0x20020001 #define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */ diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index 61c5547c55..70995faed1 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -750,7 +750,7 @@ typedef unsigned int led_id_t; #define CONFIG_CDP_DEVICE_ID_PREFIX "NT" /* netta2 */ #define CONFIG_CDP_PORT_ID "eth%d" #define CONFIG_CDP_CAPABILITIES 0x00000010 -#define CONFIG_CDP_VERSION "u-boot" " " __DATE__ " " __TIME__ +#define CONFIG_CDP_VERSION "u-boot" " " U_BOOT_DATE " " U_BOOT_TIME #define CONFIG_CDP_PLATFORM "Intracom NetTA2" #define CONFIG_CDP_TRIGGER 0x20020001 #define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */ diff --git a/include/timestamp.h b/include/timestamp.h new file mode 100644 index 0000000000..b2f4cf4d7b --- /dev/null +++ b/include/timestamp.h @@ -0,0 +1,30 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __TIMESTAMP_H__ +#define __TIMESTAMP_H__ + +#ifndef DO_DEPS_ONLY +#include "timestamp_autogenerated.h" +#endif + +#endif /* __TIMESTAMP_H__ */ -- cgit From e9084b23d16102f44ace24379a1c0c352497ef80 Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Mon, 3 Nov 2008 22:14:36 +0100 Subject: Add vxworks.h to handle CONFIG_SYS_VXWORKS parameters Signed-off-by: Niklaus Giger --- include/vxworks.h | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 include/vxworks.h (limited to 'include') diff --git a/include/vxworks.h b/include/vxworks.h new file mode 100644 index 0000000000..548e8e851e --- /dev/null +++ b/include/vxworks.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2008 + * Niklaus Giger, niklaus.giger@member.fsf.org + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _VXWORKS_H_ +#define _VXWORKS_H_ + +int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + +/* + * Use bootaddr to find the location in memory that VxWorks + * will look for the bootline string. The default value for + * PowerPC is LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET which + * defaults to 0x4200 + */ +#ifndef CONFIG_SYS_VXWORKS_BOOT_ADDR +#define CONFIG_SYS_VXWORKS_BOOT_ADDR 0x4200 +#endif + +#ifndef CONFIG_SYS_VXWORKS_BOOT_DEVICE +#if defined(CONFIG_4xx) +#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "emac(0,0)" +#elif defined(CONFIG_IOP480) +#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "dc(0,0)" +#else +#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "eth(0,0)" +#endif +#endif + +#ifndef CONFIG_SYS_VXWORKS_SERVERNAME +#define CONFIG_SYS_VXWORKS_SERVERNAME srv +#endif + +#endif -- cgit From b03150b52e3c491a86a3cc0945274f0e8f9872e7 Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Mon, 3 Nov 2008 22:16:18 +0100 Subject: Use new CONFIG_SYS_VXWORKS parameters for Netstal boards Signed-off-by: Niklaus Giger --- include/configs/netstal-common.h | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h index 0a757943e8..4d5c1ab343 100644 --- a/include/configs/netstal-common.h +++ b/include/configs/netstal-common.h @@ -202,8 +202,9 @@ #define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_SYS_TFTP_LOADADDR 0x01000000 - +#define CONFIG_SYS_TFTP_LOADADDR 0x01000000 +#define CONFIG_SYS_VXWORKS_ADD_PARAMS "u=dpu pw=netstal8752" +#define CONFIG_SYS_VXWORKS_SERVERNAME "c" /* * General common environment variables shared by all boards produced by Netstal Maschinen */ @@ -223,19 +224,17 @@ "fdt_addr_r=800000\0" \ "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ - "load=tftp 200000 " xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ - "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \ - "era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \ - "cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize};" \ - "setenv filesize\0" \ - "upd=run load update\0" \ - "vx_rom=" xstr(CONFIG_HOSTNAME) "/" \ - xstr(CONFIG_HOSTNAME) "_vx_rom\0" \ - "vx=tftp " xstr(CONFIG_SYS_TFTP_LOADADDR) " ${vx_rom};run vxargs;" \ - "bootvx\0" \ - "vxargs=setenv bootargs emac(0,0)c:${vx_rom} e=${ipaddr}" \ - " h=${serverip} u=dpu pw=netstal8752 " \ - "tn=" xstr(CONFIG_HOSTNAME) " f=0x3008\0" \ + "uload=tftp " xstr(CONFIG_SYS_TFTP_LOADADDR) " " \ + xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ + "vx_rom=" xstr(CONFIG_HOSTNAME) "/" \ + xstr(CONFIG_HOSTNAME) "_vx_rom\0" \ + "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;"\ + "era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \ + "cp.b ${fileaddr} "xstr(CONFIG_SYS_MONITOR_BASE) \ + " ${filesize}; setenv filesize\0" \ + "upd=run uload update\0" \ + "vx=setenv bootfile ${vx_rom}; tftp " \ + xstr(CONFIG_SYS_TFTP_LOADADDR) "; bootvx\0" \ CONFIG_NETSTAL_DEF_ENV_ROOTPATH /* -- cgit From 16a28ef219c27423a1ef502f19070c4d375079b8 Mon Sep 17 00:00:00 2001 From: Gary Jennejohn Date: Thu, 6 Nov 2008 15:04:23 +0100 Subject: IOMUX: Add console multiplexing support. Modifications to support console multiplexing. This is controlled using CONFIG_SYS_CONSOLE_MUX in the board configuration file. This allows a user to specify multiple console devices in the environment with a command like this: setenv stdin serial,nc. As a result, the user can enter text on both the serial and netconsole interfaces. All devices - stdin, stdout and stderr - can be set in this manner. 1) common/iomux.c and include/iomux.h contain the environment setting implementation. 2) doc/README.iomux contains a somewhat more detailed description. 3) The implementation in (1) is called from common/cmd_nvedit.c to handle setenv and from common/console.c to handle initialization of input/output devices at boot time. 4) common/console.c also contains the code needed to poll multiple console devices for input and send output to all devices registered for output. 5) include/common.h includes iomux.h and common/Makefile generates iomux.o when CONFIG_SYS_CONSOLE_MUX is set. Signed-off-by: Gary Jennejohn --- include/common.h | 7 +++++++ include/iomux.h | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+) create mode 100644 include/iomux.h (limited to 'include') diff --git a/include/common.h b/include/common.h index df64bf0f41..5968036a05 100644 --- a/include/common.h +++ b/include/common.h @@ -678,6 +678,13 @@ void fputc(int file, const char c); int ftstc(int file); int fgetc(int file); +/* + * CONSOLE multiplexing. + */ +#ifdef CONFIG_CONSOLE_MUX +#include +#endif + int pcmcia_init (void); #ifdef CONFIG_STATUS_LED diff --git a/include/iomux.h b/include/iomux.h new file mode 100644 index 0000000000..257c1f7612 --- /dev/null +++ b/include/iomux.h @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2008 + * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + *This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _IO_MUX_H +#define _IO_MUX_H + +#include + +/* + * Stuff required to support console multiplexing. + */ + +/* + * Pointers to devices used for each file type. Defined in console.c + * but storage is allocated in iomux.c. + */ +extern device_t **console_devices[MAX_FILES]; +/* + * The count of devices assigned to each FILE. Defined in console.c + * and populated in iomux.c. + */ +extern int cd_count[MAX_FILES]; + +int iomux_doenv(const int, const char *); +void iomux_printdevs(const int); +device_t *search_device(int, char *); + +#endif /* _IO_MUX_H */ -- cgit From 268405fa7c44156c5192a70779920c70906af8d6 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 9 Dec 2008 00:24:30 +0100 Subject: vxworks.h: Fix build problem introduced by commits 29a4c24d/e9084b23 Signed-off-by: Wolfgang Denk --- include/vxworks.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/vxworks.h b/include/vxworks.h index 548e8e851e..1633904bd8 100644 --- a/include/vxworks.h +++ b/include/vxworks.h @@ -47,7 +47,7 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); #endif #ifndef CONFIG_SYS_VXWORKS_SERVERNAME -#define CONFIG_SYS_VXWORKS_SERVERNAME srv +#define CONFIG_SYS_VXWORKS_SERVERNAME "srv" #endif #endif -- cgit From 2ee951ba2ac9874d2a93d52e7a187d3184be937e Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 27 Nov 2008 14:07:09 +0100 Subject: UBI: Enable re-initializing of the "ubi part" command With this patch now, the user can call "ubi part" multiple times to re-connect the UBI device to another MTD partition. Signed-off-by: Stefan Roese --- include/ubi_uboot.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 295f2c0ffc..095dfc1b20 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -211,6 +211,7 @@ static inline long IS_ERR(const void *ptr) /* functions */ extern int ubi_mtd_param_parse(const char *val, struct kernel_param *kp); extern int ubi_init(void); +extern void ubi_exit(void); extern struct ubi_device *ubi_devices[]; -- cgit From dedacc18a8c2b3951581eb721fa055a4e0ac4845 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 7 Dec 2008 09:45:35 +0100 Subject: usbtty/omap: update to current API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Remy Böhmer --- include/usbdcore_omap1510.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/usbdcore_omap1510.h b/include/usbdcore_omap1510.h index 526fcd920d..ece0e95b61 100644 --- a/include/usbdcore_omap1510.h +++ b/include/usbdcore_omap1510.h @@ -168,8 +168,8 @@ #define UDC_IN_ENDPOINT 1 #define UDC_IN_PACKET_SIZE 64 #define UDC_INT_ENDPOINT 5 -#define UDC_INT_PKTSIZE 16 -#define UDC_BULK_PKTSIZE 16 +#define UDC_INT_PACKET_SIZE 16 +#define UDC_BULK_PACKET_SIZE 16 void udc_irq (void); /* Flow control */ @@ -177,7 +177,7 @@ void udc_set_nak(int epid); void udc_unset_nak (int epid); /* Higher level functions for abstracting away from specific device */ -void udc_endpoint_write(struct usb_endpoint_instance *endpoint); +int udc_endpoint_write(struct usb_endpoint_instance *endpoint); int udc_init (void); -- cgit From d2776827315c3d469b8cb4cec14d58877798daa2 Mon Sep 17 00:00:00 2001 From: Stefan Althoefer Date: Sun, 7 Dec 2008 19:39:11 +0100 Subject: USB: descriptor handling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi, I found a bug when working with the u-boot USB subsystem on IXP425 processor (big endian Xscale aka ARMv5). I recognized that the second usb_endpoint_descriptor of the attached memory stick was corrupted. The reason for this are the packed structures below (either u-boot and u-boot-usb): -------------- /* Endpoint descriptor */ struct usb_endpoint_descriptor { unsigned char bLength; unsigned char bDescriptorType; unsigned char bEndpointAddress; unsigned char bmAttributes; unsigned short wMaxPacketSize; unsigned char bInterval; unsigned char bRefresh; unsigned char bSynchAddress; } __attribute__ ((packed)); /* Interface descriptor */ struct usb_interface_descriptor { unsigned char bLength; unsigned char bDescriptorType; unsigned char bInterfaceNumber; unsigned char bAlternateSetting; unsigned char bNumEndpoints; unsigned char bInterfaceClass; unsigned char bInterfaceSubClass; unsigned char bInterfaceProtocol; unsigned char iInterface; unsigned char no_of_ep; unsigned char num_altsetting; unsigned char act_altsetting; struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; } __attribute__ ((packed)); ------------ As usb_endpoint_descriptor is only 7byte in length, the start of all odd ep_desc[] structures is not word aligned. This makes wMaxPacketSize of these structures also not word aligned. ARMv5 Architecture however does not support non-aligned multibyte data type (see A2.8 of ARM Architecture Reference Manual). Signed-off-by: Stefan Althoefer Signed-off-by: Remy Böhmer --- include/usb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/usb.h b/include/usb.h index 84a77b2f8b..510df95d62 100644 --- a/include/usb.h +++ b/include/usb.h @@ -91,7 +91,7 @@ struct usb_endpoint_descriptor { unsigned char bInterval; unsigned char bRefresh; unsigned char bSynchAddress; -} __attribute__ ((packed)); +} __attribute__ ((packed)) __attribute__ ((aligned(2))); /* Interface descriptor */ struct usb_interface_descriptor { -- cgit From e0b5532579eda8b4629f1b4f6e49c3cc60f52237 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Thu, 13 Nov 2008 19:49:32 +0300 Subject: jffs2: add sector_size field to part_info structure This patch adds sector_size field to part_info structure (used by new JFFS2 code). Signed-off-by: Ilya Yanok --- include/jffs2/load_kernel.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h index e9b7d6e7c9..8b2720e951 100644 --- a/include/jffs2/load_kernel.h +++ b/include/jffs2/load_kernel.h @@ -50,6 +50,7 @@ struct part_info { u32 offset; /* offset within device */ void *jffs2_priv; /* used internaly by jffs2 */ u32 mask_flags; /* kernel MTD mask flags */ + u32 sector_size; /* size of sector */ struct mtd_device *dev; /* parent device */ }; -- cgit From 9b7076229ec6a958bd835ab70745f7676297ce82 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Thu, 13 Nov 2008 19:49:35 +0300 Subject: jffs2: summary support This patch adds support for reading fs information from summary node instead of scanning full eraseblock. Signed-off-by: Ilya Yanok --- include/jffs2/jffs2.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'include') diff --git a/include/jffs2/jffs2.h b/include/jffs2/jffs2.h index d142cd1bce..ed96babf61 100644 --- a/include/jffs2/jffs2.h +++ b/include/jffs2/jffs2.h @@ -50,6 +50,9 @@ #define JFFS2_EMPTY_BITMASK 0xffff #define JFFS2_DIRTY_BITMASK 0x0000 +/* Summary node MAGIC marker */ +#define JFFS2_SUM_MAGIC 0x02851885 + /* We only allow a single char for length, and 0xFF is empty flash so we don't want it confused with a real length. Hence max 254. */ @@ -89,6 +92,7 @@ #define JFFS2_NODETYPE_INODE (JFFS2_FEATURE_INCOMPAT | JFFS2_NODE_ACCURATE | 2) #define JFFS2_NODETYPE_CLEANMARKER (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 3) #define JFFS2_NODETYPE_PADDING (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 4) +#define JFFS2_NODETYPE_SUMMARY (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 6) /* Maybe later... */ /*#define JFFS2_NODETYPE_CHECKPOINT (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 3) */ @@ -166,9 +170,24 @@ struct jffs2_raw_inode /* __u8 data[dsize]; */ } __attribute__((packed)); +struct jffs2_raw_summary +{ + __u16 magic; + __u16 nodetype; /* = JFFS2_NODETYPE_SUMMARY */ + __u32 totlen; + __u32 hdr_crc; + __u32 sum_num; /* number of sum entries*/ + __u32 cln_mkr; /* clean marker size, 0 = no cleanmarker */ + __u32 padded; /* sum of the size of padding nodes */ + __u32 sum_crc; /* summary information crc */ + __u32 node_crc; /* node crc */ + __u32 sum[0]; /* inode summary info */ +}; + union jffs2_node_union { struct jffs2_raw_inode i; struct jffs2_raw_dirent d; + struct jffs2_raw_summary s; struct jffs2_unknown_node u; } __attribute__((packed)); -- cgit From 1fc2b165c51d6f40c8d505f1b3eaefdb6599b17b Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Sat, 22 Nov 2008 08:43:29 +1100 Subject: Moved sc520 PCI definitions to stand-alone file Signed Off By: Graeme Russ --- include/asm-i386/ic/pci.h | 49 +++++++++++++++++++++++++++++++++++++++++++++ include/asm-i386/ic/sc520.h | 22 -------------------- 2 files changed, 49 insertions(+), 22 deletions(-) create mode 100644 include/asm-i386/ic/pci.h (limited to 'include') diff --git a/include/asm-i386/ic/pci.h b/include/asm-i386/ic/pci.h new file mode 100644 index 0000000000..bcccdbef82 --- /dev/null +++ b/include/asm-i386/ic/pci.h @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2002 + * Daniel Engstrm, Omicron Ceti AB . + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_IC_SC520_PCI_H_ +#define _ASM_IC_SC520_PCI_H_ 1 + +/* pin number used for PCI interrupt mappings */ +#define SC520_PCI_INTA 0 +#define SC520_PCI_INTB 1 +#define SC520_PCI_INTC 2 +#define SC520_PCI_INTD 3 +#define SC520_PCI_GPIRQ0 4 +#define SC520_PCI_GPIRQ1 5 +#define SC520_PCI_GPIRQ2 6 +#define SC520_PCI_GPIRQ3 7 +#define SC520_PCI_GPIRQ4 8 +#define SC520_PCI_GPIRQ5 9 +#define SC520_PCI_GPIRQ6 10 +#define SC520_PCI_GPIRQ7 11 +#define SC520_PCI_GPIRQ8 12 +#define SC520_PCI_GPIRQ9 13 +#define SC520_PCI_GPIRQ10 14 + +extern int sc520_pci_ints[]; + +void pci_sc520_init(struct pci_controller *hose); +int pci_sc520_set_irq(int pci_pin, int irq); + +#endif diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h index 0f7e7a551e..bf39516651 100644 --- a/include/asm-i386/ic/sc520.h +++ b/include/asm-i386/ic/sc520.h @@ -282,24 +282,6 @@ #define SC520_IRQ14 9 #define SC520_IRQ15 10 - -/* pin number used for PCI interrupt mappings */ -#define SC520_PCI_INTA 0 -#define SC520_PCI_INTB 1 -#define SC520_PCI_INTC 2 -#define SC520_PCI_INTD 3 -#define SC520_PCI_GPIRQ0 4 -#define SC520_PCI_GPIRQ1 5 -#define SC520_PCI_GPIRQ2 6 -#define SC520_PCI_GPIRQ3 7 -#define SC520_PCI_GPIRQ4 8 -#define SC520_PCI_GPIRQ5 9 -#define SC520_PCI_GPIRQ6 10 -#define SC520_PCI_GPIRQ7 11 -#define SC520_PCI_GPIRQ8 12 -#define SC520_PCI_GPIRQ9 13 -#define SC520_PCI_GPIRQ10 14 - /* utility functions */ void write_mmcr_byte(u16 mmcr, u8 data); void write_mmcr_word(u16 mmcr, u16 data); @@ -308,11 +290,7 @@ u8 read_mmcr_byte(u16 mmcr); u16 read_mmcr_word(u16 mmcr); u32 read_mmcr_long(u16 mmcr); -extern int sc520_pci_ints[]; - void init_sc520(void); unsigned long init_sc520_dram(void); -void pci_sc520_init(struct pci_controller *hose); -int pci_sc520_set_irq(int pci_pin, int irq); #endif -- cgit From 97a24a78ee6f34b89b821cb70eda1cf34aa11d97 Mon Sep 17 00:00:00 2001 From: Jerry Van Baren Date: Mon, 24 Nov 2008 08:15:02 -0500 Subject: libfdt: Fix redefined uintptr_t warning for USE_HOSTCC Compiling U-Boot in an old OS environment (RedHat-7.3 :-) gives the following warnings from FDT: include/libfdt_env.h:50: warning: redefinition of 'uintptr_t' /usr/include/stdint.h:129: warning: 'uintptr_t' previously declared here Fix: Protect the definition of uintptr_t when compiling on the host system. Signed-off-by: Gerald Van Baren --- include/libfdt_env.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/libfdt_env.h b/include/libfdt_env.h index 355ebf27b2..ea474a56b1 100644 --- a/include/libfdt_env.h +++ b/include/libfdt_env.h @@ -47,6 +47,7 @@ extern struct fdt_header *working_fdt; /* Pointer to the working fdt */ #define cpu_to_fdt64(x) (x) #endif +#ifndef USE_HOSTCC /* * Types for `void *' pointers. * @@ -58,5 +59,6 @@ typedef unsigned long int uintptr_t; #else typedef unsigned int uintptr_t; #endif +#endif /* not USE_HOSTCC */ #endif /* _LIBFDT_ENV_H */ -- cgit From e7d591e823a991513833af7030468409e25a3b13 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Nov 2008 11:43:00 +0100 Subject: microblaze: Fix ml401 uart16550 setting Signed-off-by: Michal Simek --- include/configs/ml401.h | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 63d07ffd2e..b31c4b53c9 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -37,17 +37,20 @@ #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550 +#elif XILINX_UART16550_BASEADDR +#define CONFIG_SYS_NS16550 1 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 +#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR +#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } -#endif + +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} +#else +#error Undefined uart #endif /* setting reset address */ -- cgit From 99ba6f353582720defff6e6e6761dc455a207d31 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Nov 2008 18:25:41 +0100 Subject: microblaze: Remove CONFIG_LIBFDT due to error in common files --- include/configs/ml401.h | 1 - include/configs/xupv2p.h | 1 - 2 files changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/ml401.h b/include/configs/ml401.h index b31c4b53c9..c802dcb6a2 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -277,6 +277,5 @@ "1m(romfs),1m(cramfs),-(jffs2)\0" #define CONFIG_CMDLINE_EDITING -#define CONFIG_OF_LIBFDT 1 #endif /* __CONFIG_H */ diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 6a9270306d..ed844bf993 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -222,6 +222,5 @@ #endif #define CONFIG_CMDLINE_EDITING -#define CONFIG_OF_LIBFDT 1 /* flat device tree */ #endif /* __CONFIG_H */ -- cgit From 8fab49ea911fe925392fa5afcc9bc7373a3d0cee Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 25 Nov 2008 11:42:20 +0100 Subject: microblaze: Remove XUPV2P board --- Microblaze platforms use generic settings and to have many platforms is confusing that's why I decided to remove this platform from U-BOOT. ml401 tree is sufficient for covering all Microblaze platforms. This change will go through microblaze custodian tree. --- include/configs/xupv2p.h | 226 ----------------------------------------------- 1 file changed, 226 deletions(-) delete mode 100644 include/configs/xupv2p.h (limited to 'include') diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h deleted file mode 100644 index ed844bf993..0000000000 --- a/include/configs/xupv2p.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * (C) Copyright 2007-2008 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "../board/xilinx/xupv2p/xparameters.h" - -#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ -#define CONFIG_XUPV2P 1 - -/* uart */ -#ifdef XILINX_UARTLITE_BASEADDR -#define CONFIG_XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } -#endif -#endif - -/* - * setting reset address - * - * TEXT_BASE is set to place, where the U-BOOT run in RAM, but - * if you want to store U-BOOT in flash, set CONFIG_SYS_RESET_ADDRESS - * to FLASH memory and after loading bitstream jump to FLASH. - * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze - * jump to CONFIG_SYS_RESET_ADDRESS where is the original U-BOOT code. - */ -/* #define CONFIG_SYS_RESET_ADDRESS 0x36000000 */ - -/* ethernet */ -#ifdef XILINX_EMAC_BASEADDR -#define CONFIG_XILINX_EMAC 1 -#define CONFIG_SYS_ENET -#else -#ifdef XILINX_EMACLITE_BASEADDR -#define CONFIG_XILINX_EMACLITE 1 -#define CONFIG_SYS_ENET -#endif -#endif -#undef ET_DEBUG - -/* gpio */ -#ifdef XILINX_GPIO_BASEADDR -#define CONFIG_SYS_GPIO_0 1 -#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif - -/* interrupt controller */ -#ifdef XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0 1 -#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS -#endif - -/* timer */ -#ifdef XILINX_TIMER_BASEADDR -#if (XILINX_TIMER_IRQ != -1) -#define CONFIG_SYS_TIMER_0 1 -#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR -#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ -#define FREQUENCE XILINX_CLOCK_FREQ -#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) -#endif -#else -#ifdef XILINX_CLOCK_FREQ -#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ -#else -#error BAD CLOCK FREQ -#endif -#endif -/* - * memory layout - Example - * TEXT_BASE = 0x3600_0000; - * CONFIG_SYS_SRAM_BASE = 0x3000_0000; - * CONFIG_SYS_SRAM_SIZE = 0x1000_0000; - * - * CONFIG_SYS_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 - * CONFIG_SYS_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 - * CONFIG_SYS_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 - * - * 0x3000_0000 CONFIG_SYS_SDRAM_BASE - * FREE - * 0x3600_0000 TEXT_BASE - * U-BOOT code - * 0x3602_0000 - * FREE - * - * STACK - * 0x3FF7_F000 CONFIG_SYS_MALLOC_BASE - * MALLOC_AREA 256kB Alloc - * 0x3FFB_F000 CONFIG_SYS_MONITOR_BASE - * MONITOR_CODE 256kB Env - * 0x3FFF_F000 CONFIG_SYS_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd - * 0x4000_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - */ - -/* ddr sdram - main memory */ -#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START -#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) - -/* global pointer */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) /* start of global data */ - -/* monitor code */ -#define SIZE 0x40000 -#define CONFIG_SYS_MONITOR_LEN SIZE -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MALLOC_LEN SIZE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) - -/* stack */ -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE - -#define CONFIG_SYS_NO_FLASH 1 -#define CONFIG_ENV_IS_NOWHERE 1 -#define CONFIG_ENV_SIZE 0x1000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include - -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_IRQ - -#ifndef CONFIG_SYS_ENET - #undef CONFIG_CMD_NET -#else - #define CONFIG_CMD_PING -#endif - -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT "U-Boot-mONStR> " -#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */ - -#define CONFIG_BOOTDELAY 30 -#define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "xupv2p" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" -#define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 -#define CONFIG_ETHADDR 00:E0:0C:00:00:FD - -/* architecture dependent code */ -#define CONFIG_SYS_USR_EXCEP /* user exception */ -#define CONFIG_SYS_HZ 1000 - -#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \ - "base 0;" \ - "echo" - -/* system ace */ -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -#define SYSTEMACE_CONFIG_FPGA -#define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION -#endif - -#define CONFIG_CMDLINE_EDITING - -#endif /* __CONFIG_H */ -- cgit From 8c92af7b2fbd60ae87379477f93c7ec9441b7452 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 9 Dec 2008 20:08:01 +0100 Subject: ppc4xx: Remove some features from ALPR to fit into 256k again Signed-off-by: Stefan Roese --- include/configs/alpr.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 6e9f5e5a53..7ce820518e 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -235,18 +235,15 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG #define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF #define CONFIG_CMD_FPGA #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII #define CONFIG_CMD_NAND #define CONFIG_CMD_NET -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_REGINFO - +#undef CONFIG_CMD_NFS #undef CONFIG_WATCHDOG /* watchdog disabled */ -- cgit From 1951f847f0a851853871b613ad7cf21a5242226c Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Wed, 10 Dec 2008 14:41:25 +0100 Subject: ppc4xx: Update TEXT_BASE for CPCI405 boards This patch fixes building U-Boot for CPCI405 boards. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- include/configs/CPCI405.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 1a2bc1c2e7..89ba139af7 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -196,9 +196,9 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xFFFD0000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ +#define CONFIG_SYS_FLASH_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* -- cgit From 5783758fd260a02f44566ad8f29f899565cd0403 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 17 Nov 2008 16:52:09 +0900 Subject: sh: Update ms7722se board config Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/configs/ms7722se.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 9997c9b017..52020047d9 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -31,10 +31,13 @@ #define CONFIG_MS7722SE 1 #define CONFIG_CMD_FLASH +#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NET +#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM +#define CONFIG_CMD_MEMORY #define CONFIG_CMD_ENV #define CONFIG_BAUDRATE 115200 -- cgit From c54b9a42d8f5ab5b2a039b3a2e6fde8b427745e5 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 25 Nov 2008 11:05:19 +0900 Subject: sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT SH4 is different a value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT every CPU. This patch corrects these values. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/asm-sh/cpu_sh4.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h index b6cc6cfbd9..d2dbfcd143 100644 --- a/include/asm-sh/cpu_sh4.h +++ b/include/asm-sh/cpu_sh4.h @@ -26,8 +26,15 @@ #define CCR_CACHE_ICI 0x00000800 #define CACHE_OC_ADDRESS_ARRAY 0xf4000000 + +#if defined (CONFIG_CPU_SH7750) || \ + defined(CONFIG_CPU_SH7751) #define CACHE_OC_WAY_SHIFT 14 #define CACHE_OC_NUM_ENTRIES 512 +#else +#define CACHE_OC_WAY_SHIFT 13 +#define CACHE_OC_NUM_ENTRIES 256 +#endif #define CACHE_OC_ENTRY_SHIFT 5 #if defined (CONFIG_CPU_SH7750) || \ -- cgit From cd6734510a9ff0f41c4a73567d4080ea0033d2c1 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 24 Nov 2008 13:33:51 +0100 Subject: Fix FIT and FDT support to have CONFIG_OF_LIBFDT and CONFIG_FIT independent FDT support is used for both FIT style images and for architectures that can pass a fdt blob to an OS (ppc, m68k, sparc). For other architectures and boards which do not pass a fdt blob to an OS but want to use the new uImage format, we just need FIT support. Now we can have the 4 following configurations : 1) FIT only CONFIG_FIT 2) fdt blob only CONFIG_OF_LIBFDT 3) both CONFIG_OF_LIBFDT & CONFIG_FIT 4) none none Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/image.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/image.h b/include/image.h index 54335559af..4609200b85 100644 --- a/include/image.h +++ b/include/image.h @@ -50,10 +50,6 @@ #endif /* USE_HOSTCC */ -#if defined(CONFIG_FIT) && !defined(CONFIG_OF_LIBFDT) -#error "CONFIG_OF_LIBFDT not enabled, required by CONFIG_FIT!" -#endif - #include #if defined(CONFIG_FIT) -- cgit From 3aed3aa2c128ce9fb39ca3f4e9385a7499e93dbf Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 14 Dec 2008 10:29:39 +0100 Subject: Fix new found CFG_ Also fix some minor typos. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Wolfgang Denk --- include/configs/PMC440.h | 8 ++++---- include/configs/afeb9260.h | 4 ++-- include/configs/at91cap9adk.h | 2 +- include/configs/at91sam9260ek.h | 2 +- include/configs/at91sam9263ek.h | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 7219bb8ae1..d0e3cda6c1 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -219,8 +219,8 @@ #if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ #endif -#define CFG_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ - /* 440EPx errata CHIP 11 */ +#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ + /* 440EPx errata CHIP 11 */ /*----------------------------------------------------------------------- * I2C @@ -490,8 +490,8 @@ #endif /* Memory Bank 1 (RESET) initialization */ -#define CFG_EBC_PB1AP 0x7f817200 //0x03017200 -#define CFG_EBC_PB1CR (CFG_RESET_BASE | 0x1c000) +#define CONFIG_SYS_EBC_PB1AP 0x7f817200 //0x03017200 +#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000) /* Memory Bank 4 (FPGA / 32Bit) initialization */ #define CONFIG_SYS_EBC_PB4AP 0x03840f40 /* BME=0,TWT=7,CSN=1,TH=7,RE=1,SOR=0,BEM=1 */ diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index f077ad90f4..90e553d74e 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -29,7 +29,7 @@ /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ -#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ +#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -150,7 +150,7 @@ #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CFG_LONGHELP 1 +#define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index aeb06ac64b..363df67b57 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -32,7 +32,7 @@ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ +#define CONFUG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 2df8d54915..15389296f2 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -32,7 +32,7 @@ #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ +#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index fc7c94126e..d9ebc87aea 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -32,7 +32,7 @@ #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CFG_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ +#define CONFIG_SYS_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ -- cgit From ba490b7761c62b549c222a9723e532dc801a3899 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 1 Dec 2008 16:22:45 -0600 Subject: Remove unused CONFIG_ADDR_STREAMING defines Signed-off-by: Peter Tyser --- include/configs/ATUM8548.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8540ADS.h | 1 - include/configs/MPC8540EVAL.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/PM854.h | 1 - include/configs/PM856.h | 1 - include/configs/SBC8540.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8560.h | 1 - include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - 20 files changed, 20 deletions(-) (limited to 'include') diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h index 1b745265dc..7ee05e5658 100644 --- a/include/configs/ATUM8548.h +++ b/include/configs/ATUM8548.h @@ -67,7 +67,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 5a99d5fe79..532c3df773 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -70,7 +70,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_ENABLE_36BIT_PHYS 1 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 0b8fe6ad68..f22b7529dd 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -79,7 +79,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 21cf965ab3..5ac1916cbd 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -62,7 +62,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index eaa737b88e..399189c598 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index b31c2bb371..9b1b34cc8b 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -66,7 +66,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 7a7e5a1457..e1bd45ef1b 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -69,7 +69,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 40b40ed3af..c92f82d48c 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 2b5b2c1064..bf4bd2c1a0 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -73,7 +73,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 8bdec65b7c..da1f454228 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -61,7 +61,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 9a66ca8102..37c3f4200b 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -71,7 +71,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_ENABLE_36BIT_PHYS 1 diff --git a/include/configs/PM854.h b/include/configs/PM854.h index 1cc80ad214..41e290d0b1 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -71,7 +71,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index 698ad2d911..6b4e2dd42d 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -72,7 +72,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 2853fba065..34196319c5 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -75,7 +75,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 300f49079d..6d205a7a14 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -106,7 +106,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 5ce4dac5e5..528c810900 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -59,7 +59,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index e1d3a52b5e..d4e9d7479a 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -69,7 +69,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index e89b5a3fb0..cbf04e3f2d 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -82,7 +82,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index a0f2ed0daf..ae6f45aeec 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -64,7 +64,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index f0990c6799..c312f1af9d 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -64,7 +64,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ -- cgit From 65e43a10631537dcb92c302d36301a12308216c3 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sat, 13 Dec 2008 17:20:27 -0600 Subject: Introduce virt_to_phys() virt_to_phys() returns the physical address given a virtual. In most cases this will be just the input value as the vast majority of systems run in a 1:1 mode. However in systems that are not running this way it should report the physical address or ~0 if no mapping exists for the given virtual address. Signed-off-by: Kumar Gala --- include/asm-arm/io.h | 5 +++++ include/asm-avr32/io.h | 5 +++++ include/asm-blackfin/io.h | 5 +++++ include/asm-i386/io.h | 5 +++++ include/asm-m68k/io.h | 5 +++++ include/asm-microblaze/io.h | 5 +++++ include/asm-mips/io.h | 2 +- include/asm-nios/io.h | 5 +++++ include/asm-nios2/io.h | 5 +++++ include/asm-ppc/io.h | 5 +++++ include/asm-sh/io.h | 5 +++++ include/asm-sparc/io.h | 5 +++++ 12 files changed, 56 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index f4ae307003..fec3a7eace 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -57,6 +57,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + /* * Generic virtual read/write. Note that we don't support half-word * read/writes. We define __arch_*[bl] here, and leave __arch_*w diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h index 06e52b137f..d22cd35611 100644 --- a/include/asm-avr32/io.h +++ b/include/asm-avr32/io.h @@ -125,4 +125,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long len) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __ASM_AVR32_IO_H */ diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h index da58914987..6806494983 100644 --- a/include/asm-blackfin/io.h +++ b/include/asm-blackfin/io.h @@ -64,6 +64,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + /* * These are for ISA/PCI shared memory _only_ and should never be used * on any other type of memory, including Zorro memory. They are meant to diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h index 2c57140fb3..9b757d489e 100644 --- a/include/asm-i386/io.h +++ b/include/asm-i386/io.h @@ -229,4 +229,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h index 1fccc12923..50ea08751f 100644 --- a/include/asm-m68k/io.h +++ b/include/asm-m68k/io.h @@ -251,4 +251,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __ASM_M68K_IO_H__ */ diff --git a/include/asm-microblaze/io.h b/include/asm-microblaze/io.h index 8804724bff..7e190d15c6 100644 --- a/include/asm-microblaze/io.h +++ b/include/asm-microblaze/io.h @@ -155,4 +155,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __MICROBLAZE_IO_H__ */ diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 3a0f33f204..031186d037 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -118,7 +118,7 @@ static inline void set_io_port_base(unsigned long base) * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/MIPS mapping */ -extern inline unsigned long virt_to_phys(volatile void * address) +extern inline phys_addr_t virt_to_phys(void * address) { return CPHYSADDR(address); } diff --git a/include/asm-nios/io.h b/include/asm-nios/io.h index 8b788068b3..899682cc40 100644 --- a/include/asm-nios/io.h +++ b/include/asm-nios/io.h @@ -133,4 +133,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __ASM_NIOS_IO_H_ */ diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h index 2f1ec26bd1..01d11efece 100644 --- a/include/asm-nios2/io.h +++ b/include/asm-nios2/io.h @@ -53,6 +53,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + extern unsigned char inb (unsigned char *port); extern unsigned short inw (unsigned short *port); extern unsigned inl (unsigned port); diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index c3496818f0..c00de452d6 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -298,4 +298,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index adc3f81ed6..ca598a60f3 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -261,5 +261,10 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __KERNEL__ */ #endif /* __ASM_SH_IO_H */ diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h index 5f8d05cc36..0c5d86cb3a 100644 --- a/include/asm-sparc/io.h +++ b/include/asm-sparc/io.h @@ -90,4 +90,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif -- cgit From 63240ba88cd6a220057a0f28e5bf97f5b17ac84b Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sat, 13 Dec 2008 17:20:28 -0600 Subject: Introduce addr_map library Add a library that helps in translating between virtual and physical addresses. This library can be useful as a simple means to implement map_physmem() and virt_to_phys() for platforms that need functionality beyond the simple 1:1 mapping. Signed-off-by: Kumar Gala --- include/addr_map.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 include/addr_map.h (limited to 'include') diff --git a/include/addr_map.h b/include/addr_map.h new file mode 100644 index 0000000000..d55f5f64e1 --- /dev/null +++ b/include/addr_map.h @@ -0,0 +1,29 @@ +#ifndef __ADDR_MAP_H +#define __ADDR_MAP_H + +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +extern phys_addr_t addrmap_virt_to_phys(void *vaddr); +extern unsigned long addrmap_phys_to_virt(phys_addr_t paddr); +extern void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, + phys_size_t size, int idx); + +#endif -- cgit From ecf5f077c8e77454f532eaac3e3afb7cfc48c62d Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Wed, 3 Dec 2008 11:28:30 -0600 Subject: i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functions All implementations of the functions i2c_reg_read() and i2c_reg_write() are identical. We can save space and simplify the code by converting these functions into inlines and putting them in i2c.h. Signed-off-by: Timur Tabi Acked-By: Jean-Christophe PLAGNIOL-VILLARD --- include/i2c.h | 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 60 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/i2c.h b/include/i2c.h index 8d6f867422..fad2d57161 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -76,6 +76,20 @@ # define I2C_SOFT_DECLARATIONS # endif #endif + +#ifdef CONFIG_8xx +/* Set default values for the I2C bus speed and slave address on 8xx. In the + * future, we'll define these in all 8xx board config files. + */ +#ifndef CONFIG_SYS_I2C_SPEED +#define CONFIG_SYS_I2C_SPEED 50000 +#endif + +#ifndef CONFIG_SYS_I2C_SLAVE +#define CONFIG_SYS_I2C_SLAVE 0xFE +#endif +#endif + /* * Initialization, must be called once on start up, may be called * repeatedly to change the speed and slave addresses. @@ -132,8 +146,52 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); /* * Utility routines to read/write registers. */ -uchar i2c_reg_read (uchar chip, uchar reg); -void i2c_reg_write(uchar chip, uchar reg, uchar val); +static inline u8 i2c_reg_read(u8 addr, u8 reg) +{ + u8 buf; + +#ifdef CONFIG_8xx + /* MPC8xx needs this. Maybe one day we can get rid of it. */ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif + +#ifdef DEBUG + printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); +#endif + +#ifdef CONFIG_BLACKFIN + /* This ifdef will become unneccessary in a future version of the + * blackfin I2C driver. + */ + i2c_read(addr, reg, 0, &buf, 1); +#else + i2c_read(addr, reg, 1, &buf, 1); +#endif + + return buf; +} + +static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) +{ +#ifdef CONFIG_8xx + /* MPC8xx needs this. Maybe one day we can get rid of it. */ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif + +#ifdef DEBUG + printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", + __func__, addr, reg, val); +#endif + +#ifdef CONFIG_BLACKFIN + /* This ifdef will become unneccessary in a future version of the + * blackfin I2C driver. + */ + i2c_write(addr, reg, 0, &val, 1); +#else + i2c_write(addr, reg, 1, &val, 1); +#endif +} /* * Functions for setting the current I2C bus and its speed -- cgit From 455ae7e87f67c44e6aea68865c83acadd3fcd36c Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 16 Dec 2008 01:02:17 +0100 Subject: Coding style cleanup, update CHANGELOG. Signed-off-by: Wolfgang Denk --- include/configs/PMC440.h | 2 +- include/configs/afeb9260.h | 1 - include/linux/crc32.h | 8 ++++---- include/linux/mtd/partitions.h | 6 +++--- include/linux/mtd/ubi.h | 2 +- include/ubi_uboot.h | 2 +- 6 files changed, 10 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index d0e3cda6c1..f9f10021bc 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -490,7 +490,7 @@ #endif /* Memory Bank 1 (RESET) initialization */ -#define CONFIG_SYS_EBC_PB1AP 0x7f817200 //0x03017200 +#define CONFIG_SYS_EBC_PB1AP 0x7f817200 /* 0x03017200 */ #define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000) /* Memory Bank 4 (FPGA / 32Bit) initialization */ diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 90e553d74e..d63a1a07fb 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -167,4 +167,3 @@ #endif #endif - diff --git a/include/linux/crc32.h b/include/linux/crc32.h index e1331571e1..ac4aed1c77 100644 --- a/include/linux/crc32.h +++ b/include/linux/crc32.h @@ -6,10 +6,10 @@ #define _LINUX_CRC32_H #include -//#include +/* #include */ extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); -//extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); +/* extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); */ #define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)data, length) @@ -21,7 +21,7 @@ extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); * is in bit nr 0], thus it must be reversed before use. Except for * nics that bit swap the result internally... */ -//#define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) -//#define ether_crc_le(length, data) crc32_le(~0, data, length) +/* #define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) */ +/* #define ether_crc_le(length, data) crc32_le(~0, data, length) */ #endif /* _LINUX_CRC32_H */ diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h index b41e5f564c..10166757bc 100644 --- a/include/linux/mtd/partitions.h +++ b/include/linux/mtd/partitions.h @@ -76,9 +76,9 @@ struct device; struct device_node; int __devinit of_mtd_parse_partitions(struct device *dev, - struct mtd_info *mtd, - struct device_node *node, - struct mtd_partition **pparts); + struct mtd_info *mtd, + struct device_node *node, + struct mtd_partition **pparts); #endif #endif diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h index a017891acf..4b3e06ce5e 100644 --- a/include/linux/mtd/ubi.h +++ b/include/linux/mtd/ubi.h @@ -21,7 +21,7 @@ #ifndef __LINUX_UBI_H__ #define __LINUX_UBI_H__ -//#include +/* #include */ #include #include diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 095dfc1b20..b4152192a2 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -56,7 +56,7 @@ do { \ #define ubi_sysfs_close(...) do { } while (0) static inline int is_power_of_2(unsigned long n) { - return (n != 0 && ((n & (n - 1)) == 0)); + return (n != 0 && ((n & (n - 1)) == 0)); } /* FIXME */ -- cgit From b1ffecec37b57a59c139042267faac458e5324e9 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 3 Dec 2008 23:04:37 -0600 Subject: powerpc: fix io.h build warning with CONFIG_PHYS_64BIT Casting a pointer to a phys_addr_t when it's an unsigned long long on a 32-bit system without first casting to a non-pointer type generates a compiler warning. Fix this. Signed-off-by: Becky Bruce --- include/asm-ppc/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index c00de452d6..64cb746b10 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -300,7 +300,7 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) static inline phys_addr_t virt_to_phys(void * vaddr) { - return (phys_addr_t)(vaddr); + return (phys_addr_t)((unsigned long)vaddr); } #endif -- cgit From 9e2a79b4c585ad31138fb90b68fd0234d64a8da8 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 16 Dec 2008 23:13:46 +0100 Subject: include/configs/at91cap9adk.h: fix typo. Signed-off-by: Wolfgang Denk --- include/configs/at91cap9adk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 363df67b57..b2baf1b348 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -32,7 +32,7 @@ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CONFUG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ +#define CONFIG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ -- cgit From 13095b2f07dacb1f863772266c1789d47a523a8a Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 16 Dec 2008 22:10:30 +0100 Subject: MIPS: qemu_mips: move env storage just after u-boot Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Shinya Kuribayashi --- include/configs/qemu-mips.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index f028d1ac63..844446205b 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -150,7 +150,7 @@ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 #define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) /* Address and size of Primary Environment Sector */ #define CONFIG_ENV_SIZE 0x8000 -- cgit From e92739d34e2d6b6aca93b2598248210710897ce8 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Wed, 17 Dec 2008 16:36:21 -0600 Subject: Add support for PCA953x I2C gpio devices Initial support for NXP's 4 and 8 bit I2C gpio expanders (eg pca9537, pca9557, etc). The CONFIG_PCA953X define enables support for the devices while the CONFIG_CMD_PCA953X define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO define enables an 'info' sub-command which provides summary information for the given pca953x device. Signed-off-by: Peter Tyser --- include/pca953x.h | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 include/pca953x.h (limited to 'include') diff --git a/include/pca953x.h b/include/pca953x.h new file mode 100644 index 0000000000..6c2b58c563 --- /dev/null +++ b/include/pca953x.h @@ -0,0 +1,39 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __PCA953X_H_ +#define __PCA953X_H_ + +#define PCA953X_IN 0x00 +#define PCA953X_OUT 0x01 +#define PCA953X_POL 0x02 +#define PCA953X_CONF 0x03 + +#define PCA953X_OUT_LOW 0 +#define PCA953X_OUT_HIGH 1 +#define PCA953X_POL_NORMAL 0 +#define PCA953X_POL_INVERT 1 +#define PCA953X_DIR_OUT 0 +#define PCA953X_DIR_IN 1 + +int pca953x_set_val(u8 chip, uint mask, uint data); +int pca953x_set_pol(u8 chip, uint mask, uint data); +int pca953x_set_dir(u8 chip, uint mask, uint data); +int pca953x_get_val(u8 chip); + +#endif /* __PCA953X_H_ */ -- cgit From ccf0fdd02b97323f8caae18d06cc9daeac2f192f Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Wed, 17 Dec 2008 16:36:23 -0600 Subject: XPedite5370 board support Initial support for Extreme Engineering Solutions XPedite5370 - a MPC8572-based 3U VPX single board computer with a PMC/XMC site. Signed-off-by: Peter Tyser --- include/configs/XPEDITE5370.h | 589 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 589 insertions(+) create mode 100644 include/configs/XPEDITE5370.h (limited to 'include') diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h new file mode 100644 index 0000000000..3bc0fe8f67 --- /dev/null +++ b/include/configs/XPEDITE5370.h @@ -0,0 +1,589 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2007-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * xpedite5370 board configuration file + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_BOOKE 1 /* BOOKE */ +#define CONFIG_E500 1 /* BOOKE e500 family */ +#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ +#define CONFIG_MPC8572 1 +#define CONFIG_XPEDITE5370 1 +#define CONFIG_SYS_BOARD_NAME "XPedite5370" +#define CONFIG_NUM_CPUS 2 /* 2 Cores */ +#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */ + +#define CONFIG_PCI 1 /* Enable PCI/PCIE */ +#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ +#define CONFIG_PCIE1 1 /* PCIE controler 1 */ +#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ +#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ +#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ + +/* + * DDR config + */ +#define CONFIG_FSL_DDR2 +#undef CONFIG_FSL_DDR_INTERACTIVE +#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ +#define CONFIG_DDR_SPD +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#define SPD_EEPROM_ADDRESS1 0x54 /* Both channels use the */ +#define SPD_EEPROM_ADDRESS2 0x54 /* same SPD data */ +#define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ +#define CONFIG_NUM_DDR_CONTROLLERS 2 +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 1 +#define CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_VERY_BIG_RAM + +#ifndef __ASSEMBLY__ +extern unsigned long get_board_sys_clk(unsigned long dummy); +extern unsigned long get_board_ddr_clk(unsigned long dummy); +#endif + +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* sysclk for MPC85xx */ +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /* ddrclk for MPC85xx */ + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_BTB /* toggle branch predition */ +#define CONFIG_ENABLE_36BIT_PHYS 1 + +/* + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + */ +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */ +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ +#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR + 0xa000) +#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR + 0x9000) + +/* + * Diagnostics + */ +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x20000000 + +/* + * Memory map + * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable + * 0x8000_0000 0xbfff_ffff PCIe1 Mem 1G non-cacheable + * 0xc000_0000 0xcfff_ffff PCIe2 Mem 256M non-cacheable + * 0xe000_0000 0xe7ff_ffff SRAM/SSRAM/L1 Cache 128M non-cacheable + * 0xe800_0000 0xe87f_ffff PCIe1 IO 8M non-cacheable + * 0xe880_0000 0xe8ff_ffff PCIe2 IO 8M non-cacheable + * 0xef00_0000 0xef0f_ffff CCSR/IMMR 1M non-cacheable + * 0xef80_0000 0xef8f_ffff NAND Flash 1M non-cacheable + * 0xf000_0000 0xf7ff_ffff NOR Flash 2 128M non-cacheable + * 0xf800_0000 0xffff_ffff NOR Flash 1 128M non-cacheable + */ + +#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_4 | LCRR_EADC_3) + +/* + * NAND flash configuration + */ +#define CONFIG_SYS_NAND_BASE 0xef800000 +#define CONFIG_SYS_NAND_BASE2 0xef840000 /* Unused at this time */ + +/* + * NOR flash configuration + */ +#define CONFIG_SYS_FLASH_BASE 0xf8000000 +#define CONFIG_SYS_FLASH_BASE2 0xf0000000 +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2} +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ + {0xf7f40000, 0xc0000} } +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ + +/* + * Chip select configuration + */ +/* NOR Flash 0 on CS0 */ +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR0_PRELIM (OR_AM_128MB | \ + OR_GPCM_CSNT | \ + OR_GPCM_XACS | \ + OR_GPCM_ACS_DIV2 | \ + OR_GPCM_SCY_8 | \ + OR_GPCM_TRLX | \ + OR_GPCM_EHTR | \ + OR_GPCM_EAD) + +/* NOR Flash 1 on CS1 */ +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM + +/* NAND flash on CS2 */ +#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ + (2< " + +/* + * Pass open firmware flat tree + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + +#define CONFIG_SYS_64BIT_VSPRINTF 1 +#define CONFIG_SYS_64BIT_STRTOUL 1 + +/* + * I2C + */ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE + +/* PEX8518 slave I2C interface */ +#define CONFIG_SYS_I2C_PEX8518_ADDR 0x70 + +/* I2C DS1631 temperature sensor */ +#define CONFIG_SYS_I2C_DS1621_ADDR 0x48 +#define CONFIG_DTT_DS1621 +#define CONFIG_DTT_SENSORS { 0 } + +/* I2C EEPROM - AT24C128B */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */ + +/* I2C RTC */ +#define CONFIG_RTC_M41T11 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_M41T11_BASE_YEAR 2000 + +/* GPIO/EEPROM/SRAM */ +#define CONFIG_DS4510 +#define CONFIG_SYS_I2C_DS4510_ADDR 0x51 + +/* GPIO */ +#define CONFIG_PCA953X +#define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18 +#define CONFIG_SYS_I2C_PCA953X_ADDR1 0x1c +#define CONFIG_SYS_I2C_PCA953X_ADDR2 0x1e +#define CONFIG_SYS_I2C_PCA953X_ADDR3 0x1f +#define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0 + +/* + * PU = pulled high, PD = pulled low + * I = input, O = output, IO = input/output + */ +/* PCA9557 @ 0x18*/ +#define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01 /* PU; UART0 enable (1: enabled) */ +#define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02 /* PU; UART0 serial mode select */ +#define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04 /* PU; UART1 enable (1: enabled) */ +#define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08 /* PU; UART1 serial mode select */ +#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10 /* PU; Boot flash CS select */ +#define CONFIG_SYS_PCA953X_NVM_WP 0x20 /* PU; Set to 0 to enable NVM writing */ +#define CONFIG_SYS_PCA953X_C0_VCORE_VID2 0x40 /* VID2 of ISL6262 */ +#define CONFIG_SYS_PCA953X_C0_VCORE_VID3 0x80 /* VID3 of ISL6262 */ + +/* PCA9557 @ 0x1c*/ +#define CONFIG_SYS_PCA953X_XMC0_ROOT0 0x01 /* PU; Low if XMC is RC */ +#define CONFIG_SYS_PCA953X_XMC0_MVMR0 0x02 /* XMC EEPROM write protect */ +#define CONFIG_SYS_PCA953X_XMC0_WAKE 0x04 /* PU; XMC wake */ +#define CONFIG_SYS_PCA953X_XMC0_BIST 0x08 /* PU; XMC built in self test */ +#define CONFIG_SYS_PCA953X_XMC_PRESENT 0x10 /* PU; Low if XMC module installed */ +#define CONFIG_SYS_PCA953X_PMC_PRESENT 0x20 /* PU; Low if PMC module installed */ +#define CONFIG_SYS_PCA953X_PMC0_MONARCH 0x40 /* PMC monarch mode enable */ +#define CONFIG_SYS_PCA953X_PMC0_EREADY 0x80 /* PU; PMC PCI eready */ + +/* PCA9557 @ 0x1e*/ +#define CONFIG_SYS_PCA953X_P0_GA0 0x01 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GA1 0x02 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GA2 0x04 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GA3 0x08 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GA4 0x10 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GAP 0x20 /* PU; tied to VPX P0.GAP */ +#define CONFIG_SYS_PCA953X_P1_SYSEN 0x80 /* PU; Pulled high; tied to VPX P1.SYSCON */ + +/* PCA9557 @ 0x1f */ +#define CONFIG_SYS_PCA953X_GPIO_VPX0 0x01 /* PU */ +#define CONFIG_SYS_PCA953X_GPIO_VPX1 0x02 /* PU */ +#define CONFIG_SYS_PCA953X_GPIO_VPX2 0x04 /* PU */ +#define CONFIG_SYS_PCA953X_GPIO_VPX3 0x08 /* PU */ +#define CONFIG_SYS_PCA953X_VPX_FRU_WRCTL 0x10 /* PD; I2C master source for FRU SEEPROM */ + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ +/* PCIE1 - VPX P1 */ +#define CONFIG_SYS_PCIE1_MEM_BASE 0x80000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BASE +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x40000000 /* 1G */ +#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */ + +/* PCIE2 - PEX8518 */ +#define CONFIG_SYS_PCIE2_MEM_BASE 0xc0000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BASE +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE2_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE2_IO_PHYS 0xe8800000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 /* 8M */ + +/* + * Networking options + */ +#define CONFIG_TSEC_ENET /* tsec ethernet support */ +#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ +#define CONFIG_NET_MULTI 1 +#define CONFIG_TSEC_TBI +#define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ +#define CONFIG_ETHPRIME "eTSEC2" + +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC1_PHY_ADDR 1 +#define TSEC1_PHYIDX 0 +#define CONFIG_HAS_ETH0 + +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "eTSEC2" +#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC2_PHY_ADDR 2 +#define TSEC2_PHYIDX 0 +#define CONFIG_HAS_ETH1 + +/* + * Command configuration. + */ +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DS4510 +#define CONFIG_CMD_DS4510_INFO +#define CONFIG_CMD_DTT +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCA953X +#define CONFIG_CMD_PCA953X_INFO +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ +#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ +#define CONFIG_PANIC_HANG /* do not reset board on panic */ +#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_FIT 1 +#define CONFIG_FIT_VERBOSE 1 +#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ + +/* + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Environment Configuration + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */ +#define CONFIG_ENV_SIZE 0x8000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024)) + +/* + * Flash memory map: + * fff80000 - ffffffff Pri U-Boot (512 KB) + * fff40000 - fff7ffff Pri U-Boot Environment (256 KB) + * fff00000 - fff3ffff Pri FDT (256KB) + * fef00000 - ffefffff Pri OS image (16MB) + * f8000000 - feefffff Pri OS Use/Filesystem (111MB) + * + * f7f80000 - f7ffffff Sec U-Boot (512 KB) + * f7f40000 - f7f7ffff Sec U-Boot Environment (256 KB) + * f7f00000 - f7f3ffff Sec FDT (256KB) + * f6f00000 - f7efffff Sec OS image (16MB) + * f0000000 - f6efffff Sec OS Use/Filesystem (111MB) + */ +#define CONFIG_UBOOT1_ENV_ADDR MK_STR(0xfff80000) +#define CONFIG_UBOOT2_ENV_ADDR MK_STR(0xf7f80000) +#define CONFIG_FDT1_ENV_ADDR MK_STR(0xfff00000) +#define CONFIG_FDT2_ENV_ADDR MK_STR(0xf7f00000) +#define CONFIG_OS1_ENV_ADDR MK_STR(0xfef00000) +#define CONFIG_OS2_ENV_ADDR MK_STR(0xf6f00000) + +#define CONFIG_PROG_UBOOT1 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_UBOOT2 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_BOOT_OS_NET \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "if test -n $fdtaddr; then " \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "bootm $osaddr - $fdtaddr; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi; " \ + "else; " \ + "bootm $osaddr; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS1 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS2 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT1 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT2 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=yes\0" \ + "download_cmd=tftp\0" \ + "console_args=console=ttyS0,115200\0" \ + "root_args=root=/dev/nfs rw\0" \ + "misc_args=ip=on\0" \ + "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \ + "bootfile=/home/user/file\0" \ + "osfile=/home/user/uImage-XPedite5370\0" \ + "fdtfile=/home/user/xpedite5370.dtb\0" \ + "ubootfile=/home/user/u-boot.bin\0" \ + "fdtaddr=c00000\0" \ + "osaddr=0x1000000\0" \ + "loadaddr=0x1000000\0" \ + "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ + "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \ + "prog_os1="CONFIG_PROG_OS1"\0" \ + "prog_os2="CONFIG_PROG_OS2"\0" \ + "prog_fdt1="CONFIG_PROG_FDT1"\0" \ + "prog_fdt2="CONFIG_PROG_FDT2"\0" \ + "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \ + "bootcmd_flash1=run set_bootargs; " \ + "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\ + "bootcmd_flash2=run set_bootargs; " \ + "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\ + "bootcmd=run bootcmd_flash1\0" +#endif /* __CONFIG_H */ -- cgit From ecf5b98c7a6a2e2256dfddd48fab26678dcd6b90 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 16 Dec 2008 14:59:20 -0600 Subject: 85xx: Add support to populate addr map based on TLB settings Signed-off-by: Kumar Gala --- include/asm-ppc/mmu.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 8975e6c90a..6d942d083a 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -431,6 +431,9 @@ extern void set_tlb(u8 tlb, u32 epn, u64 rpn, extern void disable_tlb(u8 esel); extern void invalidate_tlb(u8 tlb); extern void init_tlbs(void); +#ifdef CONFIG_ADDR_MAP +extern void init_addr_map(void); +#endif extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg); #define SET_TLB_ENTRY(_tlb, _epn, _rpn, _perms, _wimge, _ts, _esel, _sz, _iprot) \ -- cgit From 77c8115b1f1871811633eae77a5a700fac1f0e50 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 16 Dec 2008 14:59:21 -0600 Subject: ppc: Use addrmap in virt_to_phys and map_physmem. If we have addr map support enabled use the mapping functions to implement virt_to_phys() and map_physmem(). Signed-off-by: Kumar Gala --- include/asm-ppc/io.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 64cb746b10..4ddad26e81 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -10,6 +10,10 @@ #include #include +#ifdef CONFIG_ADDR_MAP +#include +#endif + #define SIO_CONFIG_RA 0x398 #define SIO_CONFIG_RD 0x399 @@ -287,7 +291,11 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val) static inline void * map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) { +#ifdef CONFIG_ADDR_MAP + return (void *)(addrmap_phys_to_virt(paddr)); +#else return (void *)((unsigned long)paddr); +#endif } /* @@ -300,7 +308,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) static inline phys_addr_t virt_to_phys(void * vaddr) { +#ifdef CONFIG_ADDR_MAP + return addrmap_virt_to_phys(vaddr); +#else return (phys_addr_t)((unsigned long)vaddr); +#endif } #endif -- cgit From a5d212a263c58cc746481bf1fc878510533ce7d6 Mon Sep 17 00:00:00 2001 From: Trent Piepho Date: Wed, 3 Dec 2008 15:16:34 -0800 Subject: mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho Acked-by: Kumar Gala Acked-by: Jon Loeliger --- include/asm-ppc/fsl_lbc.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index 51fc5c13b0..e492c62a8b 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -300,7 +300,10 @@ #define LCRR_EADC_2 0x00020000 #define LCRR_EADC_3 0x00030000 #define LCRR_EADC_4 0x00000000 -#define LCRR_CLKDIV 0x0000000F +/* CLKDIV is five bits only on 8536, 8572, and 8610, so far, but the fifth bit + * should always be zero on older parts that have a four bit CLKDIV. + */ +#define LCRR_CLKDIV 0x0000001F #define LCRR_CLKDIV_SHIFT 0 #define LCRR_CLKDIV_2 0x00000002 #define LCRR_CLKDIV_4 0x00000004 -- cgit From bd93105fa171184a71ca8b22be03dc2705cfbd3f Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Thu, 11 Dec 2008 15:47:49 -0500 Subject: sbc8548: don't enable the 3rd and 4th eTSEC These interfaces don't have usable connectors on the board, so don't bother enumerating or configuring them. Signed-off-by: Paul Gortmaker --- include/configs/sbc8548.h | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 528c810900..254d91f952 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -399,25 +399,16 @@ #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2 1 #define CONFIG_TSEC2_NAME "eTSEC1" -#define CONFIG_TSEC3 1 -#define CONFIG_TSEC3_NAME "eTSEC2" -#define CONFIG_TSEC4 -#define CONFIG_TSEC4_NAME "eTSEC3" #undef CONFIG_MPC85XX_FEC #define TSEC1_PHY_ADDR 0 #define TSEC2_PHY_ADDR 1 -#define TSEC3_PHY_ADDR 2 -#define TSEC4_PHY_ADDR 3 #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 -#define TSEC3_PHYIDX 0 -#define TSEC4_PHYIDX 0 + #define TSEC1_FLAGS TSEC_GIGABIT #define TSEC2_FLAGS TSEC_GIGABIT -#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) /* Options are: eTSEC[0-3] */ #define CONFIG_ETHPRIME "eTSEC0" @@ -507,10 +498,6 @@ #define CONFIG_ETHADDR 02:E0:0C:00:00:FD #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 02:E0:0C:00:01:FD -#define CONFIG_HAS_ETH2 -#define CONFIG_ETH2ADDR 02:E0:0C:00:02:FD -#define CONFIG_HAS_ETH3 -#define CONFIG_ETH3ADDR 02:E0:0C:00:03:FD #endif #define CONFIG_IPADDR 192.168.0.55 -- cgit From ad22f9273c6f24fbfa917e867680e9688e0c59c5 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Thu, 11 Dec 2008 15:47:51 -0500 Subject: sbc8548: enable command line editing by default. Lets make things a bit more user friendly. It isn't 1985 anymore. Signed-off-by: Paul Gortmaker --- include/configs/sbc8548.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 254d91f952..8a7b0da4d0 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -455,6 +455,7 @@ /* * Miscellaneous configurable options */ +#define CONFIG_CMDLINE_EDITING /* undef to save memory */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -- cgit From 58da8890d5fbd074746037722a423de9ac408616 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Thu, 11 Dec 2008 15:47:50 -0500 Subject: sbc8548: use proper PHY address The values given for the PHY address were wrong, so the code read no valid PHY ID, and fell through to the generic PHY support, which would work on 1000M but would not auto negotiate down to 100M or 10M. Signed-off-by: Paul Gortmaker --- include/configs/sbc8548.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 8a7b0da4d0..8141a46dc0 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -401,8 +401,8 @@ #define CONFIG_TSEC2_NAME "eTSEC1" #undef CONFIG_MPC85XX_FEC -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 +#define TSEC1_PHY_ADDR 0x19 +#define TSEC2_PHY_ADDR 0x1a #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 -- cgit From ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28 Mon Sep 17 00:00:00 2001 From: Trent Piepho Date: Wed, 3 Dec 2008 15:16:37 -0800 Subject: mpc8[56]xx: Put localbus clock in sysinfo and gd Currently MPC85xx and MPC86xx boards just calculate the localbus frequency and print it out, but don't save it. This changes where its calculated and stored to be more consistent with the CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock. The localbus frequency is added to sysinfo and calculated when sysinfo is set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are. get_clocks() copies the frequency into the global data, as the other frequencies are, into a new field that is only enabled for MPC85xx and MPC86xx. checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency from sysinfo, like the other frequencies, instead of calculating it on the spot. Signed-off-by: Trent Piepho Acked-by: Kumar Gala Acked-by: Jon Loeliger --- include/asm-ppc/global_data.h | 3 +++ include/e500.h | 1 + include/mpc86xx.h | 1 + 3 files changed, 5 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index aade097fa4..2bb50b47f5 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -89,6 +89,9 @@ typedef struct global_data { #if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8536) u32 sdhc_clk; #endif +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) + u32 lbc_clk; +#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ #if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) u32 i2c1_clk; u32 i2c2_clk; diff --git a/include/e500.h b/include/e500.h index 1971eee291..9d3c8417c0 100644 --- a/include/e500.h +++ b/include/e500.h @@ -13,6 +13,7 @@ typedef struct unsigned long freqProcessor; unsigned long freqSystemBus; unsigned long freqDDRBus; + unsigned long freqLocalBus; } MPC85xx_SYS_INFO; #endif /* _ASMLANGUAGE */ diff --git a/include/mpc86xx.h b/include/mpc86xx.h index f119d5bb15..a6fdea352f 100644 --- a/include/mpc86xx.h +++ b/include/mpc86xx.h @@ -84,6 +84,7 @@ typedef struct { unsigned long freqProcessor; unsigned long freqSystemBus; + unsigned long freqLocalBus; } MPC86xx_SYS_INFO; #define l1icache_enable icache_enable -- cgit From fea91edee8ae0295e3c30b1ff544df51f4d668e1 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 2 Dec 2008 21:58:04 +0100 Subject: usb_kbd: fix usb_kbd_deregister when DEVICE_DEREGISTER not enable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Remy Böhmer --- include/devices.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/devices.h b/include/devices.h index 6b78d58889..20ddfc4342 100644 --- a/include/devices.h +++ b/include/devices.h @@ -91,7 +91,9 @@ extern char *stdio_names[MAX_FILES]; */ int device_register (device_t * dev); int devices_init (void); +#ifdef CONFIG_SYS_DEVICE_DEREGISTER int device_deregister(char *devname); +#endif struct list_head* device_get_list(void); device_t* device_get_by_name(char* name); device_t* device_clone(device_t *dev); -- cgit From 1f03cbfae221b24ba1341a0a3f62ff01c5c874df Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Tue, 23 Dec 2008 16:32:00 -0600 Subject: XPedite5200 board support cleanup Signed-off-by: Peter Tyser --- include/configs/XPEDITE5200.h | 546 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 546 insertions(+) create mode 100644 include/configs/XPEDITE5200.h (limited to 'include') diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h new file mode 100644 index 0000000000..1df6855cca --- /dev/null +++ b/include/configs/XPEDITE5200.h @@ -0,0 +1,546 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2004-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * xpedite5200 board configuration file + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_BOOKE 1 /* BOOKE */ +#define CONFIG_E500 1 /* BOOKE e500 family */ +#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ +#define CONFIG_MPC8548 1 +#define CONFIG_XPEDITE5200 1 +#define CONFIG_SYS_BOARD_NAME "XPedite5200" +#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */ + +#define CONFIG_PCI 1 /* Enable PCI/PCIE */ +#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ +#define CONFIG_PCI1 1 /* PCI controller 1 */ +#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ +#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ + +/* + * DDR config + */ +#define CONFIG_FSL_DDR2 +#undef CONFIG_FSL_DDR_INTERACTIVE +#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ +#define CONFIG_DDR_SPD +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#define SPD_EEPROM_ADDRESS 0x54 +#define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 2 +#define CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_VERY_BIG_RAM + +#define CONFIG_SYS_CLK_FREQ 66666666 + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_BTB /* toggle branch predition */ +#define CONFIG_ENABLE_36BIT_PHYS 1 + +/* + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + */ +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */ +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ +#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR + 0x8000) + +/* + * Diagnostics + */ +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x20000000 + +/* + * Memory map + * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable + * 0x8000_0000 0xbfff_ffff PCI1 Mem 1G non-cacheable + * 0xe000_0000 0xe7ff_ffff SRAM/SSRAM/L1 Cache 128M non-cacheable + * 0xe800_0000 0xe87f_ffff PCI1 IO 8M non-cacheable + * 0xef00_0000 0xef0f_ffff CCSR/IMMR 1M non-cacheable + * 0xef80_0000 0xef8f_ffff NAND Flash 1M non-cacheable + * 0xf800_0000 0xfbff_ffff NOR Flash 2 64M non-cacheable + * 0xfc00_0000 0xffff_ffff NOR Flash 1 64M non-cacheable + */ + +#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_4 | LCRR_EADC_3) + +/* + * NAND flash configuration + */ +#define CONFIG_SYS_NAND_BASE 0xef800000 +#define CONFIG_SYS_NAND_BASE2 0xef840000 /* Unused at this time */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_NAND_ACTL +#define CONFIG_SYS_NAND_ACTL_CLE (1 << 3) /* ADDR3 is CLE */ +#define CONFIG_SYS_NAND_ACTL_ALE (1 << 4) /* ADDR4 is ALE */ +#define CONFIG_SYS_NAND_ACTL_NCE (0) /* NCE not controlled by ADDR */ +#define CONFIG_SYS_NAND_ACTL_DELAY 25 + +/* + * NOR flash configuration + */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_BASE2 0xf8000000 +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2} +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ + {0xfbf40000, 0xc0000} } +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ + +/* + * Chip select configuration + */ +/* NOR Flash 0 on CS0 */ +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR0_PRELIM (OR_AM_64MB | \ + OR_GPCM_ACS_DIV4 | \ + OR_GPCM_SCY_8) + +/* NOR Flash 1 on CS1 */ +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM + +/* NAND flash on CS2 */ +#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ + BR_PS_8 | \ + BR_V) + +/* NAND flash on CS2 */ +#define CONFIG_SYS_OR2_PRELIM (OR_AM_256KB | \ + OR_GPCM_BCTLD | \ + OR_GPCM_CSNT | \ + OR_GPCM_ACS_DIV4 | \ + OR_GPCM_SCY_4 | \ + OR_GPCM_TRLX | \ + OR_GPCM_EHTR) + +/* NAND flash on CS3 */ +#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_NAND_BASE2 | \ + BR_PS_8 | \ + BR_V) +#define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_OR2_PRELIM + +/* + * Use L1 as initial stack + */ +#define CONFIG_SYS_INIT_RAM_LOCK 1 +#define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000 +#define CONFIG_SYS_INIT_RAM_END 0x4000 + +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} +#define CONFIG_BAUDRATE 115200 +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ + +/* + * Use the HUSH parser + */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* + * Pass open firmware flat tree + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + +#define CONFIG_SYS_64BIT_VSPRINTF 1 +#define CONFIG_SYS_64BIT_STRTOUL 1 + +/* + * I2C + */ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE + +/* I2C EEPROM */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */ + +/* I2C RTC */ +#define CONFIG_RTC_M41T11 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_M41T11_BASE_YEAR 2000 + +/* GPIO */ +#define CONFIG_PCA953X +#define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18 +#define CONFIG_SYS_I2C_PCA953X_ADDR1 0x19 +#define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0 + +/* PCA957 @ 0x18 */ +#define CONFIG_SYS_PCA953X_BRD_CFG0 0x01 +#define CONFIG_SYS_PCA953X_BRD_CFG1 0x02 +#define CONFIG_SYS_PCA953X_BRD_CFG2 0x04 +#define CONFIG_SYS_PCA953X_XMC_ROOT0 0x08 +#define CONFIG_SYS_PCA953X_FLASH_PASS_CS 0x10 +#define CONFIG_SYS_PCA953X_FLASH_WP 0x20 +#define CONFIG_SYS_PCA953X_MONARCH 0x40 +#define CONFIG_SYS_PCA953X_EREADY 0x80 + +/* PCA957 @ 0x19 */ +#define CONFIG_SYS_PCA953X_P14_IO0 0x01 +#define CONFIG_SYS_PCA953X_P14_IO1 0x02 +#define CONFIG_SYS_PCA953X_P14_IO2 0x04 +#define CONFIG_SYS_PCA953X_P14_IO3 0x08 +#define CONFIG_SYS_PCA953X_P14_IO4 0x10 +#define CONFIG_SYS_PCA953X_P14_IO5 0x20 +#define CONFIG_SYS_PCA953X_P14_IO6 0x40 +#define CONFIG_SYS_PCA953X_P14_IO7 0x80 + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ +#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_SIZE 0x40000000 /* 1G */ +#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_PHYS 0xe8000000 +#define CONFIG_SYS_PCI1_IO_SIZE 0x00800000 /* 1M */ + +/* + * Networking options + */ +#define CONFIG_TSEC_ENET /* tsec ethernet support */ +#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ +#define CONFIG_NET_MULTI 1 +#define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_ETHPRIME "eTSEC1" + +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define TSEC1_FLAGS TSEC_GIGABIT +#define TSEC1_PHY_ADDR 1 +#define TSEC1_PHYIDX 0 +#define CONFIG_HAS_ETH0 + +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "eTSEC2" +#define TSEC2_FLAGS TSEC_GIGABIT +#define TSEC2_PHY_ADDR 2 +#define TSEC2_PHYIDX 0 +#define CONFIG_HAS_ETH1 + +#define CONFIG_TSEC3 1 +#define CONFIG_TSEC3_NAME "eTSEC3" +#define TSEC3_FLAGS TSEC_GIGABIT +#define TSEC3_PHY_ADDR 3 +#define TSEC3_PHYIDX 0 +#define CONFIG_HAS_ETH2 + +#define CONFIG_TSEC4 1 +#define CONFIG_TSEC4_NAME "eTSEC4" +#define TSEC4_FLAGS TSEC_GIGABIT +#define TSEC4_PHY_ADDR 4 +#define TSEC4_PHYIDX 0 +#define CONFIG_HAS_ETH3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY + +/* + * Command configuration. + */ +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCA953X +#define CONFIG_CMD_PCA953X_INFO +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ +#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ +#define CONFIG_PANIC_HANG /* do not reset board on panic */ +#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_FIT 1 +#define CONFIG_FIT_VERBOSE 1 +#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ +#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ + +/* + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Environment Configuration + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */ +#define CONFIG_ENV_SIZE 0x8000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024)) + +/* + * Flash memory map: + * fff80000 - ffffffff Pri U-Boot (512 KB) + * fff40000 - fff7ffff Pri U-Boot Environment (256 KB) + * fff00000 - fff3ffff Pri FDT (256KB) + * fef00000 - ffefffff Pri OS image (16MB) + * fc000000 - feefffff Pri OS Use/Filesystem (47MB) + * + * fbf80000 - fbffffff Sec U-Boot (512 KB) + * fbf40000 - fbf7ffff Sec U-Boot Environment (256 KB) + * fbf00000 - fbf3ffff Sec FDT (256KB) + * faf00000 - fbefffff Sec OS image (16MB) + * f8000000 - faefffff Sec OS Use/Filesystem (47MB) + */ +#define CONFIG_UBOOT1_ENV_ADDR MK_STR(0xfff80000) +#define CONFIG_UBOOT2_ENV_ADDR MK_STR(0xfbf80000) +#define CONFIG_FDT1_ENV_ADDR MK_STR(0xfff00000) +#define CONFIG_FDT2_ENV_ADDR MK_STR(0xfbf00000) +#define CONFIG_OS1_ENV_ADDR MK_STR(0xfef00000) +#define CONFIG_OS2_ENV_ADDR MK_STR(0xfaf00000) + +#define CONFIG_PROG_UBOOT1 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_UBOOT2 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_BOOT_OS_NET \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "if test -n $fdtaddr; then " \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "bootm $osaddr - $fdtaddr; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi; " \ + "else; " \ + "bootm $osaddr; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS1 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS2 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT1 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT2 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=yes\0" \ + "download_cmd=tftp\0" \ + "console_args=console=ttyS0,115200\0" \ + "root_args=root=/dev/nfs rw\0" \ + "misc_args=ip=on\0" \ + "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \ + "bootfile=/home/user/file\0" \ + "osfile=/home/user/uImage-XPedite5200\0" \ + "fdtfile=/home/user/xpedite5200.dtb\0" \ + "ubootfile=/home/user/u-boot.bin\0" \ + "fdtaddr=c00000\0" \ + "osaddr=0x1000000\0" \ + "loadaddr=0x1000000\0" \ + "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ + "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \ + "prog_os1="CONFIG_PROG_OS1"\0" \ + "prog_os2="CONFIG_PROG_OS2"\0" \ + "prog_fdt1="CONFIG_PROG_FDT1"\0" \ + "prog_fdt2="CONFIG_PROG_FDT2"\0" \ + "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \ + "bootcmd_flash1=run set_bootargs; " \ + "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\ + "bootcmd_flash2=run set_bootargs; " \ + "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\ + "bootcmd=run bootcmd_flash1\0" +#endif /* __CONFIG_H */ -- cgit From d481c80d78f954133c035dae6c7d22de3625795d Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 3 Jan 2009 17:22:25 +0100 Subject: at91rm9200: rename lowlevel init value to CONFIG_SYS_ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/at91rm9200dk.h | 46 +++++++++++++++++++++--------------------- include/configs/cmc_pu2.h | 46 +++++++++++++++++++++--------------------- include/configs/csb637.h | 46 +++++++++++++++++++++--------------------- include/configs/mp2usb.h | 46 +++++++++++++++++++++--------------------- 4 files changed, 92 insertions(+), 92 deletions(-) (limited to 'include') diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 746f0ef102..c7e83ccfc1 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -45,33 +45,33 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define MC_PUIA_VAL 0x00000000 -#define MC_PUP_VAL 0x00000000 -#define MC_PUER_VAL 0x00000000 -#define MC_ASR_VAL 0x00000000 -#define MC_AASR_VAL 0x00000000 -#define EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ /* clocks */ -#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ -#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ -#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ /* sdram */ -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000080 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h index cdd308d8b9..d9acb470fe 100644 --- a/include/configs/cmc_pu2.h +++ b/include/configs/cmc_pu2.h @@ -44,33 +44,33 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define MC_PUIA_VAL 0x00000000 -#define MC_PUP_VAL 0x00000000 -#define MC_PUER_VAL 0x00000000 -#define MC_ASR_VAL 0x00000000 -#define MC_AASR_VAL 0x00000000 -#define EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */ /* clocks */ -#define PLLAR_VAL 0x2026BE04 /* 179,712 MHz for PCK */ -#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ -#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */ +#define CONFIG_SYS_PLLAR_VAL 0x2026BE04 /* 179,712 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */ /* sdram */ -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -#define SDRC_CR_VAL 0x3399c1d4 /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000080 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x3399c1d4 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/csb637.h b/include/configs/csb637.h index 682db447dd..2df77cfa7d 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -45,33 +45,33 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define MC_PUIA_VAL 0x00000000 -#define MC_PUP_VAL 0x00000000 -#define MC_PUER_VAL 0x00000000 -#define MC_ASR_VAL 0x00000000 -#define MC_AASR_VAL 0x00000000 -#define EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ /* clocks */ -#define PLLAR_VAL 0x2031BE01 /* 184.320000 MHz for PCK */ -#define PLLBR_VAL 0x128A3E19 /* 47.996928 MHz (divider by 2 for USB) */ -#define MCKR_VAL 0x00000302 /* PCK/4 = MCK Master Clock = 46.080000 MHz from PLLA */ +#define CONFIG_SYS_PLLAR_VAL 0x2031BE01 /* 184.320000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x128A3E19 /* 47.996928 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_MCKR_VAL 0x00000302 /* PCK/4 = MCK Master Clock = 46.080000 MHz from PLLA */ /* sdram */ -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -#define SDRC_CR_VAL 0x21914159 /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000080 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x21914159 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index cbbdb0c77e..fb10616c30 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -49,33 +49,33 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define MC_PUIA_VAL 0x00000000 -#define MC_PUP_VAL 0x00000000 -#define MC_PUER_VAL 0x00000000 -#define MC_ASR_VAL 0x00000000 -#define MC_AASR_VAL 0x00000000 -#define EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */ /* clocks */ -#define PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */ -#define PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */ -#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */ /* sdram */ -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -#define SDRC_CR_VAL 0x3211295A /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000020 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x3211295A /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000020 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -- cgit From 8a48686fac2030287765f1970ea046bd5734b733 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 3 Jan 2009 17:22:26 +0100 Subject: m501sk: move to the common memory setup Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/m501sk.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'include') diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h index f09214dce9..eab37df22d 100644 --- a/include/configs/m501sk.h +++ b/include/configs/m501sk.h @@ -41,6 +41,39 @@ #define CONFIG_INITRD_TAG 1 #define CONFIG_MENUPROMPT "." +/* + * LowLevel Init + */ +#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 +/* flash */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ + +/* clocks */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ +/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 + +/* sdram */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ /* * Size of malloc() pool -- cgit From 3dd9395a0d7ce69a335d0e743c04b9caedd681d3 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 6 Jan 2009 21:41:59 +0100 Subject: at91rm9200: move define from lowlevel_init to header Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/asm-arm/arch-at91rm9200/AT91RM9200.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 95db0177cd..00bae1c4d5 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -781,5 +781,32 @@ typedef struct _AT91S_PDC #define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) /* (PIOB) Output Disable Registerr */ #define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) /* (PIOB) Pin Data Status Register */ +#else +/* flash */ +#define AT91C_MC_PUIA 0xFFFFFF10 +#define AT91C_MC_PUP 0xFFFFFF50 +#define AT91C_MC_PUER 0xFFFFFF54 +#define AT91C_MC_ASR 0xFFFFFF04 +#define AT91C_MC_AASR 0xFFFFFF08 +#define AT91C_EBI_CFGR 0xFFFFFF64 +#define AT91C_SMC_CSR0 0xFFFFFF70 + +/* clocks */ +#define AT91C_PLLAR 0xFFFFFC28 +#define AT91C_PLLBR 0xFFFFFC2C +#define AT91C_MCKR 0xFFFFFC30 + +#define AT91C_BASE_CKGR 0xFFFFFC20 +#define AT91C_CKGR_MOR 0 + +/* sdram */ +#define AT91C_PIOC_ASR 0xFFFFF870 +#define AT91C_PIOC_BSR 0xFFFFF874 +#define AT91C_PIOC_PDR 0xFFFFF804 +#define AT91C_EBI_CSA 0xFFFFFF60 +#define AT91C_SDRC_CR 0xFFFFFF98 +#define AT91C_SDRC_MR 0xFFFFFF90 +#define AT91C_SDRC_TR 0xFFFFFF94 + #endif /* __ASSEMBLY__ */ #endif /* AT91RM9200_H */ -- cgit From 79e436cad3b4a7db88408c3f05175028f30d700d Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 3 Dec 2008 22:36:26 -0600 Subject: sbc8641d: Fix PCI mapping concepts Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce --- include/configs/sbc8641d.h | 32 ++++++++++++++++++-------------- 1 file changed, 18 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 0012945758..1008812b71 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -311,18 +311,22 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BUS +#define CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI1_MEM_BUS #define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_BASE 0xe2000000 -#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE +#define CONFIG_SYS_PCI1_IO_BUS 0xe2000000 +#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BUS +#define CONFIG_SYS_PCI1_IO_VIRT CONFIG_SYS_PCI1_IO_BUS #define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */ -#define CONFIG_SYS_PCI2_MEM_BASE 0xa0000000 -#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BASE +#define CONFIG_SYS_PCI2_MEM_BUS 0xa0000000 +#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BUS +#define CONFIG_SYS_PCI2_MEM_VIRT CONFIG_SYS_PCI2_MEM_BUS #define CONFIG_SYS_PCI2_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI2_IO_BASE 0xe3000000 -#define CONFIG_SYS_PCI2_IO_PHYS CONFIG_SYS_PCI2_IO_BASE +#define CONFIG_SYS_PCI2_IO_BUS 0xe3000000 +#define CONFIG_SYS_PCI2_IO_PHYS CONFIG_SYS_PCI2_IO_BUS +#define CONFIG_SYS_PCI2_IO_VIRT CONFIG_SYS_PCI2_IO_BUS #define CONFIG_SYS_PCI2_IO_SIZE 0x1000000 /* 16M */ #if defined(CONFIG_PCI) @@ -409,10 +413,10 @@ * 0xa000_0000 512M PCI-Express 2 Memory * Changed it for operating from 0xd0000000 */ -#define CONFIG_SYS_DBAT1L ( CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW \ +#define CONFIG_SYS_DBAT1L ( CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT1U CONFIG_SYS_DBAT1U /* @@ -452,10 +456,10 @@ * 0xe300_0000 16M PCI-Express 2 I/0 * Note that this is at 0xe0000000 */ -#define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCI1_IO_BASE | BATL_PP_RW \ +#define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCI1_IO_BASE | BATU_BL_32M | BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_IO_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCI1_IO_VIRT | BATU_BL_32M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U /* -- cgit From 3e3fffe3baf3befde287fec1fcbfe55052fb8946 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 3 Dec 2008 22:36:44 -0600 Subject: mpc8610hpcd: Fix PCI mapping concepts Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce --- include/configs/MPC8610HPCD.h | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 27517e5b1f..4bd3e0bd3d 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -273,11 +273,13 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BUS +#define CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI1_MEM_BUS #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_BUS 0x0000000 #define CONFIG_SYS_PCI1_IO_PHYS 0xe1000000 +#define CONFIG_SYS_PCI1_IO_VIRT 0xe1000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ /* For RTL8139 */ @@ -285,18 +287,18 @@ #define _IO_BASE 0x00000000 /* controller 1, Base address 0xa000 */ -#define CONFIG_SYS_PCIE1_MEM_BASE 0xa0000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BASE +#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS #define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe3000000 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00100000 /* 1M */ /* controller 2, Base Address 0x9000 */ -#define CONFIG_SYS_PCIE2_MEM_BASE 0x90000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BASE +#define CONFIG_SYS_PCIE2_MEM_BUS 0x90000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BUS #define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE2_IO_BASE 0x00000000 /* reuse mem LAW */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 /* reuse mem LAW */ #define CONFIG_SYS_PCIE2_IO_PHYS 0xe2000000 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00100000 /* 1M */ @@ -364,7 +366,7 @@ #define CONFIG_SYS_DBAT1L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_PHYS | BATU_BL_1G | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_1G | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT1U CONFIG_SYS_DBAT1U @@ -375,7 +377,7 @@ #define CONFIG_SYS_DBAT2L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCI1_IO_PHYS | BATU_BL_16M | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCI1_IO_VIRT | BATU_BL_16M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U -- cgit From b5f65dfa9aa8e068e62aba4733dc4fd97b1d9bf6 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Tue, 13 Jan 2009 16:29:28 -0500 Subject: Some changes of TLB entry setting for MPC8572DS - Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode, all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0 can not access PIXIS_BASE anymore (any access will cause DataTLBError exception) - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board. Signed-off-by: Haiying Wang --- include/configs/MPC8572DS.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 37c3f4200b..6c7a364545 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -92,6 +92,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000) /* DDR Setup */ +#define CONFIG_SYS_DDR_TLB_START 9 #define CONFIG_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ -- cgit From 3ba605d4beec649438539e7df97b5fedb26592fb Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Fri, 2 Jan 2009 12:18:49 +0100 Subject: ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boards This patch adds esd's loadpci BSP command to CPCI4052 and CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- include/configs/CPCI4052.h | 2 ++ include/configs/CPCI405AB.h | 3 +++ 2 files changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index e231fa7058..d0b4d11339 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -216,6 +216,8 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ +#define CONFIG_PRAM 0 /* use pram variable to overwrite */ + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 2319c58725..69c8c6eee7 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -92,6 +92,7 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_PING +#define CONFIG_CMD_BSP #define CONFIG_CMD_EEPROM @@ -212,6 +213,8 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ +#define CONFIG_PRAM 0 /* use pram variable to overwrite */ + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is -- cgit From f7e78f3b74aae9caca2997bad865a72338326c0a Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 20 Dec 2008 19:29:49 +0100 Subject: sh: use write{8,16,32} in all lowlevel_init Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Nobuhiro Iwamatsu --- include/asm-sh/macro.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 include/asm-sh/macro.h (limited to 'include') diff --git a/include/asm-sh/macro.h b/include/asm-sh/macro.h new file mode 100644 index 0000000000..61f792a044 --- /dev/null +++ b/include/asm-sh/macro.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MACRO_H__ +#define __MACRO_H__ +#ifdef __ASSEMBLY__ + +.macro write32, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.l r0, @r1 +.endm + +.macro write16, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.w r0, @r1 +.endm + +.macro write8, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.b r0, @r1 +.endm + +.macro wait_timer, time + mov.l \time ,r3 +1: + nop + tst r3, r3 + bf/s 1b + dt r3 +.endm + +#endif /* __ASSEMBLY__ */ +#endif /* __MACRO_H__ */ -- cgit