From 440a5742393bb959fd7bce28f5c916355d8607ca Mon Sep 17 00:00:00 2001 From: Gerhard Sittig Date: Sat, 8 Mar 2014 19:46:13 +0100 Subject: usb: net: don't ifdef routine declarations in usb_ether.h while compilation of implemented routines and references from calling sites may be optional, declarations in header files should not be unconditionally declare the Asix and SMSC related public USB ethernet driver routines in the usb_ether.h header file Signed-off-by: Gerhard Sittig Acked-by: Simon Glass Acked-by: Marek Vasut --- include/usb_ether.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/usb_ether.h b/include/usb_ether.h index 678c9dff25..011ead7a36 100644 --- a/include/usb_ether.h +++ b/include/usb_ether.h @@ -40,23 +40,19 @@ struct ueth_data { }; /* - * Function definitions for each USB ethernet driver go here, bracketed by - * #ifdef CONFIG_USB_ETHER_xxx...#endif + * Function definitions for each USB ethernet driver go here + * (declaration is unconditional, compilation is conditional) */ -#ifdef CONFIG_USB_ETHER_ASIX void asix_eth_before_probe(void); int asix_eth_probe(struct usb_device *dev, unsigned int ifnum, struct ueth_data *ss); int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss, struct eth_device *eth); -#endif -#ifdef CONFIG_USB_ETHER_SMSC95XX void smsc95xx_eth_before_probe(void); int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, struct ueth_data *ss); int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, struct eth_device *eth); -#endif #endif /* __USB_ETHER_H__ */ -- cgit From df4fb1c36d35021c27aa9fb43062741712022ad3 Mon Sep 17 00:00:00 2001 From: Gerhard Sittig Date: Sat, 8 Mar 2014 19:46:14 +0100 Subject: usb: net: introduce support for Moschip USB ethernet introduce an 'mcs7830' driver for Moschip MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices see "MCS7830 -- USB 2.0 to 10/100M Fast Ethernet Controller" at http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=109;74;109 the driver was implemented based on the U-Boot Asix driver with additional information gathered from the Moschip Linux driver, development was done on "Delock 61147" and "Logilink UA0025C" dongles Signed-off-by: Gerhard Sittig Acked-by: Marek Vasut --- include/usb_ether.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/usb_ether.h b/include/usb_ether.h index 011ead7a36..35700a21b5 100644 --- a/include/usb_ether.h +++ b/include/usb_ether.h @@ -49,6 +49,12 @@ int asix_eth_probe(struct usb_device *dev, unsigned int ifnum, int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss, struct eth_device *eth); +void mcs7830_eth_before_probe(void); +int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum, + struct ueth_data *ss); +int mcs7830_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth); + void smsc95xx_eth_before_probe(void); int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, struct ueth_data *ss); -- cgit From eddf6d286841b40c978d055a91d2966aaa6ad785 Mon Sep 17 00:00:00 2001 From: Gerhard Sittig Date: Sat, 8 Mar 2014 19:46:15 +0100 Subject: tegra: omap: alpha-sort USB ethernet items for Asix and SMSC adjust the harmony and omap3_beagle board configs to make their CONFIG_USB_ETHER_* items appear in alphabetical order Signed-off-by: Gerhard Sittig Acked-by: Simon Glass Acked-by: Marek Vasut --- include/configs/harmony.h | 2 +- include/configs/omap3_beagle.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/harmony.h b/include/configs/harmony.h index c4ff4a25cb..7702373c06 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -61,8 +61,8 @@ /* USB networking support */ #define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX /* General networking support */ #define CONFIG_CMD_NET diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ac0ed4371c..9f51a7007a 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -120,8 +120,8 @@ #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX /* GPIO banks */ #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ -- cgit From a743415f12c3ba3848425d6a7793ccd5f7eaf05e Mon Sep 17 00:00:00 2001 From: Gerhard Sittig Date: Sat, 8 Mar 2014 19:46:16 +0100 Subject: tegra: imx: omap: enable Moschip USB ethernet support for several boards enable support for the Moschip USB ethernet adapter for those boards which previously had support for "all other" USB ethernet adapters (that's Asix _and_ SMSC) enabled -- which applies to harmony, m53evk, mx53loco, nitrogen6x, omap3_beagle Signed-off-by: Gerhard Sittig Acked-by: Marek Vasut --- include/configs/harmony.h | 1 + include/configs/m53evk.h | 1 + include/configs/mx53loco.h | 1 + include/configs/nitrogen6x.h | 1 + include/configs/omap3_beagle.h | 1 + 5 files changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 7702373c06..3ec0e418c1 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -62,6 +62,7 @@ /* USB networking support */ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 #define CONFIG_USB_ETHER_SMSC95XX /* General networking support */ diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index bd67603b50..16546c28b4 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -185,6 +185,7 @@ #define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 #define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 77f8567705..1415584463 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -65,6 +65,7 @@ #define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 #define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index ac517ce25e..f2db8c515b 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -115,6 +115,7 @@ #define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 #define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 9f51a7007a..0b57421537 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -121,6 +121,7 @@ #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 #define CONFIG_USB_ETHER_SMSC95XX /* GPIO banks */ -- cgit From 9a6a109f0775be316810a3c449c47c0e27d7e477 Mon Sep 17 00:00:00 2001 From: Gerhard Sittig Date: Sat, 8 Mar 2014 19:46:17 +0100 Subject: at91: enable USB ethernet for taskit stamp9g20 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit enabling CONFIG_MACB makes other locations in the stamp config file enable network related commands (actually prevents disabling them) enable USB ethernet support by activating generic support as well as Asix and Moschip ethernet adapters Signed-off-by: Gerhard Sittig Acked-by: Andreas Bießman --- include/configs/stamp9g20.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h index 51339b1496..01085dc5c1 100644 --- a/include/configs/stamp9g20.h +++ b/include/configs/stamp9g20.h @@ -140,7 +140,10 @@ * can enable it here if your baseboard features ethernet. */ -/* #define CONFIG_MACB */ +#define CONFIG_MACB +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 #ifdef CONFIG_MACB # define CONFIG_RMII /* use reduced MII inteface */ -- cgit From e4536f8e379130b1bf3c0497f49c4f5a4da48c83 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 11 Mar 2014 11:05:16 +0900 Subject: freescale: pblimage: refactor CONFIG_SYS_FSL_PBL_{PBI, RCW} Pull out "$(SRCTREE)/" from CONFIG_SYS_FSL_PBL_PBI and CONFIG_SYS_FSL_PBL_RCW and push it into the top Makefile. Signed-off-by: Masahiro Yamada Cc: York Sun Cc: Poonam Aggrwal Cc: Valentin Longchamp --- include/configs/B4860QDS.h | 4 ++-- include/configs/P2041RDB.h | 5 ++--- include/configs/T1040QDS.h | 4 ++-- include/configs/T208xQDS.h | 6 +++--- include/configs/T208xRDB.h | 4 ++-- include/configs/T4240QDS.h | 4 ++-- include/configs/corenet_ds.h | 14 +++++--------- include/configs/km/kmp204x-common.h | 4 ++-- 8 files changed, 20 insertions(+), 25 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 64acc88b7a..b248302687 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -16,8 +16,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/b4860qds/b4_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/b4860qds/b4_rcw.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 47c638422f..b3880f190f 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -18,9 +18,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW \ - $(SRCTREE)/board/freescale/corenet_ds/rcw_p2041rdb.cfg +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p2041rdb.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index e776a467a0..993f9ae533 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -32,8 +32,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t1040qds/t1040_pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t1040qds/t1040_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t1040qds/t1040_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t1040qds/t1040_rcw.cfg #endif /* High Level Configuration Options */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index c6a30db8b7..399ddbb791 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -48,11 +48,11 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t208xqds/t208x_pbi.cfg +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg #if defined(CONFIG_PPC_T2080) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xqds/t2080_rcw.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_rcw.cfg #elif defined(CONFIG_PPC_T2081) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xqds/t2081_rcw.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg #endif #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 979843bf4b..743eee3161 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -41,8 +41,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t208xrdb/t2080_pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xrdb/t2080_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_rcw.cfg #endif #define CONFIG_SRIO_PCIE_BOOT_MASTER diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 0d43c27916..56e1293720 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -21,8 +21,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4qds/t4_pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4qds/t4_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t4qds/t4_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t4qds/t4_rcw.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 72432e4bde..1e4bfc49fc 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -15,19 +15,15 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg #if defined(CONFIG_P3041DS) -#define CONFIG_SYS_FSL_PBL_RCW \ - $(SRCTREE)/board/freescale/corenet_ds/rcw_p3041ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p3041ds.cfg #elif defined(CONFIG_P4080DS) -#define CONFIG_SYS_FSL_PBL_RCW \ - $(SRCTREE)/board/freescale/corenet_ds/rcw_p4080ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p4080ds.cfg #elif defined(CONFIG_P5020DS) -#define CONFIG_SYS_FSL_PBL_RCW \ - $(SRCTREE)/board/freescale/corenet_ds/rcw_p5020ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5020ds.cfg #elif defined(CONFIG_P5040DS) -#define CONFIG_SYS_FSL_PBL_RCW \ - $(SRCTREE)/board/freescale/corenet_ds/rcw_p5040ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg #endif #endif diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 0d24f78d42..582978afe2 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -28,8 +28,8 @@ #define CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/keymile/kmp204x/pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/keymile/kmp204x/rcw_kmp204x.cfg +#define CONFIG_SYS_FSL_PBL_PBI board/keymile/kmp204x/pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/keymile/kmp204x/rcw_kmp204x.cfg /* High Level Configuration Options */ #define CONFIG_BOOKE -- cgit From 4ab3fc5eba1d24f37ab33f83ea39c1f7082075d3 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 11 Mar 2014 11:05:17 +0900 Subject: kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIG Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG and push it into the top Makefile. Signed-off-by: Masahiro Yamada Cc: Michael Walle Cc: Simon Guinot Cc: Dave Purdy Cc: Stefan Herbrechtsmeier Cc: Luka Perkov Cc: Valentin Longchamp Cc: Jason Cooper Cc: Siddarth Gore Cc: Prafulla Wadaskar Cc: Eric Cooper Cc: Suriyan Ramasami --- include/configs/km_kirkwood.h | 15 +++++---------- include/configs/lacie_kw.h | 4 ++-- include/configs/lsxl.h | 4 ++-- 3 files changed, 9 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 2cde1770cd..9eb1ad3397 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -40,8 +40,7 @@ #define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16" #define CONFIG_HOSTNAME km_kirkwood_128m16 #undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG \ - $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_DISABLE_PCIE #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ @@ -59,8 +58,7 @@ #endif #undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG \ - $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_ENV_IS_IN_SPI_NOR #define CONFIG_KM_FPGA_CONFIG #define CONFIG_KM_PIGGY4_88E6352 @@ -73,8 +71,7 @@ #define CONFIG_HOSTNAME mgcoge3un #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG \ - $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg #define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0" #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3 #define CONFIG_KM_DISABLE_PCIE @@ -85,8 +82,7 @@ #define CONFIG_IDENT_STRING "\nKeymile COGE5UN" #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG \ - $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg #define CONFIG_KM_ENV_IS_IN_SPI_NOR #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3 #define CONFIG_HOSTNAME kmcoge5un @@ -106,8 +102,7 @@ #define CONFIG_IDENT_STRING "\nKeymile SUV31" #define CONFIG_HOSTNAME kmsuv31 #undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG \ - $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_ENV_IS_IN_SPI_NOR #define CONFIG_KM_FPGA_CONFIG diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index f6e79ba350..2d2e23a2a9 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -80,9 +80,9 @@ * from the Network Space v2 */ #if defined(CONFIG_INETSPACE_V2) -#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-is2.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-is2.cfg #elif defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg #endif /* diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 92865df12a..2ae8a2700d 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -13,12 +13,12 @@ */ #if defined(CONFIG_LSCHLV2) #define CONFIG_IDENT_STRING " LS-CHLv2" -#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-lschl.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg #define CONFIG_MACH_TYPE 3006 #define CONFIG_SYS_TCLK 166666667 /* 166 MHz */ #elif defined(CONFIG_LSXHL) #define CONFIG_IDENT_STRING " LS-XHL" -#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg #define CONFIG_MACH_TYPE 2663 /* CONFIG_SYS_TCLK is 200000000 by default */ #else -- cgit From 9f6044256ecb3aa2d62f1f26ca564d0e55e19458 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:25:56 -0700 Subject: sandbox: Increase memory size to 32MB The current 4MB size is a little small for some tests, so increase it. Reviewed-by: Hung-ying Tyan Signed-off-by: Simon Glass --- include/configs/sandbox.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 6f424e1e68..a31fb66fb9 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -66,7 +66,7 @@ /* * Size of malloc() pool, although we don't actually use this yet. */ -#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ +#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_LONGHELP /* #undef to save memory */ -- cgit From cecb19c03f5a7abed2e8ff691bc849bdc3c4ed2c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:00 -0700 Subject: cros_ec: Add an enum for the number of flash regions Add an enum for the number of flash regions so we can keep track of all the possible regions. Reviewed-by: Randall Spangler Signed-off-by: Simon Glass --- include/ec_commands.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/ec_commands.h b/include/ec_commands.h index 12811cc070..d9c8c1f335 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -536,7 +536,7 @@ struct ec_response_flash_protect { enum ec_flash_region { /* Region which holds read-only EC image */ - EC_FLASH_REGION_RO, + EC_FLASH_REGION_RO = 0, /* Region which holds rewritable EC image */ EC_FLASH_REGION_RW, /* @@ -544,6 +544,8 @@ enum ec_flash_region { * EC_FLASH_REGION_RO) */ EC_FLASH_REGION_WP_RO, + /* Number of regions */ + EC_FLASH_REGION_COUNT, }; struct ec_params_flash_region_info { -- cgit From 006e73b9cafde9287912c4699091f3b1f07d3f97 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:01 -0700 Subject: cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou Signed-off-by: Simon Glass --- include/fdtdec.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index 19bab79448..aa695df317 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -530,4 +530,22 @@ const u8 *fdtdec_locate_byte_array(const void *blob, int node, */ int fdtdec_decode_region(const void *blob, int node, const char *prop_name, void **ptrp, size_t *size); + +/* A flash map entry, containing an offset and length */ +struct fmap_entry { + uint32_t offset; + uint32_t length; +}; + +/** + * Read a flash entry from the fdt + * + * @param blob FDT blob + * @param node Offset of node to read + * @param name Name of node being read + * @param entry Place to put offset and size of this node + * @return 0 if ok, -ve on error + */ +int fdtdec_read_fmap_entry(const void *blob, int node, const char *name, + struct fmap_entry *entry); #endif -- cgit From 41364f0fbe1e550a3326dd4310e41adec5ce30d7 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Thu, 27 Feb 2014 13:26:02 -0700 Subject: cros_ec: Move EC interface into common library Add a common library for obtaining access to the Chrome OS EC. This is used by boards which need to talk to the EC. Reviewed-by: Vadim Bendebury Tested-by: Vadim Bendebury Signed-off-by: Vadim Bendebury Signed-off-by: Simon Glass --- include/cros_ec.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'include') diff --git a/include/cros_ec.h b/include/cros_ec.h index 1e89f29eea..22eae90605 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -431,4 +431,22 @@ int cros_ec_set_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t state); * @return 0 if ok, -1 on error */ int cros_ec_get_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t *state); + +/** + * Initialize the Chrome OS EC at board initialization time. + * + * @return 0 if ok, -ve on error + */ +int cros_ec_board_init(void); + +/** + * Get access to the error reported when cros_ec_board_init() was called + * + * This permits delayed reporting of the EC error if it failed during + * early init. + * + * @return error (0 if there was no error, -ve if there was an error) + */ +int cros_ec_get_error(void); + #endif -- cgit From d7f25f35f448b15f815d355abd9ba39836fd9e32 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:03 -0700 Subject: cros_ec: Add a function for decoding the Chrome OS EC flashmap In order to talk to the EC properly we need to be able to understand the layout of its internal flash memory. This permits emulation of the EC for sandbox, and also software update in a system with a real EC. Signed-off-by: Simon Glass --- include/cros_ec.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'include') diff --git a/include/cros_ec.h b/include/cros_ec.h index 22eae90605..999c3c90c5 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -63,6 +63,17 @@ struct mbkp_keyscan { uint8_t data[CROS_EC_KEYSCAN_COLS]; }; +/* Holds information about the Chrome EC */ +struct fdt_cros_ec { + struct fmap_entry flash; /* Address and size of EC flash */ + /* + * Byte value of erased flash, or -1 if not known. It is normally + * 0xff but some flash devices use 0 (e.g. STM32Lxxx) + */ + int flash_erase_value; + struct fmap_entry region[EC_FLASH_REGION_COUNT]; +}; + /** * Read the ID of the CROS-EC device * @@ -449,4 +460,12 @@ int cros_ec_board_init(void); */ int cros_ec_get_error(void); +/** + * Returns information from the FDT about the Chrome EC flash + * + * @param blob FDT blob to use + * @param config Structure to use to return information + */ +int cros_ec_decode_ec_flash(const void *blob, struct fdt_cros_ec *config); + #endif -- cgit From 836bb6e8277aaa8f0f86e39b0c38b207d32723d9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:07 -0700 Subject: cros_ec: Sync up with latest Chrome OS EC version The EC messages have been expanded and some parts have been renamed. Signed-off-by: Simon Glass --- include/cros_ec.h | 4 +- include/cros_ec_message.h | 2 +- include/ec_commands.h | 344 ++++++++++++++++++++++++++++++++++++++++------ 3 files changed, 304 insertions(+), 46 deletions(-) (limited to 'include') diff --git a/include/cros_ec.h b/include/cros_ec.h index 999c3c90c5..31661329fd 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -151,7 +151,7 @@ enum { }; /** - * Set up the Chromium OS matrix keyboard protocol + * Initialise the Chromium OS EC driver * * @param blob Device tree blob containing setup information * @param cros_ecp Returns pointer to the cros_ec device, or NULL if none @@ -168,7 +168,7 @@ int cros_ec_init(const void *blob, struct cros_ec_dev **cros_ecp); * @param info Place to put the info structure */ int cros_ec_info(struct cros_ec_dev *dev, - struct ec_response_cros_ec_info *info); + struct ec_response_mkbp_info *info); /** * Read the host event flags diff --git a/include/cros_ec_message.h b/include/cros_ec_message.h index b1da53db1b..36e2d83ce1 100644 --- a/include/cros_ec_message.h +++ b/include/cros_ec_message.h @@ -23,7 +23,7 @@ enum { MSG_PROTO_BYTES = MSG_HEADER_BYTES + MSG_TRAILER_BYTES, /* Max length of messages */ - MSG_BYTES = EC_HOST_PARAM_SIZE + MSG_PROTO_BYTES, + MSG_BYTES = EC_PROTO2_MAX_PARAM_SIZE + MSG_PROTO_BYTES, }; #endif diff --git a/include/ec_commands.h b/include/ec_commands.h index d9c8c1f335..78baab1641 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. +/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -42,13 +42,19 @@ #define EC_LPC_ADDR_HOST_CMD 0x204 /* I/O addresses for host command args and params */ -#define EC_LPC_ADDR_HOST_ARGS 0x800 -#define EC_LPC_ADDR_HOST_PARAM 0x804 -#define EC_HOST_PARAM_SIZE 0x0fc /* Size of param area in bytes */ - -/* I/O addresses for host command params, old interface */ -#define EC_LPC_ADDR_OLD_PARAM 0x880 -#define EC_OLD_PARAM_SIZE 0x080 /* Size of param area in bytes */ +/* Protocol version 2 */ +#define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ +#define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is + * EC_PROTO2_MAX_PARAM_SIZE */ +/* Protocol version 3 */ +#define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ +#define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ + +/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff + * and they tell the kernel that so we have to think of it as two parts. */ +#define EC_HOST_CMD_REGION0 0x800 +#define EC_HOST_CMD_REGION1 0x880 +#define EC_HOST_CMD_REGION_SIZE 0x80 /* EC command register bit functions */ #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ @@ -122,8 +128,8 @@ #define EC_SWITCH_LID_OPEN 0x01 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 -/* Recovery requested via keyboard */ -#define EC_SWITCH_KEYBOARD_RECOVERY 0x08 +/* Was recovery requested via keyboard; now unused. */ +#define EC_SWITCH_IGNORE1 0x08 /* Recovery requested via dedicated signal (from servo board) */ #define EC_SWITCH_DEDICATED_RECOVERY 0x10 /* Was fake developer mode switch; now unused. Remove in next refactor. */ @@ -132,10 +138,13 @@ /* Host command interface flags */ /* Host command interface supports LPC args (LPC interface only) */ #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 +/* Host command interface supports version 3 protocol */ +#define EC_HOST_CMD_FLAG_VERSION_3 0x02 /* Wireless switch flags */ #define EC_WIRELESS_SWITCH_WLAN 0x01 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 +#define EC_WIRELESS_SWITCH_WWAN 0x04 /* * This header file is used in coreboot both in C and ACPI code. The ACPI code @@ -191,6 +200,9 @@ enum ec_status { EC_RES_UNAVAILABLE = 9, /* No response available */ EC_RES_TIMEOUT = 10, /* We got a timeout */ EC_RES_OVERFLOW = 11, /* Table / data overflow */ + EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ + EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ + EC_RES_RESPONSE_TOO_BIG = 14 /* Response was too big to handle */ }; /* @@ -272,6 +284,105 @@ struct ec_lpc_host_args { */ #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 +/*****************************************************************************/ + +/* + * Protocol version 2 for I2C and SPI send a request this way: + * + * 0 EC_CMD_VERSION0 + (command version) + * 1 Command number + * 2 Length of params = N + * 3..N+2 Params, if any + * N+3 8-bit checksum of bytes 0..N+2 + * + * The corresponding response is: + * + * 0 Result code (EC_RES_*) + * 1 Length of params = M + * 2..M+1 Params, if any + * M+2 8-bit checksum of bytes 0..M+1 + */ +#define EC_PROTO2_REQUEST_HEADER_BYTES 3 +#define EC_PROTO2_REQUEST_TRAILER_BYTES 1 +#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ + EC_PROTO2_REQUEST_TRAILER_BYTES) + +#define EC_PROTO2_RESPONSE_HEADER_BYTES 2 +#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 +#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ + EC_PROTO2_RESPONSE_TRAILER_BYTES) + +/* Parameter length was limited by the LPC interface */ +#define EC_PROTO2_MAX_PARAM_SIZE 0xfc + +/* Maximum request and response packet sizes for protocol version 2 */ +#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ + EC_PROTO2_MAX_PARAM_SIZE) +#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ + EC_PROTO2_MAX_PARAM_SIZE) + +/*****************************************************************************/ + +/* + * Value written to legacy command port / prefix byte to indicate protocol + * 3+ structs are being used. Usage is bus-dependent. + */ +#define EC_COMMAND_PROTOCOL_3 0xda + +#define EC_HOST_REQUEST_VERSION 3 + +/* Version 3 request from host */ +struct ec_host_request { + /* Struct version (=3) + * + * EC will return EC_RES_INVALID_HEADER if it receives a header with a + * version it doesn't know how to parse. + */ + uint8_t struct_version; + + /* + * Checksum of request and data; sum of all bytes including checksum + * should total to 0. + */ + uint8_t checksum; + + /* Command code */ + uint16_t command; + + /* Command version */ + uint8_t command_version; + + /* Unused byte in current protocol version; set to 0 */ + uint8_t reserved; + + /* Length of data which follows this header */ + uint16_t data_len; +} __packed; + +#define EC_HOST_RESPONSE_VERSION 3 + +/* Version 3 response from EC */ +struct ec_host_response { + /* Struct version (=3) */ + uint8_t struct_version; + + /* + * Checksum of response and data; sum of all bytes including checksum + * should total to 0. + */ + uint8_t checksum; + + /* Result code (EC_RES_*) */ + uint16_t result; + + /* Length of data which follows this header */ + uint16_t data_len; + + /* Unused bytes in current protocol version; set to 0 */ + uint16_t reserved; +} __packed; + +/*****************************************************************************/ /* * Notes on commands: * @@ -411,6 +522,46 @@ struct ec_response_get_comms_status { uint32_t flags; /* Mask of enum ec_comms_status */ } __packed; +/* + * Fake a variety of responses, purely for testing purposes. + * FIXME: Would be nice to force checksum errors. + */ +#define EC_CMD_TEST_PROTOCOL 0x0a + +/* Tell the EC what to send back to us. */ +struct ec_params_test_protocol { + uint32_t ec_result; + uint32_t ret_len; + uint8_t buf[32]; +} __packed; + +/* Here it comes... */ +struct ec_response_test_protocol { + uint8_t buf[32]; +} __packed; + +/* Get prococol information */ +#define EC_CMD_GET_PROTOCOL_INFO 0x0b + +/* Flags for ec_response_get_protocol_info.flags */ +/* EC_RES_IN_PROGRESS may be returned if a command is slow */ +#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0) + +struct ec_response_get_protocol_info { + /* Fields which exist if at least protocol version 3 supported */ + + /* Bitmask of protocol versions supported (1 << n means version n)*/ + uint32_t protocol_versions; + + /* Maximum request packet size, in bytes */ + uint16_t max_request_packet_size; + + /* Maximum response packet size, in bytes */ + uint16_t max_response_packet_size; + + /* Flags; see EC_PROTOCOL_INFO_* */ + uint32_t flags; +} __packed; /*****************************************************************************/ /* Flash commands */ @@ -452,15 +603,15 @@ struct ec_params_flash_read { /* Write flash */ #define EC_CMD_FLASH_WRITE 0x12 +#define EC_VER_FLASH_WRITE 1 + +/* Version 0 of the flash command supported only 64 bytes of data */ +#define EC_FLASH_WRITE_VER0_SIZE 64 struct ec_params_flash_write { uint32_t offset; /* Byte offset to write */ uint32_t size; /* Size to write in bytes */ - /* - * Data to write. Could really use EC_PARAM_SIZE - 8, but tidiest to - * use a power of 2 so writes stay aligned. - */ - uint8_t data[64]; + /* Followed by data to write */ } __packed; /* Erase flash */ @@ -728,6 +879,49 @@ enum lightbar_command { LIGHTBAR_NUM_CMDS }; +/*****************************************************************************/ +/* LED control commands */ + +#define EC_CMD_LED_CONTROL 0x29 + +enum ec_led_id { + EC_LED_ID_BATTERY_LED = 0, + EC_LED_ID_POWER_BUTTON_LED, + EC_LED_ID_ADAPTER_LED, +}; + +/* LED control flags */ +#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */ +#define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */ + +enum ec_led_colors { + EC_LED_COLOR_RED = 0, + EC_LED_COLOR_GREEN, + EC_LED_COLOR_BLUE, + EC_LED_COLOR_YELLOW, + EC_LED_COLOR_WHITE, + + EC_LED_COLOR_COUNT +}; + +struct ec_params_led_control { + uint8_t led_id; /* Which LED to control */ + uint8_t flags; /* Control flags */ + + uint8_t brightness[EC_LED_COLOR_COUNT]; +} __packed; + +struct ec_response_led_control { + /* + * Available brightness value range. + * + * Range 0 means color channel not present. + * Range 1 means on/off control. + * Other values means the LED is control by PWM. + */ + uint8_t brightness_range[EC_LED_COLOR_COUNT]; +} __packed; + /*****************************************************************************/ /* Verified boot commands */ @@ -916,57 +1110,57 @@ struct ec_params_tmp006_set_calibration { } __packed; /*****************************************************************************/ -/* CROS_EC - Matrix KeyBoard Protocol */ +/* MKBP - Matrix KeyBoard Protocol */ /* * Read key state * - * Returns raw data for keyboard cols; see ec_response_cros_ec_info.cols for + * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for * expected response size. */ -#define EC_CMD_CROS_EC_STATE 0x60 +#define EC_CMD_MKBP_STATE 0x60 /* Provide information about the matrix : number of rows and columns */ -#define EC_CMD_CROS_EC_INFO 0x61 +#define EC_CMD_MKBP_INFO 0x61 -struct ec_response_cros_ec_info { +struct ec_response_mkbp_info { uint32_t rows; uint32_t cols; uint8_t switches; } __packed; /* Simulate key press */ -#define EC_CMD_CROS_EC_SIMULATE_KEY 0x62 +#define EC_CMD_MKBP_SIMULATE_KEY 0x62 -struct ec_params_cros_ec_simulate_key { +struct ec_params_mkbp_simulate_key { uint8_t col; uint8_t row; uint8_t pressed; } __packed; /* Configure keyboard scanning */ -#define EC_CMD_CROS_EC_SET_CONFIG 0x64 -#define EC_CMD_CROS_EC_GET_CONFIG 0x65 +#define EC_CMD_MKBP_SET_CONFIG 0x64 +#define EC_CMD_MKBP_GET_CONFIG 0x65 /* flags */ -enum cros_ec_config_flags { - EC_CROS_EC_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ +enum mkbp_config_flags { + EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ }; -enum cros_ec_config_valid { - EC_CROS_EC_VALID_SCAN_PERIOD = 1 << 0, - EC_CROS_EC_VALID_POLL_TIMEOUT = 1 << 1, - EC_CROS_EC_VALID_MIN_POST_SCAN_DELAY = 1 << 3, - EC_CROS_EC_VALID_OUTPUT_SETTLE = 1 << 4, - EC_CROS_EC_VALID_DEBOUNCE_DOWN = 1 << 5, - EC_CROS_EC_VALID_DEBOUNCE_UP = 1 << 6, - EC_CROS_EC_VALID_FIFO_MAX_DEPTH = 1 << 7, +enum mkbp_config_valid { + EC_MKBP_VALID_SCAN_PERIOD = 1 << 0, + EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1, + EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3, + EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4, + EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5, + EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6, + EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, }; /* Configuration for our key scanning algorithm */ -struct ec_cros_ec_config { +struct ec_mkbp_config { uint32_t valid_mask; /* valid fields */ - uint8_t flags; /* some flags (enum cros_ec_config_flags) */ + uint8_t flags; /* some flags (enum mkbp_config_flags) */ uint8_t valid_flags; /* which flags are valid */ uint16_t scan_period_us; /* period between start of scans */ /* revert to interrupt mode after no activity for this long */ @@ -985,12 +1179,12 @@ struct ec_cros_ec_config { uint8_t fifo_max_depth; } __packed; -struct ec_params_cros_ec_set_config { - struct ec_cros_ec_config config; +struct ec_params_mkbp_set_config { + struct ec_mkbp_config config; } __packed; -struct ec_response_cros_ec_get_config { - struct ec_cros_ec_config config; +struct ec_response_mkbp_get_config { + struct ec_mkbp_config config; } __packed; /* Run the key scan emulation */ @@ -1146,7 +1340,7 @@ struct ec_response_gpio_get { #define EC_CMD_I2C_READ 0x94 struct ec_params_i2c_read { - uint16_t addr; + uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ uint8_t read_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; @@ -1160,7 +1354,7 @@ struct ec_response_i2c_read { struct ec_params_i2c_write { uint16_t data; - uint16_t addr; + uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ uint8_t write_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; @@ -1243,6 +1437,61 @@ struct ec_response_ldo_get { uint8_t state; } __packed; +/*****************************************************************************/ +/* Power info. */ + +/* + * Get power info. + */ +#define EC_CMD_POWER_INFO 0x9d + +struct ec_response_power_info { + uint32_t usb_dev_type; + uint16_t voltage_ac; + uint16_t voltage_system; + uint16_t current_system; + uint16_t usb_current_limit; +} __packed; + +/*****************************************************************************/ +/* I2C passthru command */ + +#define EC_CMD_I2C_PASSTHRU 0x9e + +/* Slave address is 10 (not 7) bit */ +#define EC_I2C_FLAG_10BIT (1 << 16) + +/* Read data; if not present, message is a write */ +#define EC_I2C_FLAG_READ (1 << 15) + +/* Mask for address */ +#define EC_I2C_ADDR_MASK 0x3ff + +#define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */ +#define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */ + +/* Any error */ +#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) + +struct ec_params_i2c_passthru_msg { + uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ + uint16_t len; /* Number of bytes to read or write */ +} __packed; + +struct ec_params_i2c_passthru { + uint8_t port; /* I2C port number */ + uint8_t num_msgs; /* Number of messages */ + struct ec_params_i2c_passthru_msg msg[]; + /* Data to write for all messages is concatenated here */ +} __packed; + +struct ec_response_i2c_passthru { + uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ + uint8_t num_msgs; /* Number of messages processed */ + uint8_t data[]; /* Data read by messages concatenated here */ +} __packed; + + /*****************************************************************************/ /* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */ @@ -1259,7 +1508,16 @@ struct ec_response_ldo_get { #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1 struct ec_params_current_limit { - uint32_t limit; + uint32_t limit; /* in mA */ +} __packed; + +/* + * Set maximum external power current. + */ +#define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2 + +struct ec_params_ext_power_current_limit { + uint32_t limit; /* in mA */ } __packed; /*****************************************************************************/ -- cgit From e8c12662364fbcf5ea917d341f707534c8574900 Mon Sep 17 00:00:00 2001 From: Randall Spangler Date: Thu, 27 Feb 2014 13:26:08 -0700 Subject: cros_ec: Clean up multiple EC protocol support Version 1 protocols (without command version) were already no longer supported in cros_ec.c. This removes some dead code from the cros_ec_i2c driver. Version 2 protcols (with command version) are now called protocol_version=2, instead of cmd_version_is_supported=1. A subsequent change will introduce protocol version 3 for SPI. Reviewed-by: Simon Glass Signed-off-by: Randall Spangler Signed-off-by: Simon Glass --- include/cros_ec.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/cros_ec.h b/include/cros_ec.h index 31661329fd..1199d92335 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -33,7 +33,7 @@ struct cros_ec_dev { unsigned int bus_num; /* Bus number (for I2C) */ unsigned int max_frequency; /* Maximum interface frequency */ struct fdt_gpio_state ec_int; /* GPIO used as EC interrupt line */ - int cmd_version_is_supported; /* Device supports command versions */ + int protocol_version; /* Protocol version to use */ int optimise_flash_write; /* Don't write erased flash blocks */ /* @@ -260,8 +260,7 @@ int cros_ec_spi_decode_fdt(struct cros_ec_dev *dev, const void *blob); * Check whether the LPC interface supports new-style commands. * * LPC has its own way of doing this, which involves checking LPC values - * visible to the host. Do this, and update dev->cmd_version_is_supported - * accordingly. + * visible to the host. Do this, and update dev->protocol_version accordingly. * * @param dev CROS-EC device to check */ -- cgit From a60702833150b8f9263a5f1fb9a6b64774cd44f3 Mon Sep 17 00:00:00 2001 From: Randall Spangler Date: Thu, 27 Feb 2014 13:26:10 -0700 Subject: cros_ec: spi: Add support for EC protocol version 3 Protocol version 3 will be attempted first; if the EC doesn't support it, u-boot will fall back to the old protocol version (2). Reviewed-by: Simon Glass Signed-off-by: Randall Spangler Signed-off-by: Simon Glass --- include/cros_ec.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include') diff --git a/include/cros_ec.h b/include/cros_ec.h index 1199d92335..84f9104d36 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -311,6 +311,19 @@ int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, const uint8_t *dout, int dout_len, uint8_t **dinp, int din_len); +/** + * Send a packet to a CROS-EC device and return the response packet. + * + * Expects the request packet to be stored in dev->dout. Stores the response + * packet in dev->din. + * + * @param dev CROS-EC device + * @param out_bytes Size of request packet to output + * @param in_bytes Maximum size of response packet to receive + * @return number of bytes in response packet, or <0 on error + */ +int cros_ec_spi_packet(struct cros_ec_dev *dev, int out_bytes, int in_bytes); + /** * Dump a block of data for a command. * -- cgit From df93d90aea85deff0b19ece43ba6f379c7c4d9cc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:12 -0700 Subject: cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury Signed-off-by: Simon Glass --- include/cros_ec.h | 21 +++++++++++++++++++++ include/fdtdec.h | 1 + 2 files changed, 22 insertions(+) (limited to 'include') diff --git a/include/cros_ec.h b/include/cros_ec.h index 84f9104d36..1b7c620905 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -20,6 +20,7 @@ enum cros_ec_interface_t { CROS_EC_IF_SPI, CROS_EC_IF_I2C, CROS_EC_IF_LPC, /* Intel Low Pin Count interface */ + CROS_EC_IF_SANDBOX, }; /* Our configuration information */ @@ -237,6 +238,7 @@ struct cros_ec_dev *board_get_cros_ec_dev(void); int cros_ec_i2c_init(struct cros_ec_dev *dev, const void *blob); int cros_ec_spi_init(struct cros_ec_dev *dev, const void *blob); int cros_ec_lpc_init(struct cros_ec_dev *dev, const void *blob); +int cros_ec_sandbox_init(struct cros_ec_dev *dev, const void *blob); /** * Read information from the fdt for the i2c cros_ec interface @@ -256,6 +258,15 @@ int cros_ec_i2c_decode_fdt(struct cros_ec_dev *dev, const void *blob); */ int cros_ec_spi_decode_fdt(struct cros_ec_dev *dev, const void *blob); +/** + * Read information from the fdt for the sandbox cros_ec interface + * + * @param dev CROS-EC device + * @param blob Device tree blob + * @return 0 if ok, -1 if we failed to read all required information + */ +int cros_ec_sandbox_decode_fdt(struct cros_ec_dev *dev, const void *blob); + /** * Check whether the LPC interface supports new-style commands. * @@ -323,6 +334,8 @@ int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version, * @return number of bytes in response packet, or <0 on error */ int cros_ec_spi_packet(struct cros_ec_dev *dev, int out_bytes, int in_bytes); +int cros_ec_sandbox_packet(struct cros_ec_dev *dev, int out_bytes, + int in_bytes); /** * Dump a block of data for a command. @@ -480,4 +493,12 @@ int cros_ec_get_error(void); */ int cros_ec_decode_ec_flash(const void *blob, struct fdt_cros_ec *config); +/** + * Check the current keyboard state, in case recovery mode is requested. + * This function is for sandbox only. + * + * @param ec CROS-EC device + */ +void cros_ec_check_keyboard(struct cros_ec_dev *dev); + #endif diff --git a/include/fdtdec.h b/include/fdtdec.h index aa695df317..bcd2ee5f9c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -88,6 +88,7 @@ enum fdt_compat_id { COMPAT_INFINEON_SLB9635_TPM, /* Infineon SLB9635 TPM */ COMPAT_INFINEON_SLB9645_TPM, /* Infineon SLB9645 TPM */ COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */ + COMPAT_SANDBOX_HOST_EMULATION, /* Sandbox emulation of a function */ COMPAT_COUNT, }; -- cgit From b2a668b523ee78c56b466300350050924ed59553 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:14 -0700 Subject: cros_ec: Implement I2C pass-through The Chrome EC has a feature where you can access its I2C buses through a pass-through arrangement. Add a command to support this, and export the function for it also. Reviewed-by: Vadim Bendebury Signed-off-by: Simon Glass --- include/cros_ec.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/cros_ec.h b/include/cros_ec.h index 1b7c620905..1e4d8db96b 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -501,4 +501,18 @@ int cros_ec_decode_ec_flash(const void *blob, struct fdt_cros_ec *config); */ void cros_ec_check_keyboard(struct cros_ec_dev *dev); +/* + * Tunnel an I2C transfer to the EC + * + * @param dev CROS-EC device + * @param chip Chip address (7-bit I2C address) + * @param addr Register address to read/write + * @param alen Length of register address in bytes + * @param buffer Buffer containing data to read/write + * @param len Length of buffer + * @param is_read 1 if this is a read, 0 if this is a write + */ +int cros_ec_i2c_xfer(struct cros_ec_dev *dev, uchar chip, uint addr, + int alen, uchar *buffer, int len, int is_read); + #endif -- cgit From 47f5fcfb4169a8ff6e8c81738b77f8572f972e75 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:15 -0700 Subject: sandbox: Add os_jump_to_image() to run another executable For some tests it is useful to be able to run U-Boot again but pass on the same memory contents. Add a function to achieve this. Reviewed-by: Simon Glass Signed-off-by: Simon Glass --- include/os.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'include') diff --git a/include/os.h b/include/os.h index fa4e39fc74..9b5da5c43d 100644 --- a/include/os.h +++ b/include/os.h @@ -253,4 +253,23 @@ int os_write_ram_buf(const char *fname); */ int os_read_ram_buf(const char *fname); +/** + * Jump to a new executable image + * + * This uses exec() to run a new executable image, after putting it in a + * temporary file. The same arguments and environment are passed to this + * new image, with the addition of: + * + * -j Specifies the filename the image was written to. The + * calling image may want to delete this at some point. + * -m Specifies the file containing the sandbox memory + * (ram_buf) from this image, so that the new image can + * have access to this. It also means that the original + * memory filename passed to U-Boot will be left intact. + * + * @param dest Buffer containing executable image + * @param size Size of buffer + */ +int os_jump_to_image(const void *dest, int size); + #endif -- cgit From 7d95f2a329c964b54cf505503a61e8fd4f12e2a3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:19 -0700 Subject: sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou Signed-off-by: Simon Glass --- include/fdtdec.h | 1 + include/lcd.h | 3 +++ 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index bcd2ee5f9c..6e859ce64c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -89,6 +89,7 @@ enum fdt_compat_id { COMPAT_INFINEON_SLB9645_TPM, /* Infineon SLB9645 TPM */ COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */ COMPAT_SANDBOX_HOST_EMULATION, /* Sandbox emulation of a function */ + COMPAT_SANDBOX_LCD_SDL, /* Sandbox LCD emulation with SDL */ COMPAT_COUNT, }; diff --git a/include/lcd.h b/include/lcd.h index d06d6f1072..5f84cd3c5b 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -313,6 +313,9 @@ int lcd_get_size(int *line_length); int lcd_dt_simplefb_add_node(void *blob); int lcd_dt_simplefb_enable_existing_node(void *blob); +/* Update the LCD / flush the cache */ +void lcd_sync(void); + /************************************************************************/ /* ** BITMAP DISPLAY SUPPORT */ /************************************************************************/ -- cgit From a77bf70978a42e94790a8bc81941edc1026939ce Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:20 -0700 Subject: sound: Move Samsung-specific code into its own file The i2s code is in fact Samsung-specific, but there might be other implementation. Move this code into its own file. This makes it slightly more obviously how to adjust the code to support another SoC, when someone takes this task on. Also drop non-FDT support, since it isn't used on Exynos 5. Tested-by: Che-Liang Chiou Signed-off-by: Simon Glass --- include/configs/exynos5250-dt.h | 1 + include/sound.h | 9 +++++++++ 2 files changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 615df64dc1..b7ff47236b 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -51,6 +51,7 @@ #define CONFIG_CMD_SOUND #ifdef CONFIG_CMD_SOUND #define CONFIG_SOUND +#define CONFIG_I2S_SAMSUNG #define CONFIG_I2S #define CONFIG_SOUND_MAX98095 #define CONFIG_SOUND_WM8994 diff --git a/include/sound.h b/include/sound.h index a06ab85386..155e1b40e2 100644 --- a/include/sound.h +++ b/include/sound.h @@ -29,6 +29,15 @@ struct sound_codec_info { enum en_sound_codec codec_type; }; +/* + * Generates square wave sound data for 1 second + * + * @param data data buffer pointer + * @param size size of the buffer + * @param freq frequency of the wave + */ +void sound_create_square_wave(unsigned short *data, int size, uint32_t freq); + /* * Initialises audio sub system * @param blob Pointer of device tree node or NULL if none. -- cgit From 20f86a0aeaad5dfa0b4f50bf5d04dd7bf1f7c3e9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:21 -0700 Subject: sandbox: Deal with conflicting getenv() for SDL Unfortunately SDL requires getenv() to operate, since it wants to figure out the display type. U-Boot has its own getenv() and they conflict. As a work-around use #define to resolve the conflict. A better but more complex solution might be to rename some U-Boot symbols at link time. SDL audio is not functional at present, likely due to a related issue. Note: Vic Yank wrote a script for this, filed in crbug.com/271125. Reviewed-by: Simon Glass Signed-off-by: Simon Glass --- include/common.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/common.h b/include/common.h index 090fcde5d0..968334b588 100644 --- a/include/common.h +++ b/include/common.h @@ -360,6 +360,11 @@ int do_ext2load(cmd_tbl_t *, int, int, char * const []); int env_init (void); void env_relocate (void); int envmatch (uchar *, int); + +/* Avoid unfortunate conflict with libc's getenv() */ +#ifdef CONFIG_SANDBOX +#define getenv uboot_getenv +#endif char *getenv (const char *); int getenv_f (const char *name, char *buf, unsigned len); ulong getenv_ulong(const char *name, int base, ulong default_val); -- cgit From ffb87905cb3883c84598b87ca05384c17d59dee1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:22 -0700 Subject: sandbox: Allow Ctrl-C to work in sandbox It is useful for Cltl-C to be handled by U-Boot as it is on other boards. But it is also useful to be able to terminate U-Boot with Ctrl-C. Add an option to enable signals while in raw mode, and make this the default. Add an option to leave the terminal cooked, which is useful for redirecting output. Signed-off-by: Simon Glass --- include/os.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/os.h b/include/os.h index 9b5da5c43d..0230a7f40d 100644 --- a/include/os.h +++ b/include/os.h @@ -103,8 +103,12 @@ void os_exit(int exit_code) __attribute__((noreturn)); /** * Put tty into raw mode to mimic serial console better + * + * @param fd File descriptor of stdin (normally 0) + * @param allow_sigs Allow Ctrl-C, Ctrl-Z to generate signals rather than + * be handled by U-Boot */ -void os_tty_raw(int fd); +void os_tty_raw(int fd, bool allow_sigs); /** * Acquires some memory from the underlying os. -- cgit From 2c072c958bb544c72f0e848375803dbd6971f022 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 27 Feb 2014 13:26:25 -0700 Subject: sandbox: config: Enable cros_ec emulation and related items Enable the Chrome OS EC emulation for sandbox along with LCD, sound expanded GPIOs and a few other options to make this work correctly. Reviewed-by: Simon Glass Tested-by: Che-Liang Chiou Signed-off-by: Simon Glass --- include/common.h | 1 + include/configs/sandbox.h | 38 +++++++++++++++++++++++++++++++++----- 2 files changed, 34 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/common.h b/include/common.h index 968334b588..5c9bd08f45 100644 --- a/include/common.h +++ b/include/common.h @@ -314,6 +314,7 @@ static inline int print_cpuinfo(void) } #endif int update_flash_size(int flash_size); +int arch_early_init_r(void); /** * Show the DRAM size in a board-specific way diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index a31fb66fb9..04171bdfd6 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -57,7 +57,7 @@ #define CONFIG_CMD_GPIO #define CONFIG_SANDBOX_GPIO -#define CONFIG_SANDBOX_GPIO_COUNT 20 +#define CONFIG_SANDBOX_GPIO_COUNT 128 #define CONFIG_CMD_GPT #define CONFIG_PARTITION_UUIDS @@ -80,6 +80,7 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_COMMAND_HISTORY #define CONFIG_AUTO_COMPLETE +#define CONFIG_BOOTDELAY 3 #define CONFIG_ENV_SIZE 8192 #define CONFIG_ENV_IS_NOWHERE @@ -90,6 +91,8 @@ #define CONFIG_CMD_SF_TEST #define CONFIG_CMD_SPI #define CONFIG_SPI_FLASH +#define CONFIG_OF_SPI +#define CONFIG_OF_SPI_FLASH #define CONFIG_SPI_FLASH_SANDBOX #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_WINBOND @@ -98,7 +101,9 @@ #define CONFIG_SYS_LOAD_ADDR 0x00000000 #define CONFIG_SYS_MEMTEST_START 0x00100000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000) -#define CONFIG_SYS_FDT_LOAD_ADDR 0x1000000 +#define CONFIG_SYS_FDT_LOAD_ADDR 0x100 + +#define CONFIG_PHYSMEM /* Size of our emulated memory */ #define CONFIG_SYS_SDRAM_BASE 0 @@ -126,13 +131,36 @@ #define CONFIG_SHA1 #define CONFIG_SHA256 +#define CONFIG_TPM_TIS_SANDBOX + #define CONFIG_CMD_SANDBOX #define CONFIG_BOOTARGS "" -#define CONFIG_EXTRA_ENV_SETTINGS "stdin=serial\0" \ - "stdout=serial\0" \ - "stderr=serial\0" +#define CONFIG_CROS_EC +#define CONFIG_CMD_CROS_EC +#define CONFIG_CROS_EC_SANDBOX +#define CONFIG_KEYBOARD +#define CONFIG_CROS_EC_KEYB +#define CONFIG_ARCH_EARLY_INIT_R +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_SOUND +#define CONFIG_SOUND_SANDBOX +#define CONFIG_CMD_SOUND + +#define CONFIG_SANDBOX_SDL +#define CONFIG_LCD +#define CONFIG_VIDEO_SANDBOX_SDL +#define CONFIG_CMD_BMP +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define LCD_BPP LCD_COLOR16 + +#define CONFIG_EXTRA_ENV_SETTINGS "stdin=serial,cros-ec-keyb\0" \ + "stdout=serial,lcd\0" \ + "stderr=serial,lcd\0" #define CONFIG_GZIP_COMPRESSED #define CONFIG_BZIP2 -- cgit