From 6912f2a8ae9d98203cb2470c472d3f2fde78357b Mon Sep 17 00:00:00 2001 From: Suniel Mahesh Date: Wed, 31 Jul 2019 21:54:07 +0530 Subject: watchdog: omap_wdt: Disable DM watchdog support in SPL This patch disables DM watchdog support for SPL builds and uses the legacy omap watchdog driver on TI AM335x chipsets. The following build error is reported if DM watchdog support was enabled in SPL: CC spl/drivers/usb/gadget/rndis.o LD spl/drivers/usb/gadget/built-in.o LD spl/drivers/usb/musb-new/built-in.o LD spl/drivers/built-in.o LD spl/u-boot-spl arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram arm-linux-ld.bfd: region .sram overflowed by 440 bytes make[1]: *** [spl/u-boot-spl] Error 1 make: *** [spl/u-boot-spl] Error 2 Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG, now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed this by simply calling hw_watchdog_reset in watchdog_reset. Built and tested on AM335x device (BeagleboneBlack), compile tested for all other AM33xx/omap2 based boards. Signed-off-by: Suniel Mahesh [trini: Fix watchdog.h logic] Signed-off-by: Tom Rini --- include/watchdog.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/watchdog.h b/include/watchdog.h index 3a357de903..a4a4e8e614 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -77,7 +77,7 @@ int init_func_watchdog_reset(void); * Prototypes from $(CPU)/cpu.c. */ -#if defined(CONFIG_HW_WATCHDOG) && !defined(__ASSEMBLY__) +#if (defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)) && !defined(__ASSEMBLY__) void hw_watchdog_init(void); #endif -- cgit From 60df809f626016d9992a7e894799a675c61d4d4b Mon Sep 17 00:00:00 2001 From: Hannes Schmelzer Date: Thu, 1 Aug 2019 07:04:46 +0200 Subject: board/BuR/brsmarc1: initial commit This commit adds support for the B&R brsmarc1 SoM. The SoM is based on TI's AM335x SoC. Mainly vxWorks 6.9.4.x is running on the board, doing some PLC stuff on various carrier boards. Signed-off-by: Hannes Schmelzer --- include/configs/brsmarc1.h | 83 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 include/configs/brsmarc1.h (limited to 'include') diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h new file mode 100644 index 0000000000..c18445816e --- /dev/null +++ b/include/configs/brsmarc1.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * brsmarc1.h + * + * specific parts for B&R BRSMARC1 Motherboard + * + * Copyright (C) 2017 Hannes Schmelzer - + * B&R Industrial Automation GmbH - http://www.br-automation.com + * + */ + +#ifndef __CONFIG_BRSMARC1_H__ +#define __CONFIG_BRSMARC1_H__ + +#include +#include +/* ------------------------------------------------------------------------- */ +#define CONFIG_BOARD_TYPES + +/* memory */ +#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024) +#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +#define CONFIG_MACH_TYPE 3589 + +#ifndef CONFIG_SPL_BUILD + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ +BUR_COMMON_ENV \ +"autoload=0\0" \ +"scradr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ +"cfgscr=mw ${dtbaddr} 0;" \ +" sf probe && sf read ${scradr} 0xC0000 0x10000 && source ${scradr};" \ +" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" \ +"dtbaddr=0x84000000\0" \ +"loadaddr=0x82000000\0" \ +"b_break=0\0" \ +"b_tgts_std=mmc0 mmc1 def net usb0\0" \ +"b_tgts_rcy=def net usb0\0" \ +"b_tgts_pme=net usb0 mmc0 mmc1\0" \ +"b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \ +" elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \ +" else setenv b_tgts ${b_tgts_std}; fi\0" \ +"b_mmc0=load mmc 1 ${scradr} bootscr.img && source ${scradr}\0" \ +"b_mmc1=load mmc 1 ${loadaddr} arimg.ugz && run startsys\0" \ +"b_def=sf read ${loadaddr} 100000 700000; run startsys\0" \ +"b_net=tftp ${scradr} netscript.img && source ${scradr}\0" \ +"b_usb0=usb start && load usb 0 ${scradr} bootscr.img && source ${scradr}\0" \ +"b_default=run b_deftgts; for target in ${b_tgts};"\ +" do run b_${target}; if test ${b_break} = 1; then; exit; fi; done\0" \ +"vxargs=setenv bootargs cpsw(0,0)host:vxWorks h=${serverip}" \ +" e=${ipaddr}:${netmask} g=${gatewayip} u=vxWorksFTP pw=vxWorks\0" \ +"vxfdt=fdt addr ${dtbaddr}; fdt resize 0x8000;" \ +" fdt boardsetup\0" \ +"startsys=run vxargs && mw 0x80001100 0 && run vxfdt &&" \ +" bootm ${loadaddr} - ${dtbaddr}\0" +#endif /* !CONFIG_SPL_BUILD*/ + +/* undefine command which we not need here */ +#undef CONFIG_BOOTM_NETBSD +#undef CONFIG_BOOTM_PLAN9 +#undef CONFIG_BOOTM_RTEMS + +/* Support both device trees and ATAGs. */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +/* SPI Flash */ +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 + +/* Environment */ +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) + +#define CONFIG_CONS_INDEX 1 +#endif /* __CONFIG_BRSMARC1_H__ */ -- cgit From acbb7cd4d34caec36ff6d044a8f55325fa27459f Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Thu, 1 Aug 2019 19:12:55 +0530 Subject: clk: add support for clk_is_match() Add support for clk_is_match() which is required to know if two clock pointers point to the same exact physical clock. Also add a unit test for the new API. Reviewed-by: Lokesh Vutla Signed-off-by: Sekhar Nori --- include/clk.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/clk.h b/include/clk.h index 2ebc905e04..3ca2796b57 100644 --- a/include/clk.h +++ b/include/clk.h @@ -333,6 +333,18 @@ int clk_disable(struct clk *clk); */ int clk_disable_bulk(struct clk_bulk *bulk); +/** + * clk_is_match - check if two clk's point to the same hardware clock + * @p: clk compared against q + * @q: clk compared against p + * + * Returns true if the two struct clk pointers both point to the same hardware + * clock node. + * + * Returns false otherwise. Note that two NULL clks are treated as matching. + */ +bool clk_is_match(const struct clk *p, const struct clk *q); + int soc_clk_dump(void); /** -- cgit From f5b904796fa876bbfdf6eb9d2b311f9d01d80f5a Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Thu, 1 Aug 2019 19:12:56 +0530 Subject: dm: core: add support for getting register address and size Current dev_read_*() API lacks support to get address and size of a "reg" property by name or index. Add support for the same. Livetree support has been added but not tested on real hardware. The existing unit tests testing reading address from device-tree have been updated to test address as well as size. Reviewed-by: Lokesh Vutla Signed-off-by: Sekhar Nori --- include/dm/fdtaddr.h | 18 ++++++++++++++++++ include/dm/read.h | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+) (limited to 'include') diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h index 3bc2599b6c..57b326cb33 100644 --- a/include/dm/fdtaddr.h +++ b/include/dm/fdtaddr.h @@ -120,4 +120,22 @@ fdt_addr_t devfdt_get_addr_size_index(struct udevice *dev, int index, */ fdt_addr_t devfdt_get_addr_name(struct udevice *dev, const char *name); +/** + * devfdt_get_addr_size_name() - Get the reg property and its size for a device, + * indexed by name + * + * Returns the address and size specified in the 'reg' property of a device. + * + * @dev: Pointer to a device + * @name: the 'reg' property can hold a list of pairs, with the + * 'reg-names' property providing named-based identification. @index + * indicates the value to search for in 'reg-names'. + * @size: Pointer to size variable - this function returns the size + * specified in the 'reg' property here + * + * @return addr + */ +fdt_addr_t devfdt_get_addr_size_name(struct udevice *dev, const char *name, + fdt_size_t *size); + #endif diff --git a/include/dm/read.h b/include/dm/read.h index 6ecd062e20..0c62d62f11 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -144,6 +144,19 @@ int dev_read_size(struct udevice *dev, const char *propname); */ fdt_addr_t dev_read_addr_index(struct udevice *dev, int index); +/** + * dev_read_addr_size_index() - Get the indexed reg property of a device + * + * @dev: Device to read from + * @index: the 'reg' property can hold a list of pairs + * and @index is used to select which one is required + * @size: place to put size value (on success) + * + * @return address or FDT_ADDR_T_NONE if not found + */ +fdt_addr_t dev_read_addr_size_index(struct udevice *dev, int index, + fdt_size_t *size); + /** * dev_remap_addr_index() - Get the indexed reg property of a device * as a memory-mapped I/O pointer @@ -168,6 +181,20 @@ void *dev_remap_addr_index(struct udevice *dev, int index); */ fdt_addr_t dev_read_addr_name(struct udevice *dev, const char* name); +/** + * dev_read_addr_size_name() - Get the reg property of a device, indexed by name + * + * @dev: Device to read from + * @name: the 'reg' property can hold a list of pairs, with the + * 'reg-names' property providing named-based identification. @index + * indicates the value to search for in 'reg-names'. + * @size: place to put size value (on success) + * + * @return address or FDT_ADDR_T_NONE if not found + */ +fdt_addr_t dev_read_addr_size_name(struct udevice *dev, const char *name, + fdt_size_t *size); + /** * dev_remap_addr_name() - Get the reg property of a device, indexed by name, * as a memory-mapped I/O pointer @@ -601,12 +628,26 @@ static inline fdt_addr_t dev_read_addr_index(struct udevice *dev, int index) return devfdt_get_addr_index(dev, index); } +static inline fdt_addr_t dev_read_addr_size_index(struct udevice *dev, + int index, + fdt_size_t *size) +{ + return devfdt_get_addr_size_index(dev, index, size); +} + static inline fdt_addr_t dev_read_addr_name(struct udevice *dev, const char *name) { return devfdt_get_addr_name(dev, name); } +static inline fdt_addr_t dev_read_addr_size_name(struct udevice *dev, + const char *name, + fdt_size_t *size) +{ + return devfdt_get_addr_size_name(dev, name, size); +} + static inline fdt_addr_t dev_read_addr(struct udevice *dev) { return devfdt_get_addr(dev); -- cgit From 476e991452433b72f280147c93435ccd9423639f Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Thu, 1 Aug 2019 19:13:00 +0530 Subject: arm: dts: k3-am65: add support for PCIe and SERDES Add needed device-tree nodes to support PCIe 0 and SERDES on AM65x SoC. The nodes are kept disabled by default. Signed-off-by: Sekhar Nori --- include/dt-bindings/phy/phy-am654-serdes.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 include/dt-bindings/phy/phy-am654-serdes.h (limited to 'include') diff --git a/include/dt-bindings/phy/phy-am654-serdes.h b/include/dt-bindings/phy/phy-am654-serdes.h new file mode 100644 index 0000000000..e8d901729e --- /dev/null +++ b/include/dt-bindings/phy/phy-am654-serdes.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for AM654 SERDES. + */ + +#ifndef _DT_BINDINGS_AM654_SERDES +#define _DT_BINDINGS_AM654_SERDES + +#define AM654_SERDES_CMU_REFCLK 0 +#define AM654_SERDES_LO_REFCLK 1 +#define AM654_SERDES_RO_REFCLK 2 + +#endif /* _DT_BINDINGS_AM654_SERDES */ -- cgit From 66e2637b19ed49ee4038dd9d440ce6357587b38c Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Thu, 1 Aug 2019 08:47:55 -0500 Subject: ARM: da850-evm: Fix Lowlevel init A previous patch for enabling the NAND config set a flag called CONFIG_SKIP_LOWLEVEL_INIT when it should have been called CONFIG_SKIP_LOWLEVEL_INIT_ONLY. The affect this had was creating a delay on startup for the NOR version which is XIP and doesn't have SPL, so the lowlevel initialization functions need to operate. This delay was not really noticeable at first, but the delays have been getting longer, finally reached the point of nearly seven seconds before the board would appear to start. This patch sets the CONFIG_SKIP_LOWLEVEL_INIT_ONLY instead which means "The normal CP15 init (such as enabling the instruction cache) is still performed" per the README. It doesn't appear to have any adverse behavior on the SPI Flash or the NAND flash boards which use SPL. Fixes: 93f3362762f0 ("ARM: configs: Add da850evm_nand to boot from NAND") Signed-off-by: Adam Ford --- include/configs/da850evm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index ff536131ba..0281dbd7b4 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY #ifdef CONFIG_DIRECT_NOR_BOOT #define CONFIG_ARCH_CPU_INIT -- cgit From d2c30190ee69869164c3bfafaed5143b0c316983 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Fri, 2 Aug 2019 07:03:39 -0500 Subject: ARM: da850-evm: Increase environment NOR partition offset The current size allocated to U-Boot is 384k, but U-Boot has grown to 436K which means that saving the environmental variables wipes out part of the U-Boot source and the board ceases to function. Due to the sector and erase size for the NOR part and a desire to not have to change partition sizes often, this patch moves the U-Boot environmental variables to an offset of 1M so saveenv does not brick the board. This patch also sets up MTDIDS and MTDPARTS to clearly show where U-Boot and U-Boot's environmental variables are located. Signed-off-by: Adam Ford --- include/configs/da850evm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 0281dbd7b4..9bd6da015e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -192,7 +192,7 @@ #ifdef CONFIG_USE_NOR #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ -#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) +#define CONFIG_ENV_OFFSET (SZ_1M) #define CONFIG_ENV_SIZE (10 << 10) /* 10KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE #define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ -- cgit