From 0ea4fc4dcf90ef0281ee413892ba3281de3f54c8 Mon Sep 17 00:00:00 2001 From: Hannes Schmelzer Date: Thu, 16 May 2019 17:24:19 +0200 Subject: board/BuR: invalidate ${dtbaddr} before cfgscr The first memory location of ${dtbaddr} may be still valid after a warm restart of the machine and 'fdt addr ${dtbaddr}' doesn't recognize that the cfgscript didn't run properly and fallback mechanism with copying the internal fdt ${fdtcontroladdr} to ${dtbaddr} doesn't catch this. To get sure that we have proper failsafe behaviour we simply zero the first memory location of ${dtbaddr} for getting sure that the fdt is invalid if cfgscript didn't run. Signed-off-by: Hannes Schmelzer Signed-off-by: Hannes Schmelzer --- include/configs/brppt1.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 51af93a32f..82f3f1a707 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -66,7 +66,8 @@ #define NANDTGTS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ -"cfgscr=nand read ${cfgaddr} cfgscr && source ${cfgaddr}\0" \ +"cfgscr=mw ${dtbaddr} 0; nand read ${cfgaddr} cfgscr && source ${cfgaddr};" \ +" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" \ "nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \ "root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \ "b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \ @@ -104,7 +105,9 @@ #ifdef CONFIG_ENV_IS_IN_MMC #define MMCTGTS \ MMCSPI_TGTS \ -"cfgscr=mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr}\0" +"cfgscr=mw ${dtbaddr} 0;" \ +" mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr};" \ +" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" #else #define MMCTGTS "" #endif /* CONFIG_MMC */ @@ -112,7 +115,9 @@ MMCSPI_TGTS \ #ifdef CONFIG_SPI #define SPITGTS \ MMCSPI_TGTS \ -"cfgscr=sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr}\0" +"cfgscr=mw ${dtbaddr} 0;" \ +" sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr};" \ +" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" #else #define SPITGTS "" #endif /* CONFIG_SPI */ -- cgit From 881ae794b93b7bc56be1c43015845fac34d0f2c9 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:13 +0200 Subject: calimain: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski --- include/configs/calimain.h | 272 --------------------------------------------- 1 file changed, 272 deletions(-) delete mode 100644 include/configs/calimain.h (limited to 'include') diff --git a/include/configs/calimain.h b/include/configs/calimain.h deleted file mode 100644 index e77218466f..0000000000 --- a/include/configs/calimain.h +++ /dev/null @@ -1,272 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011-2014 OMICRON electronics GmbH - * - * Based on da850evm.h. Original Copyrights follow: - * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * Copyright (C) 2007 Sergey Kubushyn - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Board - */ -#define CONFIG_MACH_TYPE MACH_TYPE_CALIMAIN - -/* - * SoC Configuration - */ -#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) -#define CONFIG_SYS_OSCIN_FREQ calimain_get_osc_freq() -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_HW_WATCHDOG -#define CONFIG_SYS_WDTTIMERBASE DAVINCI_TIMER1_BASE -#define CONFIG_SYS_WDT_PERIOD_LOW \ - (60 * CONFIG_SYS_OSCIN_FREQ) /* 60 s heartbeat */ -#define CONFIG_SYS_WDT_PERIOD_HIGH 0x0 -#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) - -/* - * PLL configuration - */ - -#define CONFIG_SYS_DA850_PLL0_PLLM \ - ((calimain_get_osc_freq() == 25000000) ? 23 : 24) -#define CONFIG_SYS_DA850_PLL1_PLLM \ - ((calimain_get_osc_freq() == 25000000) ? 20 : 21) - -/* - * DDR2 memory configuration - */ -#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ - DV_DDR_PHY_EXT_STRBEN | \ - (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ - (1 << DV_DDR_SDCR_DDR2EN_SHIFT) | \ - (1 << DV_DDR_SDCR_DDRDRIVE0_SHIFT) | \ - (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ - (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ - (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \ - (0x3 << DV_DDR_SDCR_CL_SHIFT) | \ - (0x3 << DV_DDR_SDCR_IBANK_SHIFT) | \ - (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) - -/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */ -#define CONFIG_SYS_DA850_DDR2_SDBCR2 0 - -#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ - (16 << DV_DDR_SDTMR1_RFC_SHIFT) | \ - (1 << DV_DDR_SDTMR1_RP_SHIFT) | \ - (1 << DV_DDR_SDTMR1_RCD_SHIFT) | \ - (1 << DV_DDR_SDTMR1_WR_SHIFT) | \ - (5 << DV_DDR_SDTMR1_RAS_SHIFT) | \ - (7 << DV_DDR_SDTMR1_RC_SHIFT) | \ - (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ - (1 << DV_DDR_SDTMR1_WTR_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ - (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ - (2 << DV_DDR_SDTMR2_XP_SHIFT) | \ - (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ - (18 << DV_DDR_SDTMR2_XSNR_SHIFT) | \ - (199 << DV_DDR_SDTMR2_XSRD_SHIFT) | \ - (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \ - (2 << DV_DDR_SDTMR2_CKE_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDRCR 0x000003FF -#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30 - -/* - * Flash memory timing - */ - -#define CONFIG_SYS_DA850_CS2CFG ( \ - DAVINCI_ABCR_WSETUP(2) | \ - DAVINCI_ABCR_WSTROBE(5) | \ - DAVINCI_ABCR_WHOLD(3) | \ - DAVINCI_ABCR_RSETUP(1) | \ - DAVINCI_ABCR_RSTROBE(14) | \ - DAVINCI_ABCR_RHOLD(0) | \ - DAVINCI_ABCR_TA(3) | \ - DAVINCI_ABCR_ASIZE_16BIT) - -/* single 64 MB NOR flash device connected to CS2 and CS3 */ -#define CONFIG_SYS_DA850_CS3CFG CONFIG_SYS_DA850_CS2CFG - -/* - * Memory Info - */ -#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ -#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ -#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ - -#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ - DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ - DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ - DAVINCI_SYSCFG_SUSPSRC_UART2 | \ - DAVINCI_SYSCFG_SUSPSRC_EMAC | \ - DAVINCI_SYSCFG_SUSPSRC_I2C) - -/* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) - -/* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (16 << 20)) - -/* - * Serial Driver info - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ -#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ -#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE -#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ -#define CONFIG_ENV_ADDR \ - (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SECT_SZ * 2) -#define CONFIG_ENV_SIZE (128 << 10) -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE -#define PHYS_FLASH_SIZE (64 << 20) /* Flash size 64MB */ -#define CONFIG_SYS_MAX_FLASH_SECT \ - ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ) + 3) - -/* - * Network & Ethernet Configuration - */ -#ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_NET_RETRY_COUNT 10 -#endif - -/* - * U-Boot general configuration - */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_LOADADDR 0xc0700000 -#define CONFIG_MX_CYCLIC - -/* - * Linux Information - */ -#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_CMDLINE_TAG -#define CONFIG_REVISION_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTCOMMAND "run checkupdate; run checkbutton;" -#define CONFIG_BOOT_RETRY_TIME 60 /* continue boot after 60 s inactivity */ -#define CONFIG_RESET_TO_RETRY - -/* - * Default environment settings - * gpio0 = button, gpio1 = led green, gpio2 = led red - * verify = n ... disable kernel checksum verification for faster booting - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "tftpdir=calimero\0" \ - "flashkernel=tftpboot $loadaddr $tftpdir/uImage; " \ - "erase 0x60800000 +0x400000; " \ - "cp.b $loadaddr 0x60800000 $filesize\0" \ - "flashrootfs=" \ - "tftpboot $loadaddr $tftpdir/rootfs.jffs2; " \ - "erase 0x60c00000 +0x2e00000; " \ - "cp.b $loadaddr 0x60c00000 $filesize\0" \ - "flashuboot=tftpboot $loadaddr $tftpdir/u-boot.bin; " \ - "protect off all; " \ - "erase 0x60000000 +0x80000; " \ - "cp.b $loadaddr 0x60000000 $filesize\0" \ - "flashrlk=tftpboot $loadaddr $tftpdir/uImage-rlk; " \ - "erase 0x60080000 +0x780000; " \ - "cp.b $loadaddr 0x60080000 $filesize\0" \ - "erase_persistent=erase 0x63a00000 +0x600000;\0" \ - "bootnor=setenv bootargs console=ttyS2,115200n8 " \ - "root=/dev/mtdblock3 rw rootfstype=jffs2 " \ - "rootwait ethaddr=$ethaddr; " \ - "gpio c 1; gpio s 2; bootm 0x60800000\0" \ - "bootrlk=gpio s 1; gpio s 2;" \ - "setenv bootargs console=ttyS2,115200n8 " \ - "ethaddr=$ethaddr; bootm 0x60080000\0" \ - "boottftp=setenv bootargs console=ttyS2,115200n8 " \ - "root=/dev/mtdblock3 rw rootfstype=jffs2 " \ - "rootwait ethaddr=$ethaddr; " \ - "tftpboot $loadaddr $tftpdir/uImage;" \ - "gpio c 1; gpio s 2; bootm $loadaddr\0" \ - "checkupdate=if test -n $update_flag; then " \ - "echo Previous update failed - starting RLK; " \ - "run bootrlk; fi; " \ - "if test -n $initial_setup; then " \ - "echo Running initial setup procedure; " \ - "sleep 1; run flashall; fi\0" \ - "product=accessory\0" \ - "serial=XX12345\0" \ - "checknor=" \ - "if gpio i 0; then run bootnor; fi;\0" \ - "checkrlk=" \ - "if gpio i 0; then run bootrlk; fi;\0" \ - "checkbutton=" \ - "run checknor; sleep 1;" \ - "run checknor; sleep 1;" \ - "run checknor; sleep 1;" \ - "run checknor; sleep 1;" \ - "run checknor;" \ - "gpio s 1; gpio s 2;" \ - "echo ---- Release button to boot RLK ----;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk;" \ - "echo ---- Factory reset requested ----;" \ - "gpio c 1;" \ - "setenv factory_reset true;" \ - "saveenv;" \ - "run bootnor;\0" \ - "flashall=run flashrlk;" \ - "run flashkernel;" \ - "run flashrootfs;" \ - "setenv erase_datafs true;" \ - "setenv initial_setup;" \ - "saveenv;" \ - "run bootnor;\0" \ - "verify=n\0" \ - "clearenv=protect off all;" \ - "erase 0x60040000 +0x40000;\0" \ - "altbootcmd=run bootrlk\0" - -#define CONFIG_PREBOOT \ - "echo Version: $ver; " \ - "echo Serial: $serial; " \ - "echo MAC: $ethaddr; " \ - "echo Product: $product; " \ - "gpio c 1; gpio c 2;" - -/* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 -/* initial stack pointer in internal SRAM */ -#define CONFIG_SYS_INIT_SP_ADDR (0x8001ff00) - -#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ - -#ifndef __ASSEMBLY__ -int calimain_get_osc_freq(void); -#endif - -#include - -#endif /* __CONFIG_H */ -- cgit From 7a2b51e36fdbec48f818107f495d8c91f6f5db25 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:14 +0200 Subject: ea20: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski Acked-by: Stefano Babic --- include/configs/ea20.h | 227 ------------------------------------------------- 1 file changed, 227 deletions(-) delete mode 100644 include/configs/ea20.h (limited to 'include') diff --git a/include/configs/ea20.h b/include/configs/ea20.h deleted file mode 100644 index 88f2e17d40..0000000000 --- a/include/configs/ea20.h +++ /dev/null @@ -1,227 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * Based on davinci_dvevm.h. Original Copyrights follow: - * - * Copyright (C) 2007 Sergey Kubushyn - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Board - */ -#define CONFIG_USE_SPIFLASH -#define CONFIG_SYS_USE_NAND -#define CONFIG_DRIVER_TI_EMAC_USE_RMII -#define CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE -#define CONFIG_PREBOOT - -/* - * SoC Configuration - */ -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) -#define CONFIG_SYS_OSCIN_FREQ 24000000 -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SKIP_LOWLEVEL_INIT - -/* - * Memory Info - */ -#define CONFIG_SYS_MALLOC_LEN (0x10000 + 4*1024*1024) /* malloc() len */ -#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ -#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ - -/* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) - -/* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) - -/* - * Serial Driver info - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART0_BASE /* Base address of UART0 */ -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) - -#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE -#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) - -/* - * I2C Configuration - */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 -#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ - -/* - * Network & Ethernet Configuration - */ -#ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_NET_RETRY_COUNT 10 -#endif - -#ifdef CONFIG_USE_SPIFLASH -#define CONFIG_ENV_SIZE (8 << 10) -#define CONFIG_ENV_OFFSET 0x80000 -#define CONFIG_ENV_SECT_SIZE (64 << 10) -#endif - -#if defined(CONFIG_VIDEO) -#define CONFIG_VIDEO_DA8XX -#define CONFIG_SPLASH_SCREEN_ALIGN -#define CONFIG_VIDEO_LOGO -#define CONFIG_VIDEO_BMP_RLE8 -#define CONFIG_VIDEO_BMP_LOGO -#endif - -/* - * U-Boot general configuration - */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_MX_CYCLIC - -/* - * Linux Information - */ -#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS - -#ifdef CONFIG_CMD_BDI -#define CONFIG_CLOCKS -#endif - -/* NAND Setup */ -#ifdef CONFIG_SYS_USE_NAND -#define CONFIG_SYS_NAND_PAGE_2K -#define CONFIG_SYS_NAND_NO_SUBPAGE -#define CONFIG_SYS_NAND_CS 2 -#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE -#undef CONFIG_SYS_NAND_HW_ECC -#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST -#define CONFIG_SYS_NAND_USE_FLASH_BBT -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#endif - -#if !defined(CONFIG_SYS_USE_NAND) && \ - !defined(CONFIG_USE_NOR) && \ - !defined(CONFIG_USE_SPIFLASH) -#define CONFIG_ENV_SIZE (16 << 10) -#endif - -/* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ - GENERATED_GBL_DATA_SIZE) -/* - * Default environment and default scripts - * to update uboot and load kernel - */ - -#define CONFIG_HOSTNAME "ea20" -#define CONFIG_EXTRA_ENV_SETTINGS \ - "as=3\0" \ - "netdev=eth0\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "rfsbargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rfsbpath}\0" \ - "testrfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${testrfspath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw initrd=" \ - "0x${ramdisk_addr_r},4M\0" \ - "mtdids=nand0=davinci_nand.0\0" \ - "serverip=192.168.5.249\0" \ - "ipaddr=192.168.5.248\0" \ - "rootpath=/opt/eldk/arm\0" \ - "splashpos=230,180\0" \ - "testrfspath=/opt/eldk/test_arm\0" \ - "nandargs=setenv bootargs rootfstype=ubifs ro chk_data_crc " \ - "ubi.mtd=${as} root=ubi0:rootfs\0" \ - "nandrwargs=setenv bootargs rootfstype=ubifs rw chk_data_crc " \ - "ubi.mtd=${as} root=ubi0:rootfs\0" \ - "addip_sta=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ - "addip=if test -n ${ipdyn};then run addip_dyn;" \ - "else run addip_sta;fi\0" \ - "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "addtty=setenv bootargs ${bootargs}" \ - " console=${consoledev},${baudrate}n8\0" \ - "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ - "addmem=setenv bootargs ${bootargs} mem=${memory}\0" \ - "consoledev=ttyS0\0" \ - "loadaddr=c0000014\0" \ - "memory=32M\0" \ - "kernel_addr_r=c0700000\0" \ - "hostname=" CONFIG_HOSTNAME "\0" \ - "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ - "ramdisk_file=" CONFIG_HOSTNAME "/image.ext2\0" \ - "flash_self=run ramargs addip addtty addmtd addmisc addmem;" \ - "bootm ${kernel_addr_r}\0" \ - "flash_nfs=run nfsargs addip addtty addmtd addmisc addmem;" \ - "bootm ${kernel_addr}\0" \ - "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ - "run nfsargs addip addtty addmtd addmisc addmem;" \ - "bootm ${kernel_addr_r}\0" \ - "net_rfsb=tftp ${kernel_addr_r} ${bootfile}; " \ - "run rfsbargs addip addtty addmtd addmisc addmem; " \ - "bootm ${kernel_addr_r}\0" \ - "net_testrfs=tftp ${kernel_addr_r} ${bootfile}; " \ - "run testrfsargs addip addtty addmtd addmisc addmem; " \ - "bootm ${kernel_addr_r}\0" \ - "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ - "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ - "nand_nand=ubi part nand0,${as};ubifsmount ubi:rootfs;" \ - "ubifsload ${kernel_addr_r} /boot/uImage;" \ - "ubifsumount; run nandargs addip addtty " \ - "addmtd addmisc addmem;clrlogo;" \ - "bootm ${kernel_addr_r}\0" \ - "nand_nandrw=ubi part nand0,${as};ubifsmount ubi:rootfs;" \ - "ubifsload ${kernel_addr_r} /boot/uImage;" \ - "ubifsumount; run nandrwargs addip addtty " \ - "addmtd addmisc addmem;clrlogo;" \ - "bootm ${kernel_addr_r}\0" \ - "net_nandrw=tftp ${kernel_addr_r} ${bootfile}; run nandrwargs" \ - " addip addtty addmtd addmisc addmem;" \ - "clrlogo;bootm ${kernel_addr_r}\0" \ - "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \ - "load_magic=if sf probe 0;then sf " \ - "read c0000000 0x10000 0x60000;fi\0" \ - "load_nand=ubi part nand0,${as};ubifsmount ubi:rootfs;" \ - "if ubifsload c0000014 /boot/u-boot.bin;" \ - "then mw c0000008 ${filesize};else echo Error reading" \ - " u-boot from nand!;fi\0" \ - "load_net=if sf probe 0;then sf read c0000000 0x10000 " \ - "0x60000;tftp c0000014 ${u-boot};" \ - "mw c0000008 ${filesize};fi\0" \ - "upd=if sf probe 0;then sf erase 10000 60000;" \ - "sf write c0000000 10000 60000;fi\0" \ - "ublupdate=if tftp C0700000 ${ublname};then sf probe 0; " \ - "sf erase 0 10000;" \ - "sf write 0xc0700000 0 ${filesize};fi\0" \ - "ubootupd_net=if run load_net;then echo Updating u-boot;" \ - "if run upd; then echo U-Boot updated;" \ - "else echo Error updating u-boot !;" \ - "echo Board without bootloader !!;" \ - "fi;" \ - "else echo U-Boot not downloaded..exiting;fi\0" \ - "ubootupd_nand=echo run load_magic,run load_nand,run upd;\0" \ - "bootcmd=run net_testrfs\0" - -#include - -#endif /* __CONFIG_H */ -- cgit From 5e92c6856b9297d8ecac9289ec0b3ba4d3d39b6b Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:15 +0200 Subject: eco5pk: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski --- include/configs/eco5pk.h | 45 --------------------------------------------- 1 file changed, 45 deletions(-) delete mode 100644 include/configs/eco5pk.h (limited to 'include') diff --git a/include/configs/eco5pk.h b/include/configs/eco5pk.h deleted file mode 100644 index 3375c5d965..0000000000 --- a/include/configs/eco5pk.h +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2012 8D Technologies inc. - * Based on mt_ventoux.h, original banner below: - * - * Copyright (C) 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Copyright (C) 2009 TechNexion Ltd. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "tam3517-common.h" - -/* Our console port is port3 */ -#undef CONFIG_SYS_NS16550_COM1 - -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 - -#define CONFIG_MACH_TYPE MACH_TYPE_ECO5_PK - -#define CONFIG_BOOTFILE "uImage" - -#define CONFIG_HOSTNAME "eco5pk" - -/* - * Set its own mtdparts, different from common - */ - -/* - * The arithmetic in tam3517.h is wrong for us and the kernel gets overwritten. - */ -#undef CONFIG_ENV_OFFSET_REDUND -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ - CONFIG_SYS_ENV_SECT_SIZE) - -#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ - "install_kernel=if dhcp $bootfile; then nand erase kernel;" \ - "nand write $fileaddr kernel; fi\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ - "serverip=192.168.142.60\0" - -#endif /* __CONFIG_H */ -- cgit From 3b88579c64eeb87886c7d1c47f5ca8536e04285e Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:16 +0200 Subject: ipam390: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski Acked-by: Heiko Schocher --- include/configs/ipam390.h | 237 ---------------------------------------------- 1 file changed, 237 deletions(-) delete mode 100644 include/configs/ipam390.h (limited to 'include') diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h deleted file mode 100644 index e4e8e2ad7a..0000000000 --- a/include/configs/ipam390.h +++ /dev/null @@ -1,237 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. - * Based on: - * U-Boot:include/configs/da850evm.h - * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * Based on davinci_dvevm.h. Original Copyrights follow: - * - * Copyright (C) 2007 Sergey Kubushyn - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Board - */ - -/* - * SoC Configuration - */ -#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) -#define CONFIG_SYS_OSCIN_FREQ 24000000 -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) - -/* - * Memory Info - */ -#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ -#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ -#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ - -/* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) - -/* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 16 * 1024 * 1024) - -#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ - DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ - DAVINCI_SYSCFG_SUSPSRC_UART2 | \ - DAVINCI_SYSCFG_SUSPSRC_UART0 | \ - DAVINCI_SYSCFG_SUSPSRC_EMAC) - -/* - * PLL configuration - */ - -#define CONFIG_SYS_DA850_PLL0_PLLM 24 -#define CONFIG_SYS_DA850_PLL1_PLLM 24 - -/* - * DDR2 memory configuration - */ -#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ - DV_DDR_PHY_EXT_STRBEN | \ - (0x2 << DV_DDR_PHY_RD_LATENCY_SHIFT)) -#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000498 - -#define CONFIG_SYS_DA850_DDR2_SDBCR2 0x00000004 -#define CONFIG_SYS_DA850_DDR2_PBBPR 0x00000020 - -#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ - (13 << DV_DDR_SDTMR1_RFC_SHIFT) | \ - (2 << DV_DDR_SDTMR1_RP_SHIFT) | \ - (2 << DV_DDR_SDTMR1_RCD_SHIFT) | \ - (2 << DV_DDR_SDTMR1_WR_SHIFT) | \ - (5 << DV_DDR_SDTMR1_RAS_SHIFT) | \ - (8 << DV_DDR_SDTMR1_RC_SHIFT) | \ - (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ - (1 << DV_DDR_SDTMR1_WTR_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ - (8 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ - (2 << DV_DDR_SDTMR2_XP_SHIFT) | \ - (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ - (14 << DV_DDR_SDTMR2_XSNR_SHIFT) | \ - (0xc7 << DV_DDR_SDTMR2_XSRD_SHIFT) | \ - (1 << DV_DDR_SDTMR2_RTP_SHIFT) | \ - (2 << DV_DDR_SDTMR2_CKE_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ - (1 << DV_DDR_SDCR_DDR2EN_SHIFT) | \ - (1 << DV_DDR_SDCR_DDRDRIVE0_SHIFT) | \ - (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ - (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ - (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \ - (2 << DV_DDR_SDCR_CL_SHIFT) | \ - (3 << DV_DDR_SDCR_IBANK_SHIFT) | \ - (2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) - -#define CONFIG_SYS_DA850_CS3CFG (DAVINCI_ABCR_WSETUP(1) | \ - DAVINCI_ABCR_WSTROBE(2) | \ - DAVINCI_ABCR_WHOLD(0) | \ - DAVINCI_ABCR_RSETUP(1) | \ - DAVINCI_ABCR_RSTROBE(2) | \ - DAVINCI_ABCR_RHOLD(1) | \ - DAVINCI_ABCR_TA(0) | \ - DAVINCI_ABCR_ASIZE_8BIT) - -/* - * Serial Driver info - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART0_BASE /* Base address of UART0 */ -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) - -/* - * Flash & Environment - */ -#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ -#define CONFIG_ENV_SIZE (128 << 10) -#define CONFIG_SYS_NAND_USE_FLASH_BBT -#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST -#define CONFIG_SYS_NAND_PAGE_2K -#define CONFIG_SYS_NAND_CS 3 -#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE -#define CONFIG_SYS_NAND_MASK_CLE 0x10 -#define CONFIG_SYS_NAND_MASK_ALE 0x8 -#undef CONFIG_SYS_NAND_HW_ECC -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST -#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x120000 -#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ - CONFIG_SYS_NAND_U_BOOT_SIZE - \ - CONFIG_SYS_MALLOC_LEN - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_NAND_ECCPOS { \ - 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \ - 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \ - 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ - 54, 55, 56, 57, 58, 59, 60, 61, 62, 63} -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 10 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_NAND_LOAD - -/* - * Network & Ethernet Configuration - */ -#ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_DRIVER_TI_EMAC_USE_RMII -#define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_NET_RETRY_COUNT 10 -#endif - -/* - * U-Boot general configuration - */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_MX_CYCLIC - -/* - * Linux Information - */ -#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_HWCONFIG /* enable hwconfig */ -#define CONFIG_CMDLINE_TAG -#define CONFIG_REVISION_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_EXTRA_ENV_SETTINGS \ - "defbootargs=setenv bootargs mem=128M console=ttyS0,115200n8 " \ - "root=/dev/mtdblock5 rw noinitrd " \ - "rootfstype=jffs2 noinitrd\0" \ - "hwconfig=dsp:wake=yes\0" \ - "bootcmd=nboot kernel;run defbootargs addmtd;bootm 0xc0700000\0" \ - "bootfile=uImage\0" \ - "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "mtddevname=uboot-env\0" \ - "mtddevnum=0\0" \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "u-boot=/tftpboot/ipam390/u-boot.ais\0" \ - "upd_uboot=tftp c0000000 ${u-boot};nand erase.part u-boot;" \ - "nand write c0000000 20000 ${filesize}\0" \ - "setbootparms=nand read c0100000 200000 400000;" \ - "run defbootargs addmtd;" \ - "spl export atags c0100000;" \ - "nand erase.part bootparms;" \ - "nand write c0000100 180000 20000\0" \ - "\0" - -#ifdef CONFIG_CMD_BDI -#define CONFIG_CLOCKS -#endif - -/* defines for SPL */ -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ - CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_MAX_SIZE 0x20000 -#define CONFIG_SPL_MAX_FOOTPRINT 32768 - -/* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 - -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ - GENERATED_GBL_DATA_SIZE) - -/* add FALCON boot mode */ -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 -#define CONFIG_SYS_SPL_ARGS_ADDR LINUX_BOOT_PARAM_ADDR - -/* GPIO support */ -#define CONFIG_IPAM390_GPIO_BOOTMODE ((16 * 7) + 14) - -#define CONFIG_SHOW_BOOT_PROGRESS -#define CONFIG_IPAM390_GPIO_LED_RED ((16 * 7) + 11) -#define CONFIG_IPAM390_GPIO_LED_GREEN ((16 * 7) + 12) - -#include - -#endif /* __CONFIG_H */ -- cgit From 8c2644ca692278abad232962842a1b8777bb7ade Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:17 +0200 Subject: cm_t3517: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski --- include/configs/cm_t3517.h | 219 --------------------------------------------- 1 file changed, 219 deletions(-) delete mode 100644 include/configs/cm_t3517.h (limited to 'include') diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h deleted file mode 100644 index c876853cd5..0000000000 --- a/include/configs/cm_t3517.h +++ /dev/null @@ -1,219 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 CompuLab, Ltd. - * Author: Igor Grinberg - * - * Configuration settings for the CompuLab CM-T3517 board - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - */ -#define CONFIG_CM_T3517 /* working with CM-T3517 */ - -/* - * This is needed for the DMA stuff. - * Although the default iss 64, we still define it - * to be on the safe side once the default is changed. - */ - -#include /* get chip and board defs */ -#include - -#define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517 - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -/* - * The early kernel mapping on ARM currently only maps from the base of DRAM - * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. - * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, - * so that leaves DRAM base to DRAM base + 0x4000 available. - */ -#define CONFIG_SYS_BOOTMAPSZ 0x4000 - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG -#define CONFIG_SERIAL_TAG - -/* - * Size of malloc() pool - */ -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) - -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -/* - * select serial console configuration - */ -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} - -/* USB */ - -#ifndef CONFIG_USB_MUSB_AM35X -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 -#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 -#endif /* CONFIG_USB_MUSB_AM35X */ - -/* commands to include */ - -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_I2C_EEPROM_BUS 0 -#define CONFIG_I2C_MULTI_BUS - -/* - * Board NAND Info. - */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access nand at */ - /* CS0 */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ - /* devices */ - -/* Environment information */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "baudrate=115200\0" \ - "console=ttyO2,115200n8\0" \ - "netretry=yes\0" \ - "mpurate=auto\0" \ - "vram=12M\0" \ - "dvimode=1024x768MR-16@60\0" \ - "defaultdisplay=dvi\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ - "mmcrootfstype=ext4\0" \ - "nandroot=/dev/mtdblock4 rw\0" \ - "nandrootfstype=ubifs\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "nandargs=setenv bootargs console=${console} " \ - "mpurate=${mpurate} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=${nandroot} " \ - "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "nand read ${loadaddr} 2a0000 400000; " \ - "bootm ${loadaddr}\0" \ - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi" - -/* - * Miscellaneous configurable options - */ -#define CONFIG_TIMESTAMP -#define CONFIG_SYS_AUTOLOAD "no" -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) - -/* - * AM3517 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define CONFIG_SYS_CS0_SIZE (256 << 20) - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - -#define CONFIG_ENV_OFFSET 0x260000 -#define CONFIG_ENV_ADDR 0x260000 - -#if defined(CONFIG_CMD_NET) -#define CONFIG_DRIVER_TI_EMAC_USE_RMII -#define CONFIG_ARP_TIMEOUT 200UL -#define CONFIG_NET_RETRY_COUNT 5 -#endif /* CONFIG_CMD_NET */ - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* Status LED */ -#define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ - -/* Display Configuration */ -#define LCD_BPP LCD_COLOR16 - -#define CONFIG_SPLASH_SCREEN -#define CONFIG_SPLASHIMAGE_GUARD -#define CONFIG_BMP_16BPP -#define CONFIG_SCF0403_LCD - -/* EEPROM */ -#define CONFIG_ENV_EEPROM_IS_ON_I2C -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -#define CONFIG_SYS_EEPROM_SIZE 256 - -#endif /* __CONFIG_H */ -- cgit From 899dd71e9f0cce69c3e975a12c32228ceb9251f3 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:18 +0200 Subject: mt_ventoux: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski Acked-by: Stefano Babic --- include/configs/mt_ventoux.h | 46 -------------------------------------------- 1 file changed, 46 deletions(-) delete mode 100644 include/configs/mt_ventoux.h (limited to 'include') diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h deleted file mode 100644 index e590364441..0000000000 --- a/include/configs/mt_ventoux.h +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * - * Configuration settings for the Teejet mt_ventoux board. - * - * Copyright (C) 2009 TechNexion Ltd. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "tam3517-common.h" - -#undef CONFIG_SYS_MALLOC_LEN -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ - 6 * 1024 * 1024) - -#define CONFIG_MACH_TYPE MACH_TYPE_AM3517_MT_VENTOUX - -#define CONFIG_BOOTFILE "uImage" - -#define CONFIG_HOSTNAME "mt_ventoux" - -/* - * Set its own mtdparts, different from common - */ - -/* - * FPGA - */ -#define CONFIG_SYS_FPGA_PROG_FEEDBACK -#define CONFIG_SYS_FPGA_WAIT 10000 -#define CONFIG_MAX_FPGA_DEVICES 1 -#define CONFIG_FPGA_DELAY() udelay(1) -#define CONFIG_SYS_FPGA_PROG_FEEDBACK - -#define CONFIG_SPLASH_SCREEN -#define CONFIG_VIDEO_BMP_RLE8 - -#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ - "bootcmd=run net_nfs\0" - -#endif /* __CONFIG_H */ -- cgit From 2aa20c43e464b8e5e554b86c51334d789833f254 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:19 +0200 Subject: twister: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski Acked-by: Stefano Babic --- include/configs/twister.h | 34 ---------------------------------- 1 file changed, 34 deletions(-) delete mode 100644 include/configs/twister.h (limited to 'include') diff --git a/include/configs/twister.h b/include/configs/twister.h deleted file mode 100644 index 63930e1aff..0000000000 --- a/include/configs/twister.h +++ /dev/null @@ -1,34 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Copyright (C) 2009 TechNexion Ltd. - * - * Configuration for the Technexion twister board. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "tam3517-common.h" - -#define CONFIG_MACH_TYPE MACH_TYPE_TAM3517 - -#define CONFIG_TAM3517_SW3_SETTINGS -#define CONFIG_XR16L2751 - - -#define CONFIG_BOOTFILE "uImage" - -#define CONFIG_HOSTNAME "twister" - -#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ - "bootcmd=run nandboot\0" - -/* SPL OS boot options */ -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 - -#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) - -#endif /* __CONFIG_H */ -- cgit From d7cc0e4d7999b0b696ec4047420abf34a821ba29 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:20 +0200 Subject: mcx: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski --- include/configs/mcx.h | 294 -------------------------------------------------- 1 file changed, 294 deletions(-) delete mode 100644 include/configs/mcx.h (limited to 'include') diff --git a/include/configs/mcx.h b/include/configs/mcx.h deleted file mode 100644 index 411c27c4a8..0000000000 --- a/include/configs/mcx.h +++ /dev/null @@ -1,294 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Ilya Yanok, Emcraft Systems - * - * Based on omap3_evm_config.h - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - */ - -#define CONFIG_MACH_TYPE MACH_TYPE_MCX - -#include /* get chip and board defs */ -#include - -/* - * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader - * and older u-boot.bin with the new U-Boot SPL. - */ - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG - -/* - * Size of malloc() pool - */ -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ -#define CONFIG_SYS_MALLOC_LEN (1024 << 10) -/* - * DDR related - */ -#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) - -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK - -/* - * select serial console configuration - */ -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} - -/* EHCI */ -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 - -/* commands to include */ - -#define CONFIG_SYS_I2C - -/* RTC */ -#define CONFIG_RTC_DS1337 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 - -/* - * Board NAND Info. - */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access */ - /* nand at CS0 */ - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ - /* NAND devices */ -#define CONFIG_JFFS2_NAND -/* nand device jffs2 lives on */ -#define CONFIG_JFFS2_DEV "nand0" -/* start of jffs2 partition */ -#define CONFIG_JFFS2_PART_OFFSET 0x680000 -#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ - -/* Environment information */ - -#define CONFIG_BOOTFILE "uImage" - -/* Setup MTD for NAND on the SOM */ - -#define CONFIG_HOSTNAME "mcx" -#define CONFIG_EXTRA_ENV_SETTINGS \ - "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \ - "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \ - "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ - "addfb=setenv bootargs ${bootargs} vram=6M " \ - "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \ - "addip_sta=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:" \ - "${netmask}:${hostname}:eth0:off\0" \ - "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ - "addip=if test -n ${ipdyn};then run addip_dyn;" \ - "else run addip_sta;fi\0" \ - "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ - "addtty=setenv bootargs ${bootargs} " \ - "console=${consoledev},${baudrate}\0" \ - "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "baudrate=115200\0" \ - "consoledev=ttyO2\0" \ - "hostname=" CONFIG_HOSTNAME "\0" \ - "loadaddr=0x82000000\0" \ - "load=tftp ${loadaddr} ${u-boot}\0" \ - "load_k=tftp ${loadaddr} ${bootfile}\0" \ - "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ - "loadmlo=tftp ${loadaddr} ${mlo}\0" \ - "mlo=" CONFIG_HOSTNAME "/MLO\0" \ - "mmcargs=root=/dev/mmcblk0p2 rw " \ - "rootfstype=ext3 rootwait\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "run addip addtty addmtd addfb addeth addmisc;" \ - "run loaduimage; " \ - "bootm ${loadaddr}\0" \ - "net_nfs=run load_k; " \ - "run nfsargs; " \ - "run addip addtty addmtd addfb addeth addmisc;" \ - "bootm ${loadaddr}\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \ - "uboot_addr=0x80000\0" \ - "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ - "nand write ${loadaddr} ${uboot_addr} 80000\0" \ - "updatemlo=nandecc hw;nand erase 0 20000;" \ - "nand write ${loadaddr} 0 20000\0" \ - "upd=if run load;then echo Updating u-boot;if run update;" \ - "then echo U-Boot updated;" \ - "else echo Error updating u-boot !;" \ - "echo Board without bootloader !!;" \ - "fi;" \ - "else echo U-Boot not downloaded..exiting;fi\0" \ - "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "nandargs=setenv bootargs ubi.mtd=7 " \ - "root=ubi0:rootfs rootfstype=ubifs\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "ubi part nand0,4;" \ - "ubi readvol ${loadaddr} kernel;" \ - "run addtty addmtd addfb addeth addmisc;" \ - "bootm ${loadaddr}\0" \ - "preboot=ubi part nand0,7;" \ - "ubi readvol ${loadaddr} splash;" \ - "bmp display ${loadaddr};" \ - "gpio set 55\0" \ - "swupdate_args=setenv bootargs root=/dev/ram " \ - "quiet loglevel=1 " \ - "consoleblank=0 ${swupdate_misc}\0" \ - "swupdate=echo Running Sw-Update...;" \ - "if printenv mtdparts;then echo Starting SwUpdate...; " \ - "else mtdparts default;fi; " \ - "ubi part nand0,5;" \ - "ubi readvol 0x82000000 kernel_recovery;" \ - "ubi part nand0,6;" \ - "ubi readvol 0x84000000 fs_recovery;" \ - "run swupdate_args; " \ - "setenv bootargs ${bootargs} " \ - "${mtdparts} " \ - "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ - "omapdss.def_disp=lcd;" \ - "bootm 0x82000000 0x84000000\0" \ - "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \ - "then source 82000000;else run nandboot;fi\0" - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) -/* memtest works on */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ - /* address */ -#define CONFIG_PREBOOT - -/* - * AM3517 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/* - * Physical Memory Map - */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/* - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ - -/* Redundant Environment */ -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_ENV_OFFSET 0x180000 -#define CONFIG_ENV_ADDR 0x180000 -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ - 2 * CONFIG_SYS_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE - -/* Flash banks JFFS2 should use */ -#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ - CONFIG_SYS_MAX_NAND_DEVICE) -#define CONFIG_SYS_JFFS2_MEM_NAND -/* use flash_info[2] */ -#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* Defines for SPL */ - -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC - -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK - -/* move malloc and bss high to prevent clashing with the main image */ -#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 -#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 - -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - -/* NAND boot config */ -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ - 48, 49, 50, 51, 52, 53, 54, 55,\ - 56, 57, 58, 59, 60, 61, 62, 63} -#define CONFIG_SYS_NAND_ECCSIZE 256 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW -#define CONFIG_SPL_NAND_SOFTECC - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE - -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 - -/* - * ethernet support - * - */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_DRIVER_TI_EMAC_USE_RMII -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_NET_RETRY_COUNT 10 -#endif - -#define CONFIG_SPLASH_SCREEN -#define CONFIG_VIDEO_BMP_RLE8 - -#endif /* __CONFIG_H */ -- cgit From 77934fdedfdd8a87d3b96c45b7bd540be60445d6 Mon Sep 17 00:00:00 2001 From: Thomas Fitzsimmons Date: Fri, 17 May 2019 08:17:07 -0400 Subject: dm: arm: bcmstb: Enable driver model MMC support For bcm7445 and bcm7260, this patch enables CONFIG_DM_MMC and updates the bcmstb SDHCI driver to use the new driver model. This allows removal of SDHCI configuration handling from bcmstb.c, and eliminates a board removal compile warning. Signed-off-by: Thomas Fitzsimmons Reviewed-by: Stefan Roese --- include/configs/bcm7260.h | 1 - include/configs/bcm7445.h | 1 - 2 files changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/bcm7260.h b/include/configs/bcm7260.h index a2d7f614ce..967bde54c8 100644 --- a/include/configs/bcm7260.h +++ b/include/configs/bcm7260.h @@ -19,7 +19,6 @@ #include "bcmstb.h" -#define BCMSTB_SDHCI_BASE 0xf0200300 #define BCMSTB_TIMER_LOW 0xf0412008 #define BCMSTB_TIMER_HIGH 0xf041200c #define BCMSTB_TIMER_FREQUENCY 0xf0412020 diff --git a/include/configs/bcm7445.h b/include/configs/bcm7445.h index 6984edde18..3ff4677f0a 100644 --- a/include/configs/bcm7445.h +++ b/include/configs/bcm7445.h @@ -19,7 +19,6 @@ #include "bcmstb.h" -#define BCMSTB_SDHCI_BASE 0xf03e0200 #define BCMSTB_TIMER_LOW 0xf0412008 #define BCMSTB_TIMER_HIGH 0xf041200c #define BCMSTB_TIMER_FREQUENCY 0xf0412020 -- cgit From 005a804d0f3a0f0ace28a097142401ef9778e74c Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 21 May 2019 07:49:58 +0200 Subject: cmd: remove unused `display` command Compiling the display command leads to an error undefined reference to `display_set' No implementation of display_set() exists in U-Boot. Eliminate the `display` command as well as the accompanying files. Signed-off-by: Heinrich Schuchardt Reviewed-by: Simon Glass --- include/led-display.h | 18 ------------------ 1 file changed, 18 deletions(-) delete mode 100644 include/led-display.h (limited to 'include') diff --git a/include/led-display.h b/include/led-display.h deleted file mode 100644 index b21f3b0570..0000000000 --- a/include/led-display.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2005-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2010 - * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. - */ -#ifndef _led_display_h_ -#define _led_display_h_ - -/* Display Commands */ -#define DISPLAY_CLEAR 0x1 /* Clear the display */ -#define DISPLAY_HOME 0x2 /* Set cursor at home position */ - -void display_set(int cmd); -int display_putc(char c); -#endif -- cgit