From 63e75fd7a3808df091eb50786519703c5df76b8e Mon Sep 17 00:00:00 2001 From: Zhao Qiang Date: Fri, 26 Sep 2014 16:25:32 +0800 Subject: qe: add qe support to ls1021aqds add qe support to ls1021aqds Signed-off-by: Zhao Qiang Reviewed-by: York Sun --- include/configs/ls1021aqds.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index d1f6ea7e7b..6b8ee8dada 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -70,6 +70,11 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_HAS_SERDES #define CONFIG_FSL_CAAM /* Enable CAAM */ + +#if !defined(CONFIG_SDCARD) && !defined(CONFIG_NAND) && !defined(CONFIG_SPI) +#define CONFIG_U_QE +#endif + /* * IFC Definitions */ @@ -332,6 +337,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_BOOTDELAY 3 +#define CONFIG_SYS_QE_FW_ADDR 0x67f40000 + #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ "fdt_high=0xcfffffff\0" \ -- cgit From eaa859e7d23172acb68b3096beb083ba2e42d6c3 Mon Sep 17 00:00:00 2001 From: Zhao Qiang Date: Fri, 26 Sep 2014 16:25:33 +0800 Subject: qe: add qe support for ls1021a-twr board Signed-off-by: Zhao Qiang Reviewed-by: York Sun --- include/configs/ls1021atwr.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 3c73af8ac3..96b1547963 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -50,6 +50,10 @@ #define CONFIG_FSL_CAAM /* Enable CAAM */ +#if !defined(CONFIG_SDCARD) && !defined(CONFIG_NAND) && !defined(CONFIG_SPI) +#define CONFIG_U_QE +#endif + /* * IFC Definitions */ @@ -275,6 +279,8 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_QE_FW_ADDR 0x67f40000 + /* * Environment */ -- cgit From c26c80a1a4e2e2e7e4c9806e9123bf027c02f711 Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Tue, 30 Sep 2014 11:22:43 +0530 Subject: drivers: usb: fsl: Move USB Errata checking code Move USB Errata checking code from "arch/powerpc" to architecture independent file "fsl_usb.h" so that errata(s) become independent of the architecture. For each erratum checking function for PPC arch, define a nop function for non PPC arch for successful compilation in either case Signed-off-by: Nikhil Badola Reviewed-by: York Sun --- include/fsl_usb.h | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) (limited to 'include') diff --git a/include/fsl_usb.h b/include/fsl_usb.h index 1a6c9c1636..66f8934588 100644 --- a/include/fsl_usb.h +++ b/include/fsl_usb.h @@ -85,4 +85,70 @@ struct ccsr_usb_phy { #define CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07 #endif +/* USB Erratum Checking code */ +#ifdef CONFIG_PPC +static inline bool has_erratum_a006261(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { + case SVR_P1010: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_P2041: + case SVR_P2040: + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); + case SVR_P3041: + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 1, 1) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); + case SVR_P5010: + case SVR_P5020: + case SVR_P5021: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_T4240: + case SVR_T4160: + case SVR_T4080: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_T1040: + return IS_SVR_REV(svr, 1, 0); + case SVR_T2080: + case SVR_T2081: + return IS_SVR_REV(svr, 1, 0); + case SVR_P5040: + return IS_SVR_REV(svr, 1, 0); + } + + return false; +} + +static inline bool has_erratum_a007075(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { + case SVR_B4860: + case SVR_B4420: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_P1010: + return IS_SVR_REV(svr, 1, 0); + case SVR_P4080: + return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0); + } + return false; +} +#else +static inline bool has_erratum_a006261(void) +{ + return false; +} + +static inline bool has_erratum_a007075(void) +{ + return false; +} + +#endif #endif /*_ASM_FSL_USB_H_ */ -- cgit From f3dff695e155469c2c62edb7f3d571df8b3b20ad Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Fri, 17 Oct 2014 09:12:07 +0530 Subject: drivers : usb: fsl: Implement usb Erratum A007798 workaround Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes Signed-off-by: Nikhil Badola Reviewed-by: York Sun --- include/fsl_usb.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/fsl_usb.h b/include/fsl_usb.h index 66f8934588..e4902aac96 100644 --- a/include/fsl_usb.h +++ b/include/fsl_usb.h @@ -139,6 +139,12 @@ static inline bool has_erratum_a007075(void) } return false; } + +static inline bool has_erratum_a007798(void) +{ + return SVR_SOC_VER(get_svr()) == SVR_T4240 && + IS_SVR_REV(get_svr(), 2, 0); +} #else static inline bool has_erratum_a006261(void) { @@ -150,5 +156,10 @@ static inline bool has_erratum_a007075(void) return false; } +static inline bool has_erratum_a007798(void) +{ + return false; +} + #endif #endif /*_ASM_FSL_USB_H_ */ -- cgit From 3f041f011db6397e4e41faba8433e86fc04e23c2 Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Fri, 17 Oct 2014 11:35:46 +0530 Subject: drivers: usb: fsl: Define USB configs for LS102XA Define USB configs for LS1021XA such as CONFIG_SYS_FSL_USB1_ADDR, CONFIG_USB_MAX_CONTROLLER_COUNT Signed-off-by: Nikhil Badola Reviewed-by: York Sun --- include/usb/ehci-fsl.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h index dd77ad6325..897018bf84 100644 --- a/include/usb/ehci-fsl.h +++ b/include/usb/ehci-fsl.h @@ -163,6 +163,9 @@ #elif defined(CONFIG_MPC512X) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 +#elif defined(CONFIG_LS102XA) +#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_LS102XA_USB1_ADDR +#define CONFIG_SYS_FSL_USB2_ADDR 0 #endif /* -- cgit From 8776cb205e25c4fdba05bd3fb13fe71973cd4c71 Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Fri, 17 Oct 2014 11:37:25 +0530 Subject: ls1: config: Enable USB EHCI Host on LS1021AQDS Enable USB EHCI Host on LS1021AQDS Signed-off-by: Nikhil Badola Reviewed-by: York Sun --- include/configs/ls1021aqds.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'include') diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 6b8ee8dada..8954d9dd44 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -278,6 +278,23 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_ESDHC #define CONFIG_GENERIC_MMC +/* + * USB + */ +#define CONFIG_HAS_FSL_DR_USB + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI + +#ifdef CONFIG_USB_EHCI +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_CMD_EXT2 +#endif +#endif + /* * eTSEC */ -- cgit From 272c5265ed8f4bf1f02f2d2b38828fbf8939cac3 Mon Sep 17 00:00:00 2001 From: Yuan Yao Date: Fri, 17 Oct 2014 15:26:34 +0800 Subject: ls102xa: ifc: nor: fix the write issue when bytes unaligned Add define CONFIG_SYS_WRITE_SWAPPED_DATA. For LS1021AQDS and LS1021QTWR nor flash write should swap the bytes when handle unaligned tail bytes. Because of the ending, if the date bus width is 16-bits and the number of bytes is odd, we should swap the byte when write the last one. Signed-off-by: Yuan Yao Reviewed-by: York Sun --- include/configs/ls1021aqds.h | 1 + include/configs/ls1021atwr.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 8954d9dd44..bb9fbedea5 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -115,6 +115,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS +#define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 96b1547963..34cec6515c 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -99,6 +99,7 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS +#define CONFIG_SYS_WRITE_SWAPPED_DATA /* CPLD */ -- cgit From 5175a2885fbb47e4836dcb8ad0ad2214e9b0b3b5 Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Fri, 17 Oct 2014 15:26:35 +0800 Subject: arm: ls102xa: Add SystemID EEPROM support for LS1021ATWR board SystemID information could be read through I2C1 from EEPROM on LS1021ATWR board. As LS1 is a little-endian processor, getting the version ID by be32_to_cpu() is wrong. Fix it by using e.version directly. This change will be compatible for both ARM and PowerPC. As there is an errata that I2C1 could not work in SD boot, reading EEPROM through I2C1 is disabled too in SD boot. Signed-off-by: Alison Wang Reviewed-by: York Sun --- include/configs/ls1021atwr.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 34cec6515c..a5d29763c9 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -161,6 +161,17 @@ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC +/* EEPROM */ +#ifndef CONFIG_SD_BOOT +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#endif + /* * MMC */ -- cgit