From 815451e0d12e72ea47b0ca2eb4ac610823bfb40c Mon Sep 17 00:00:00 2001 From: DrEagle Date: Wed, 17 Dec 2014 15:02:44 +0100 Subject: kirkwood: sheevaplug: fix style MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Gérald Kerma Reviewed-by: Luka Perkov --- include/configs/sheevaplug.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 21c8bda9f3..3ebc989638 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -51,6 +51,7 @@ #define CONFIG_CMD_NAND #define CONFIG_CMD_PING #define CONFIG_CMD_USB + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros -- cgit From 7f30f4b5b285cb91e1e25b5b61a04beabe8c470b Mon Sep 17 00:00:00 2001 From: DrEagle Date: Wed, 17 Dec 2014 15:02:45 +0100 Subject: kirkwood: sheevaplug: fix multiple defines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Gérald Kerma Reviewed-by: Luka Perkov --- include/configs/sheevaplug.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 3ebc989638..589655ab19 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -142,6 +142,5 @@ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_MTD_PARTITIONS #define CONFIG_CMD_MTDPARTS -#define CONFIG_LZO #endif /* _CONFIG_SHEEVAPLUG_H */ -- cgit From 9a5e0a7d5bd0e1758fcc59db524c1695d0dab7e0 Mon Sep 17 00:00:00 2001 From: DrEagle Date: Wed, 17 Dec 2014 15:02:48 +0100 Subject: kirkwood: sheevaplug: add FDT support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit LIBFDT feature is required to support new kernels. Signed-off-by: Gérald Kerma Reviewed-by: Luka Perkov --- include/configs/sheevaplug.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 589655ab19..84029cb399 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -32,6 +32,11 @@ #define CONFIG_LZMA #define CONFIG_LZO +/* + * Enable device tree support + */ +#define CONFIG_OF_LIBFDT + /* * Miscellaneous configurable options */ -- cgit From e7778ec153e279e451bf7c55c05c76e76b095875 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 19 Jan 2015 11:33:47 +0100 Subject: arm: maxbcm: Enable SPL to include DDR training code into U-Boot This patch adds SPL support to the maxbcm MV78460 based board. Including the fixed DDR configuratrion needed for the DDR training code. And the the serdes PHY init code. Signed-off-by: Stefan Roese Reviewed-by: Luka Perkov --- include/configs/maxbcm.h | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) (limited to 'include') diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 72217bdb57..4e962a3604 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -65,4 +65,51 @@ */ #include "mv-common.h" +/* + * Memory layout while starting into the bin_hdr via the + * BootROM: + * + * 0x4000.4000 - 0x4003.4000 headers space (192KiB) + * 0x4000.4030 bin_hdr start address + * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) + * 0x4007.fffc BootROM stack top + * + * The address space between 0x4007.fffc and 0x400f.fff is not locked in + * L2 cache thus cannot be used. + */ + +/* SPL */ +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x40004030 +#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) + +#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) +#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) + +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) + +#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) +#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LDSCRIPT "arch/arm/mvebu-common/u-boot-spl.lds" + +/* SPL related SPI defines */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ +#define CONFIG_SYS_MVEBU_DDR +#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ + #endif /* _CONFIG_DB_MV7846MP_GP_H */ -- cgit From 2554167cc158001cd1befb93e10829fc534bfada Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 19 Jan 2015 11:33:46 +0100 Subject: arm: db-mv784mp-gp: Enable SPL to include DDR training code into U-Boot This patch adds SPL support to the db-mv784mp-gp eval board. Signed-off-by: Stefan Roese Reviewed-by: Luka Perkov --- include/configs/db-mv784mp-gp.h | 49 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) (limited to 'include') diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index cb03e33b6e..1683a1582f 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -11,6 +11,8 @@ * High Level Configuration Options (easy to change) */ #define CONFIG_ARMADA_XP /* SOC Family Name */ +#define CONFIG_DB_784MP_GP /* Board target name for DDR training */ + #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_BOARDINFO_LATE @@ -65,4 +67,51 @@ */ #include "mv-common.h" +/* + * Memory layout while starting into the bin_hdr via the + * BootROM: + * + * 0x4000.4000 - 0x4003.4000 headers space (192KiB) + * 0x4000.4030 bin_hdr start address + * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) + * 0x4007.fffc BootROM stack top + * + * The address space between 0x4007.fffc and 0x400f.fff is not locked in + * L2 cache thus cannot be used. + */ + +/* SPL */ +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x40004030 +#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) + +#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) +#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) + +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) + +#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) +#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LDSCRIPT "arch/arm/mvebu-common/u-boot-spl.lds" + +/* SPL related SPI defines */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ +#define CONFIG_SYS_MVEBU_DDR +#define CONFIG_SPD_EEPROM 0x4e + #endif /* _CONFIG_DB_MV7846MP_GP_H */ -- cgit From 68102b81e8fb699087ec5757a75676c6c65af3fd Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 19 Jan 2015 11:33:39 +0100 Subject: arm: mvebu: maxbcm: Fix compilation warning and add Spansion SPI NOR support This patch fixes the following compilation warning for maxbcm: Building maxbcm board... text data bss dec hex filename 160075 6596 38240 204911 3206f ./u-boot board/maxbcm/maxbcm.c: In function 'reset_phy': board/maxbcm/maxbcm.c:68:6: warning: unused variable 'reg' [-Wunused-variable] u16 reg; ^ board/maxbcm/maxbcm.c:66:6: warning: unused variable 'devadr' [-Wunused-variable] u16 devadr = CONFIG_PHY_BASE_ADDR; ^ Additionally support Spansion SPI NOR flash is added. With larger SPI device support via the CONFIG_SPI_FLASH_BAR define. Signed-off-by: Stefan Roese Reviewed-by: Luka Perkov --- include/configs/maxbcm.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 4e962a3604..5999d60146 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -43,6 +43,8 @@ #define CONFIG_SF_DEFAULT_SPEED 1000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 #define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_FLASH_BAR /* Environment in SPI NOR flash */ #define CONFIG_ENV_IS_IN_SPI_FLASH -- cgit