From aba27acf6711dce0ef1507f2f9f02a80d70a45da Mon Sep 17 00:00:00 2001 From: Dirk Eibach Date: Wed, 26 Jun 2013 16:04:26 +0200 Subject: powerpc/ppc4xx: Use generic accessor functions for gdsys FPGA A set of accessor functions was added to be able to access not only memory mapped FPGA in a generic way. Thanks to Wolfgang Denk for getting this sorted properly. Signed-off-by: Dirk Eibach Signed-off-by: Stefan Roese --- include/configs/dlvision-10g.h | 6 ++++++ include/configs/io.h | 5 +++++ include/configs/io64.h | 6 ++++++ include/configs/iocon.h | 5 +++++ include/configs/neo.h | 5 +++++ include/gdsys_fpga.h | 43 ++++++++++++++++++++++++++++++++++-------- 6 files changed, 62 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 17391cddc9..d4011a1e8a 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -123,6 +123,12 @@ #define CONFIG_SYS_FPGA_COUNT 2 +#define CONFIG_SYS_FPGA_PTR { \ + (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE, \ + (struct ihs_fpga *)CONFIG_SYS_FPGA1_BASE } + +#define CONFIG_SYS_FPGA_COMMON + #define CONFIG_SYS_LATCH0_RESET 0xffff #define CONFIG_SYS_LATCH0_BOOT 0xffff #define CONFIG_SYS_LATCH1_RESET 0xffcf diff --git a/include/configs/io.h b/include/configs/io.h index 33743e61ac..27d1b0f0a1 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -230,6 +230,11 @@ #define CONFIG_SYS_FPGA_COUNT 1 +#define CONFIG_SYS_FPGA_PTR \ + { (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE } + +#define CONFIG_SYS_FPGA_COMMON + /* Memory Bank 3 (Latches) initialization */ #define CONFIG_SYS_LATCH_BASE 0x7f200000 #define CONFIG_SYS_EBC_PB3AP 0xa2015480 diff --git a/include/configs/io64.h b/include/configs/io64.h index dcd1b82e25..f110b70602 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -498,6 +498,12 @@ #define CONFIG_SYS_FPGA_COUNT 2 +#define CONFIG_SYS_FPGA_PTR { \ + (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE, \ + (struct ihs_fpga *)CONFIG_SYS_FPGA1_BASE } + +#define CONFIG_SYS_FPGA_COMMON + #define CONFIG_SYS_LATCH0_RESET 0xffff #define CONFIG_SYS_LATCH0_BOOT 0xffff #define CONFIG_SYS_LATCH1_RESET 0xffbf diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 32d9050adb..67a7ab9ee3 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -236,6 +236,11 @@ int fpga_gpio_get(int pin); #define CONFIG_SYS_FPGA_COUNT 1 +#define CONFIG_SYS_FPGA_PTR \ + { (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE } + +#define CONFIG_SYS_FPGA_COMMON + /* Memory Bank 3 (Latches) initialization */ #define CONFIG_SYS_LATCH_BASE 0x7f200000 #define CONFIG_SYS_EBC_PB3AP 0x02025080 diff --git a/include/configs/neo.h b/include/configs/neo.h index 5abb8b1a75..91871f718f 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -222,6 +222,11 @@ #define CONFIG_SYS_FPGA_COUNT 1 +#define CONFIG_SYS_FPGA_PTR \ + { (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE } + +#define CONFIG_SYS_FPGA_COMMON + /* Memory Bank 3 (Latches) initialization */ #define CONFIG_SYS_LATCH_BASE 0x7f200000 #define CONFIG_SYS_EBC_PB3AP 0x92015480 diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h index 0a8268cbb5..8b895457bd 100644 --- a/include/gdsys_fpga.h +++ b/include/gdsys_fpga.h @@ -19,6 +19,23 @@ enum { int get_fpga_state(unsigned dev); void print_fpga_state(unsigned dev); +int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data); +int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data); + +extern struct ihs_fpga *fpga_ptr[]; + +#define FPGA_SET_REG(ix, fld, val) \ + fpga_set_reg((ix), \ + &fpga_ptr[ix]->fld, \ + offsetof(struct ihs_fpga, fld), \ + val) + +#define FPGA_GET_REG(ix, fld, val) \ + fpga_get_reg((ix), \ + &fpga_ptr[ix]->fld, \ + offsetof(struct ihs_fpga, fld), \ + val) + struct ihs_gpio { u16 read; u16 clear; @@ -67,6 +84,19 @@ struct ihs_fpga { #endif #ifdef CONFIG_IO64 + +struct ihs_fpga_channel { + u16 status_int; + u16 config_int; + u16 switch_connect_config; + u16 tx_destination; +}; + +struct ihs_fpga_hicb { + u16 status_int; + u16 config_int; +}; + struct ihs_fpga { u16 reflection_low; /* 0x0000 */ u16 versions; /* 0x0002 */ @@ -75,12 +105,9 @@ struct ihs_fpga { u16 reserved_0[5]; /* 0x0008 */ u16 quad_serdes_reset; /* 0x0012 */ u16 reserved_1[502]; /* 0x0014 */ - u16 ch0_status_int; /* 0x0400 */ - u16 ch0_config_int; /* 0x0402 */ - u16 reserved_2[126]; /* 0x0404 */ - u16 ch0_hicb_status_int;/* 0x0500 */ - u16 ch0_hicb_config_int;/* 0x0502 */ - u16 reserved_3[7549]; /* 0x0504 */ + struct ihs_fpga_channel ch[32]; /* 0x0400 */ + struct ihs_fpga_channel hicb_ch[32]; /* 0x0500 */ + u16 reserved_2[7487]; /* 0x0580 */ u16 reflection_high; /* 0x3ffe */ }; #endif @@ -100,7 +127,7 @@ struct ihs_fpga { u16 reflection_high; /* 0x00fe */ struct ihs_osd osd; /* 0x0100 */ u16 reserved_3[889]; /* 0x010e */ - u16 videomem; /* 0x0800 */ + u16 videomem[31736]; /* 0x0800 */ }; #endif @@ -121,7 +148,7 @@ struct ihs_fpga { u16 reserved_4[176]; /* 0x00a0 */ struct ihs_osd osd; /* 0x0200 */ u16 reserved_5[761]; /* 0x020e */ - u16 videomem; /* 0x0800 */ + u16 videomem[31736]; /* 0x0800 */ }; #endif -- cgit From e50e8968d994491a426116c3ed6b3e7e26e45f3a Mon Sep 17 00:00:00 2001 From: Dirk Eibach Date: Thu, 25 Jul 2013 19:28:13 +0200 Subject: powerpc/ppc4xx: Support gdsys multichannel iocon hardware Signed-off-by: Dirk Eibach Signed-off-by: Stefan Roese --- include/configs/iocon.h | 58 +++++++++++++++++++++++++++++++++++++++---------- include/gdsys_fpga.h | 15 +++++++++++-- 2 files changed, 59 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 67a7ab9ee3..9d0d7a10f2 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -63,6 +63,7 @@ * Commands additional to the ones defined in amcc-common.h */ #define CONFIG_CMD_CACHE +#define CONFIG_CMD_FPGAD #undef CONFIG_CMD_EEPROM /* @@ -100,23 +101,53 @@ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_SPEED 400000 + +#define CONFIG_PCA953X /* NXP PCA9554 */ +#define CONFIG_PCA9698 /* NXP PCA9698 */ + /* * Software (bit-bang) I2C driver configuration */ +#define CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F +#define I2C_SOFT_DECLARATIONS2 +#define CONFIG_SYS_I2C_SOFT_SPEED_2 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x7F +#define I2C_SOFT_DECLARATIONS3 +#define CONFIG_SYS_I2C_SOFT_SPEED_3 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE_3 0x7F +#define I2C_SOFT_DECLARATIONS4 +#define CONFIG_SYS_I2C_SOFT_SPEED_4 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE_4 0x7F + +#define CONFIG_SYS_CH7301_I2C {1, 2, 3, 4} #ifndef __ASSEMBLY__ -void fpga_gpio_set(int pin); -void fpga_gpio_clear(int pin); -int fpga_gpio_get(int pin); +void fpga_gpio_set(unsigned int bus, int pin); +void fpga_gpio_clear(unsigned int bus, int pin); +int fpga_gpio_get(unsigned int bus, int pin); #endif #define I2C_ACTIVE { } #define I2C_TRISTATE { } -#define I2C_READ fpga_gpio_get(0x0040) ? 1 : 0 -#define I2C_SDA(bit) if (bit) fpga_gpio_set(0x0040); \ - else fpga_gpio_clear(0x0040) -#define I2C_SCL(bit) if (bit) fpga_gpio_set(0x0020); \ - else fpga_gpio_clear(0x0020) +#define I2C_READ \ + (fpga_gpio_get(I2C_ADAP_HWNR, 0x0040) ? 1 : 0) +#define I2C_SDA(bit) \ + do { \ + if (bit) \ + fpga_gpio_set(I2C_ADAP_HWNR, 0x0040); \ + else \ + fpga_gpio_clear(I2C_ADAP_HWNR, 0x0040); \ + } while (0) +#define I2C_SCL(bit) \ + do { \ + if (bit) \ + fpga_gpio_set(I2C_ADAP_HWNR, 0x0020); \ + else \ + fpga_gpio_clear(I2C_ADAP_HWNR, 0x0020); \ + } while (0) #define I2C_DELAY udelay(25) /* 1/4 I2C clock duration */ /* @@ -236,10 +267,10 @@ int fpga_gpio_get(int pin); #define CONFIG_SYS_FPGA_COUNT 1 -#define CONFIG_SYS_FPGA_PTR \ - { (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE } +#define CONFIG_SYS_MCLINK_MAX 3 -#define CONFIG_SYS_FPGA_COMMON +#define CONFIG_SYS_FPGA_PTR \ + { (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE, NULL, NULL, NULL } /* Memory Bank 3 (Latches) initialization */ #define CONFIG_SYS_LATCH_BASE 0x7f200000 @@ -256,6 +287,9 @@ int fpga_gpio_get(int pin); */ #define CONFIG_SYS_MPC92469AC #define CONFIG_SYS_CH7301 -#define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT +#define CONFIG_SYS_OSD_SCREENS 1 + +#define CONFIG_BITBANGMII /* bit-bang MII PHY management */ +#define CONFIG_BITBANGMII_MULTI #endif /* __CONFIG_H */ diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h index 8b895457bd..f50e0e2733 100644 --- a/include/gdsys_fpga.h +++ b/include/gdsys_fpga.h @@ -123,10 +123,21 @@ struct ihs_fpga { u16 mpc3w_control; /* 0x001a */ u16 reserved_1[19]; /* 0x001c */ u16 videocontrol; /* 0x0042 */ - u16 reserved_2[93]; /* 0x0044 */ + u16 reserved_2[14]; /* 0x0044 */ + u16 mc_int; /* 0x0060 */ + u16 mc_int_en; /* 0x0062 */ + u16 mc_status; /* 0x0064 */ + u16 mc_control; /* 0x0066 */ + u16 mc_tx_data; /* 0x0068 */ + u16 mc_tx_address; /* 0x006a */ + u16 mc_tx_cmd; /* 0x006c */ + u16 mc_res; /* 0x006e */ + u16 mc_rx_cmd_status; /* 0x0070 */ + u16 mc_rx_data; /* 0x0072 */ + u16 reserved_3[69]; /* 0x0074 */ u16 reflection_high; /* 0x00fe */ struct ihs_osd osd; /* 0x0100 */ - u16 reserved_3[889]; /* 0x010e */ + u16 reserved_4[889]; /* 0x010e */ u16 videomem[31736]; /* 0x0800 */ }; #endif -- cgit From 28437154649db9f4445b93f278199e34b0447a57 Mon Sep 17 00:00:00 2001 From: Dirk Eibach Date: Wed, 26 Jun 2013 16:04:31 +0200 Subject: powerpc/ppc4xx: Remove CONFIG_SYS_FLASH_PROTECTION from gdsys boards CONFIG_SYS_FLASH_PROTECTION was active on most gdsys boards by default, while hardware flash protection was not implemented. Hardware support was added recently and we get into trouble because backward compatibility is broken (u-boot can't unprotect the protected flash after a downgrade). So we decided to disable hardware flash protection for all our boards. Signed-off-by: Dirk Eibach Signed-off-by: Stefan Roese --- include/configs/dlvision-10g.h | 3 +-- include/configs/dlvision.h | 3 +-- include/configs/io.h | 3 +-- include/configs/iocon.h | 3 +-- include/configs/neo.h | 3 +-- 5 files changed, 5 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index d4011a1e8a..a03c46295e 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -18,7 +18,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvsion-10g -#define CONFIG_IDENT_STRING " dlvision-10g 0.03" +#define CONFIG_IDENT_STRING " dlvision-10g 0.04" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F @@ -151,7 +151,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index 27471284ac..2f8d6b4c90 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -18,7 +18,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvision -#define CONFIG_IDENT_STRING " dlvision 0.01" +#define CONFIG_IDENT_STRING " dlvision 0.02" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ @@ -109,7 +109,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ diff --git a/include/configs/io.h b/include/configs/io.h index 27d1b0f0a1..79ada68ac7 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -18,7 +18,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io -#define CONFIG_IDENT_STRING " io 0.05" +#define CONFIG_IDENT_STRING " io 0.06" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F @@ -123,7 +123,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 9d0d7a10f2..ec9016a6d1 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -18,7 +18,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME iocon -#define CONFIG_IDENT_STRING " iocon 0.04" +#define CONFIG_IDENT_STRING " iocon 0.05" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F @@ -172,7 +172,6 @@ int fpga_gpio_get(unsigned int bus, int pin); #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ diff --git a/include/configs/neo.h b/include/configs/neo.h index 91871f718f..ccbb1fa9b1 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -19,7 +19,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME neo -#define CONFIG_IDENT_STRING " neo 0.01" +#define CONFIG_IDENT_STRING " neo 0.02" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F @@ -130,7 +130,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protection */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ -- cgit