From bf9012b808515bf1314538e8d423080951d012df Mon Sep 17 00:00:00 2001 From: Álvaro Fernández Rojas Date: Tue, 16 May 2017 18:39:03 +0200 Subject: MIPS: add support for Broadcom MIPS BCM6348 SoC family MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass --- include/configs/bmips_bcm6348.h | 30 ++++++++++++++++++++++++++++++ include/dt-bindings/clock/bcm6348-clock.h | 22 ++++++++++++++++++++++ include/dt-bindings/reset/bcm6348-reset.h | 22 ++++++++++++++++++++++ 3 files changed, 74 insertions(+) create mode 100644 include/configs/bmips_bcm6348.h create mode 100644 include/dt-bindings/clock/bcm6348-clock.h create mode 100644 include/dt-bindings/reset/bcm6348-reset.h (limited to 'include') diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h new file mode 100644 index 0000000000..e9f53d6811 --- /dev/null +++ b/include/configs/bmips_bcm6348.h @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_BMIPS_BCM6348_H +#define __CONFIG_BMIPS_BCM6348_H + +/* CPU */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 128000000 + +/* RAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + +/* U-Boot */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 + +#if defined(CONFIG_BMIPS_BOOT_RAM) +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_INIT_SP_OFFSET 0x2000 +#endif + +#define CONFIG_SYS_FLASH_BASE 0xbfc00000 +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 + +#endif /* __CONFIG_BMIPS_BCM6348_H */ diff --git a/include/dt-bindings/clock/bcm6348-clock.h b/include/dt-bindings/clock/bcm6348-clock.h new file mode 100644 index 0000000000..5af066bb16 --- /dev/null +++ b/include/dt-bindings/clock/bcm6348-clock.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_CLOCK_BCM6348_H +#define __DT_BINDINGS_CLOCK_BCM6348_H + +#define BCM6348_CLK_ADSL 0 +#define BCM6348_CLK_MPI 1 +#define BCM6348_CLK_SDRAM 2 +#define BCM6348_CLK_M2M 3 +#define BCM6348_CLK_ENET 4 +#define BCM6348_CLK_SAR 5 +#define BCM6348_CLK_USBS 6 +#define BCM6348_CLK_USBH 8 +#define BCM6348_CLK_SPI 9 + +#endif /* __DT_BINDINGS_CLOCK_BCM6348_H */ diff --git a/include/dt-bindings/reset/bcm6348-reset.h b/include/dt-bindings/reset/bcm6348-reset.h new file mode 100644 index 0000000000..173937b9ef --- /dev/null +++ b/include/dt-bindings/reset/bcm6348-reset.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_RESET_BCM6348_H +#define __DT_BINDINGS_RESET_BCM6348_H + +#define BCM6348_RST_SPI 0 +#define BCM6348_RST_ENET 2 +#define BCM6348_RST_USBH 3 +#define BCM6348_RST_USBS 4 +#define BCM6348_RST_ADSL 5 +#define BCM6348_RST_DMAMEM 6 +#define BCM6348_RST_SAR 7 +#define BCM6348_RST_ACLC 8 +#define BCM6348_RST_ADSL_MIPS 10 + +#endif /* __DT_BINDINGS_RESET_BCM6348_H */ -- cgit From 5e14ce2f3302651abe7873c81f2bae34937b3a63 Mon Sep 17 00:00:00 2001 From: Álvaro Fernández Rojas Date: Tue, 16 May 2017 18:39:04 +0200 Subject: MIPS: add BMIPS Comtrend CT-5361 board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass --- include/configs/comtrend_ct5361.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/configs/comtrend_ct5361.h (limited to 'include') diff --git a/include/configs/comtrend_ct5361.h b/include/configs/comtrend_ct5361.h new file mode 100644 index 0000000000..099684ddd2 --- /dev/null +++ b/include/configs/comtrend_ct5361.h @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#define CONFIG_REMAKE_ELF + +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP + +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 -- cgit From 23a2168398e1263473d362cc907b591ab8cf2eaf Mon Sep 17 00:00:00 2001 From: Álvaro Fernández Rojas Date: Tue, 16 May 2017 18:42:42 +0200 Subject: MIPS: add support for Broadcom MIPS BCM3380 SoC family MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass --- include/configs/bmips_bcm3380.h | 25 +++++++++++++++++++++++++ include/dt-bindings/clock/bcm3380-clock.h | 23 +++++++++++++++++++++++ include/dt-bindings/reset/bcm3380-reset.h | 16 ++++++++++++++++ 3 files changed, 64 insertions(+) create mode 100644 include/configs/bmips_bcm3380.h create mode 100644 include/dt-bindings/clock/bcm3380-clock.h create mode 100644 include/dt-bindings/reset/bcm3380-reset.h (limited to 'include') diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h new file mode 100644 index 0000000000..0c3f7f5285 --- /dev/null +++ b/include/configs/bmips_bcm3380.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_BMIPS_BCM3380_H +#define __CONFIG_BMIPS_BCM3380_H + +/* CPU */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 166500000 + +/* RAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + +/* U-Boot */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 + +#if defined(CONFIG_BMIPS_BOOT_RAM) +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_INIT_SP_OFFSET 0x2000 +#endif + +#endif /* __CONFIG_BMIPS_BCM3380_H */ diff --git a/include/dt-bindings/clock/bcm3380-clock.h b/include/dt-bindings/clock/bcm3380-clock.h new file mode 100644 index 0000000000..00add2f226 --- /dev/null +++ b/include/dt-bindings/clock/bcm3380-clock.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * Derived from Broadcom GPL Source Code: + * Copyright (C) Broadcom Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_CLOCK_BCM3380_H +#define __DT_BINDINGS_CLOCK_BCM3380_H + +#define BCM3380_CLK0_DDR 0 +#define BCM3380_CLK0_FPM 1 +#define BCM3380_CLK0_CRYPTO 2 +#define BCM3380_CLK0_EPHY 3 +#define BCM3380_CLK0_PCIE 16 +#define BCM3380_CLK0_SPI 17 +#define BCM3380_CLK0_ENET0 18 +#define BCM3380_CLK0_ENET1 19 +#define BCM3380_CLK0_PCM 27 + +#endif /* __DT_BINDINGS_CLOCK_BCM3380_H */ diff --git a/include/dt-bindings/reset/bcm3380-reset.h b/include/dt-bindings/reset/bcm3380-reset.h new file mode 100644 index 0000000000..ddc575d92b --- /dev/null +++ b/include/dt-bindings/reset/bcm3380-reset.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * Derived from Broadcom GPL Source Code: + * Copyright (C) Broadcom Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_RESET_BCM3380_H +#define __DT_BINDINGS_RESET_BCM3380_H + +#define BCM3380_RST0_SPI 0 +#define BCM3380_RST0_PCM 13 + +#endif /* __DT_BINDINGS_RESET_BCM3380_H */ -- cgit From c4203e1d73d8c56d64f9b92299f2f6a4547e4e4a Mon Sep 17 00:00:00 2001 From: Álvaro Fernández Rojas Date: Tue, 16 May 2017 18:42:43 +0200 Subject: MIPS: add BMIPS Netgear CG3100D board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass --- include/configs/netgear_cg3100d.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 include/configs/netgear_cg3100d.h (limited to 'include') diff --git a/include/configs/netgear_cg3100d.h b/include/configs/netgear_cg3100d.h new file mode 100644 index 0000000000..c97d4e57ed --- /dev/null +++ b/include/configs/netgear_cg3100d.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP -- cgit From 07661e7f5080a76e62c2b1a4b103ce23b293fbb6 Mon Sep 17 00:00:00 2001 From: Álvaro Fernández Rojas Date: Tue, 16 May 2017 18:46:58 +0200 Subject: MIPS: add support for Broadcom MIPS BCM6338 SoC family MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass --- include/configs/bmips_bcm6338.h | 30 ++++++++++++++++++++++++++++++ include/dt-bindings/clock/bcm6338-clock.h | 19 +++++++++++++++++++ include/dt-bindings/reset/bcm6338-reset.h | 22 ++++++++++++++++++++++ 3 files changed, 71 insertions(+) create mode 100644 include/configs/bmips_bcm6338.h create mode 100644 include/dt-bindings/clock/bcm6338-clock.h create mode 100644 include/dt-bindings/reset/bcm6338-reset.h (limited to 'include') diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h new file mode 100644 index 0000000000..52d72c87e5 --- /dev/null +++ b/include/configs/bmips_bcm6338.h @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_BMIPS_BCM6338_H +#define __CONFIG_BMIPS_BCM6338_H + +/* CPU */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 120000000 + +/* RAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + +/* U-Boot */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 + +#if defined(CONFIG_BMIPS_BOOT_RAM) +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_INIT_SP_OFFSET 0x2000 +#endif + +#define CONFIG_SYS_FLASH_BASE 0xbfc00000 +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 + +#endif /* __CONFIG_BMIPS_BCM6338_H */ diff --git a/include/dt-bindings/clock/bcm6338-clock.h b/include/dt-bindings/clock/bcm6338-clock.h new file mode 100644 index 0000000000..3439c10062 --- /dev/null +++ b/include/dt-bindings/clock/bcm6338-clock.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_CLOCK_BCM6338_H +#define __DT_BINDINGS_CLOCK_BCM6338_H + +#define BCM6338_CLK_ADSL 0 +#define BCM6338_CLK_MPI 1 +#define BCM6338_CLK_SDRAM 2 +#define BCM6338_CLK_ENET 4 +#define BCM6338_CLK_SAR 5 +#define BCM6338_CLK_SPI 9 + +#endif /* __DT_BINDINGS_CLOCK_BCM6338_H */ diff --git a/include/dt-bindings/reset/bcm6338-reset.h b/include/dt-bindings/reset/bcm6338-reset.h new file mode 100644 index 0000000000..17a5e121e8 --- /dev/null +++ b/include/dt-bindings/reset/bcm6338-reset.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_RESET_BCM6338_H +#define __DT_BINDINGS_RESET_BCM6338_H + +#define BCM6338_RST_SPI 0 +#define BCM6338_RST_ENET 2 +#define BCM6338_RST_USBH 3 +#define BCM6338_RST_USBS 4 +#define BCM6338_RST_ADSL 5 +#define BCM6338_RST_DMAMEM 6 +#define BCM6338_RST_SAR 7 +#define BCM6338_RST_ACLC 8 +#define BCM6338_RST_ADSL_MIPS 10 + +#endif /* __DT_BINDINGS_RESET_BCM6338_H */ -- cgit From 8df378888774862b14e956524c7e4545b2b07411 Mon Sep 17 00:00:00 2001 From: Álvaro Fernández Rojas Date: Tue, 16 May 2017 18:46:59 +0200 Subject: MIPS: add BMIPS Sagem F@ST1704 board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass --- include/configs/sagem_f@st1704.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 include/configs/sagem_f@st1704.h (limited to 'include') diff --git a/include/configs/sagem_f@st1704.h b/include/configs/sagem_f@st1704.h new file mode 100644 index 0000000000..dbc7725796 --- /dev/null +++ b/include/configs/sagem_f@st1704.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP -- cgit From f530eb9e9e2194efb9f5dde2e47c2214aad1c633 Mon Sep 17 00:00:00 2001 From: Álvaro Fernández Rojas Date: Mon, 22 May 2017 20:02:06 +0200 Subject: mips: bmips: extend baud rates support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that the uart driver has been fixed we support more baud rates. Signed-off-by: Álvaro Fernández Rojas --- include/configs/bmips_common.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index d2b05d44c8..38bf7a272b 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -7,6 +7,10 @@ #ifndef __CONFIG_BMIPS_COMMON_H #define __CONFIG_BMIPS_COMMON_H +/* UART */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ + 230400, 500000, 1500000 } + /* RAM */ #define CONFIG_SYS_MEMTEST_START 0xa0000000 #define CONFIG_SYS_MEMTEST_END 0xa2000000 -- cgit