From 58cbf2eff5b9f254cb129b18448ebe04f10a2275 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 3 Feb 2021 22:36:33 +0100 Subject: ARM: imx: Revert "dh_imx6: Switch to full DM-aware" This reverts commit 03a673cf49e ("dh_imx6: Switch to full DM-aware"). According to discussion [1], the patch is known to break the dh_imx6 board, however it made it upstream just before 2021.01-rc4, likely by mistake. Revert this patch to put the board back into working order. Also note that this board has no DM SPL support due to OCRAM size limitations, but that is fine, as SPL DM support is optional. [1] https://lists.denx.de/pipermail/u-boot/2020-June/417986.html Signed-off-by: Marek Vasut Cc: Andreas Geisreiter Cc: Jagan Teki Cc: Ludwig Zenz Cc: Stefano Babic Cc: Tom Rini --- include/configs/dh_imx6.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 4a469af5e6..008a70a7c2 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -52,6 +52,12 @@ /* SATA Configs */ #define CONFIG_LBA48 +/* SPI Flash Configs */ +#if defined(CONFIG_SPL_BUILD) +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH +#endif + /* UART */ #define CONFIG_MXC_UART_BASE UART1_BASE -- cgit From 4e4b1a10367f7394772014f3350701b5d71ae9a6 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 4 Feb 2021 01:17:02 +0100 Subject: ARM: imx6: dh-imx6: Drop the SF hunk in config There is now CONFIG_SPL_DM_SPI{,_FLASH}, however keeping CONFIG_DM_SPI{,_FLASH} enabled in SPL seems to grow the SPL by a couple of bytes: text data bss dec hex filename - 34069 1568 96 35733 8b95 spl/u-boot-spl + 34075 1568 96 35739 8b9b spl/u-boot-spl In either case, the binary is bootable, so remove the part in board config. Signed-off-by: Marek Vasut Cc: Andreas Geisreiter Cc: Jagan Teki Cc: Ludwig Zenz Cc: Stefano Babic Cc: Tom Rini --- include/configs/dh_imx6.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include') diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 008a70a7c2..4a469af5e6 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -52,12 +52,6 @@ /* SATA Configs */ #define CONFIG_LBA48 -/* SPI Flash Configs */ -#if defined(CONFIG_SPL_BUILD) -#undef CONFIG_DM_SPI -#undef CONFIG_DM_SPI_FLASH -#endif - /* UART */ #define CONFIG_MXC_UART_BASE UART1_BASE -- cgit From a7329c5c9f1f0778ec203b9916eaa0feb32bd91a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 4 Feb 2021 19:00:31 +0100 Subject: ARM: imx6: mx6sabre-common: Replace fatload with FS_GENERIC load Replace filesystem specific fatload command with a filesystem agnostic load command, so the board can boot from e.g. ext4 too. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Cc: Ye Li Cc: uboot-imx Reviewed-by: Peng Fan --- include/configs/mx6sabre_common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 93d00a4dc3..735532955f 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -73,11 +73,11 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait rw\0" \ "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run finduuid; " \ "run mmcargs; " \ -- cgit From 3f9a27d80bcb82a14d84abc99d90e2cab8b1dcc1 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 4 Feb 2021 19:00:32 +0100 Subject: ARM: imx6: mx6sabre-common: Search for boot components in /boot too Some root filesystem configurations do not have separate /boot partition, but rather place kernel, DT, scripts into /boot directory. Search the /boot directory for these boot components in case they are not found in /, which is the old behavior. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Cc: Ye Li Cc: uboot-imx Reviewed-by: Peng Fan --- include/configs/mx6sabre_common.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 735532955f..ac579f3338 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -73,11 +73,14 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait rw\0" \ "loadbootscript=" \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script} || " \ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ - "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} || " \ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile} || " \ + "load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run finduuid; " \ "run mmcargs; " \ -- cgit From e5da517c285ad389547cc80f8eadf5687a2d2fa2 Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Tue, 9 Feb 2021 10:38:12 +0200 Subject: ARM: imx8: Add missing FEC ENET quirk for i.MX8/i.MX8X Both NXP SoCs i.MX8 and i.MX8X have ENET gigabit MAC. Define FEC_QUIRK_ENET_MAC for the imx8 platform and remove this definition from configs of boards, based on MX8/MX8X. Signed-off-by: Oleksandr Suvorov Acked-by: Marek Vasut Reviewed-By: Ramon Fried Acked-by: Oliver Graute Reviewed-by: Fabio Estevam --- include/configs/apalis-imx8.h | 1 - include/configs/apalis-imx8x.h | 1 - include/configs/capricorn-common.h | 1 - include/configs/colibri-imx8x.h | 2 -- include/configs/imx8qm_mek.h | 1 - include/configs/imx8qm_rom7720.h | 1 - include/configs/imx8qxp_mek.h | 1 - 7 files changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index b474b2f522..0260eb4019 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -21,7 +21,6 @@ #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* Networking */ -#define FEC_QUIRK_ENET_MAC #define FEC_ENET_ENABLE_TXC_DELAY #define CONFIG_TFTP_TSIZE diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h index db31c210f5..a84b8e684b 100644 --- a/include/configs/apalis-imx8x.h +++ b/include/configs/apalis-imx8x.h @@ -143,7 +143,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x4 #define CONFIG_ETHPRIME "eth0" #define CONFIG_FEC_XCV_TYPE RGMII -#define FEC_QUIRK_ENET_MAC #define PHY_ANEG_TIMEOUT 20000 #endif /* __APALIS_IMX8X_H */ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 7c168f17d5..b310e6c9e5 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -43,7 +43,6 @@ /* ENET Config */ #define CONFIG_FEC_XCV_TYPE RMII -#define FEC_QUIRK_ENET_MAC /* ENET1 connects to base board and MUX with ESAI */ #define CONFIG_FEC_ENET_DEV 1 diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index fc2c191594..59593f6c00 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -22,8 +22,6 @@ #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* Networking */ -#define FEC_QUIRK_ENET_MAC - #define CONFIG_TFTP_TSIZE #define CONFIG_IPADDR 192.168.10.2 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index ff281d3800..99e73a9446 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -173,6 +173,5 @@ /* Networking */ #define CONFIG_FEC_XCV_TYPE RGMII -#define FEC_QUIRK_ENET_MAC #endif /* __IMX8QM_MEK_H */ diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index e5989ebafb..fcbf8eeb34 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -161,7 +161,6 @@ /* Networking */ #define CONFIG_FEC_XCV_TYPE RGMII -#define FEC_QUIRK_ENET_MAC #include #endif /* __IMX8QM_ROM7720_H */ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 51a8eb6760..a7d623a9b9 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -177,7 +177,6 @@ /* Networking */ #define CONFIG_FEC_XCV_TYPE RGMII -#define FEC_QUIRK_ENET_MAC /* Misc configuration */ #define CONFIG_SYS_CBSIZE 2048 -- cgit From 91026456f401794ca1c6da00ee653e7a0833ee2a Mon Sep 17 00:00:00 2001 From: Oleksandr Suvorov Date: Tue, 9 Feb 2021 10:38:13 +0200 Subject: board: toradex: move RGMII delays to PHY side The RGMII link delays can be set on either MAC or PHY side. Set the rgmii-id PHY mode for FEC and remove FEC_ENET_ENABLE_.XC_DELAY setting, so that these definitions aren't used anymore throughout the U-Boot. Signed-off-by: Oleksandr Suvorov Reviewed-by: Fabio Estevam --- include/configs/apalis-imx8.h | 2 -- include/configs/apalis-imx8x.h | 3 --- 2 files changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 0260eb4019..8fe3226cf9 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -21,8 +21,6 @@ #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* Networking */ -#define FEC_ENET_ENABLE_TXC_DELAY - #define CONFIG_TFTP_TSIZE #define CONFIG_IPADDR 192.168.10.2 diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h index a84b8e684b..fdb0da34ec 100644 --- a/include/configs/apalis-imx8x.h +++ b/include/configs/apalis-imx8x.h @@ -25,9 +25,6 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1 -#define FEC_ENET_ENABLE_TXC_DELAY -#define FEC_ENET_ENABLE_RXC_DELAY - #define MEM_LAYOUT_ENV_SETTINGS \ "kernel_addr_r=0x80280000\0" \ "fdt_addr_r=0x83100000\0" \ -- cgit From 5c8db4922d42084fd29b36fcac287fe067d26f31 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 13 Feb 2021 22:49:52 -0300 Subject: mx53loco: Convert to driver model Make the conversion to driver model as it is mandatory. Remove the SATA support for now as the i.MX53 support has not been added yet. Signed-off-by: Fabio Estevam --- include/configs/mx53loco.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include') diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index a0dd33aecd..e5dc9ac1d9 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -30,12 +30,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_NUM 2 -/* Eth Configs */ - -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE FEC_BASE_ADDR -#define CONFIG_FEC_MXC_PHYADDR 0x1F - /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -- cgit From 07fc671d7ea0916b4b63ce94837b3d4ee14bfc60 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 15 Feb 2021 08:58:17 -0300 Subject: mx51evk: Convert to driver model Make the conversion to driver model as it is mandatory. Tested booting the Linux kernel from the SD card. Signed-off-by: Fabio Estevam --- include/configs/mx51evk.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 49f88c27dc..3574d65451 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -51,14 +51,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_NUM 2 -/* - * Eth Configs - */ - -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE FEC_BASE_ADDR -#define CONFIG_FEC_MXC_PHYADDR 0x1F - /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI -- cgit From 5d9b16640187f9caa9a4c5f7ca5e733eef9c4bf4 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Tue, 16 Feb 2021 08:19:52 -0600 Subject: imx: Add 2GB lpddr support for i.MX8MN Beacon EmbeddedWorks devkit. There is a second lpddr configuration with 2GB of RAM, but this requires different RAM timings, so in addition to adding the timing file, a separate defconfig is necessary. Signed-off-by: Adam Ford --- include/configs/imx8mn_beacon.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 7a247cc560..9ce60fd51b 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -126,7 +126,11 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 +#if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR) +#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ +#else #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ +#endif #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR -- cgit From 57ac28720d41628cdb07df8f024489b09c0a77dc Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Sat, 20 Feb 2021 11:50:15 +0100 Subject: Nokia RX-51: Enable usbtty serial console by default MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now when usbtty serial console is fixed in U-Boot enable CONFIG_USB_TTY for Nokia RX-51 board by default. Fix also USB product id as U-Boot ignores CONFIG_USBD_PRODUCTID macro and include U-Boot string into USB product name to indicate usage of U-Boot. CONFIG_CONSOLE_MUX is already used and U-Boot console is available for all in/out devices. Therefore there is no need to have separate commands 'run sercon', 'run usbcon' and 'run vgacon', so remove them. As space for U-Boot is limited to 256kB, enable CONFIG_OPTIMIZE_INLINING and disable some other unused options so CONFIG_USB_TTY can be enabled. Nokia RX-51 does not have easily accessible UART serial console so the only option for easy debugging is to use device's keyboard+screen or this usbtty serial console over USB. Signed-off-by: Pali Rohár Reviewed-by: Lukasz Majewski Acked-by: Pavel Machek --- include/configs/nokia_rx51.h | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 3f2700d8e2..23368de624 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -70,10 +70,12 @@ /* USB device configuration */ #define CONFIG_USB_DEVICE +#define CONFIG_USB_TTY #define CONFIG_USBD_VENDORID 0x0421 -#define CONFIG_USBD_PRODUCTID 0x01c8 +#define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8 +#define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8 #define CONFIG_USBD_MANUFACTURER "Nokia" -#define CONFIG_USBD_PRODUCT_NAME "N900" +#define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)" #define GPIO_SLIDE 71 @@ -108,15 +110,9 @@ int rx51_kp_getc(struct stdio_dev *sdev); /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ "usbtty=cdc_acm\0" \ - "stdin=serial,vga\0" \ - "stdout=serial,vga\0" \ - "stderr=serial,vga\0" \ - "setcon=setenv stdin ${con};" \ - "setenv stdout ${con};" \ - "setenv stderr ${con}\0" \ - "sercon=setenv con serial; run setcon\0" \ - "usbcon=setenv con usbtty; run setcon\0" \ - "vgacon=setenv con vga; run setcon\0" \ + "stdin=usbtty,serial,vga\0" \ + "stdout=usbtty,serial,vga\0" \ + "stderr=usbtty,serial,vga\0" \ "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ "switchmmc=mmc dev ${mmcnum}\0" \ "kernaddr=0x82008000\0" \ @@ -198,9 +194,6 @@ int rx51_kp_getc(struct stdio_dev *sdev); #define CONFIG_POSTBOOTMENU \ "echo;" \ "echo Extra commands:;" \ - "echo run sercon - Use serial port for control.;" \ - "echo run usbcon - Use usbtty for control.;" \ - "echo run vgacon - Use framebuffer/keyboard.;" \ "echo run sdboot - Boot from SD card slot.;" \ "echo run emmcboot - Boot internal eMMC memory.;" \ "echo run attachboot - Boot attached kernel image.;" \ -- cgit From 03bf8436a3a5b19ff4ae23868dd479acc050ff08 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 2 Mar 2021 14:00:21 -0800 Subject: board: gateworks: imx8mm: Add Gateworks Venice board support Add initial support for Gateworks Venice product family based on the i.MX 8M Mini SoC Signed-off-by: Tim Harvey --- include/configs/imx8mm_venice.h | 125 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 125 insertions(+) create mode 100644 include/configs/imx8mm_venice.h (limited to 'include') diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h new file mode 100644 index 0000000000..a406e91c84 --- /dev/null +++ b/include/configs/imx8mm_venice.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 Gateworks Corporation + */ + +#ifndef __IMX8MM_VENICE_H +#define __IMX8MM_VENICE_H + +#include +#include + +#define CONFIG_SPL_MAX_SIZE (148 * 1024) +#define CONFIG_SYS_MONITOR_LEN SZ_512K +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 +#define CONFIG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_STACK 0x920000 +#define CONFIG_SPL_BSS_START_ADDR 0x910000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CONFIG_MALLOC_F_ADDR 0x930000 +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#endif + +#define MEM_LAYOUT_ENV_SETTINGS \ + "fdt_addr_r=0x44000000\0" \ + "kernel_addr_r=0x42000000\0" \ + "ramdisk_addr_r=0x46400000\0" \ + "scriptaddr=0x46000000\0" + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x40480000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Enable Distro Boot */ +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(DHCP, dhcp, na) +#include +#undef CONFIG_ISO_PARTITION +#else +#define BOOTENV +#endif + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + MEM_LAYOUT_ENV_SETTINGS \ + "script=boot.scr\0" \ + "bootm_size=0x10000000\0" \ + "ipaddr=192.168.1.22\0" \ + "serverip=192.168.1.146\0" \ + "dev=2\0" \ + "preboot=gsc wd-disable\0" \ + "console=ttymxc1,115200\0" \ + "update_firmware=" \ + "tftpboot $loadaddr $image && " \ + "setexpr blkcnt $filesize + 0x1ff && " \ + "setexpr blkcnt $blkcnt / 0x200 && " \ + "mmc dev $dev && " \ + "mmc write $loadaddr 0x42 $blkcnt\0" \ + "boot_net=" \ + "tftpboot $kernel_addr_r $image && " \ + "booti $kernel_addr_r - $fdtcontroladdr\0" \ + "update_rootfs=" \ + "tftpboot $loadaddr $image && " \ + "gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \ + "update_all=" \ + "tftpboot $loadaddr $image && " \ + "gzwrite mmc $dev $loadaddr $filesize\0" \ + "erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0" + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN SZ_32M +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +/* SDRAM configuration */ +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ +#define CONFIG_SYS_BOOTM_LEN SZ_256M + +/* UART */ +#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR + +/* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_CBSIZE SZ_2K +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* USDHC */ +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +/* I2C */ +#define CONFIG_SYS_I2C_SPEED 100000 + +/* FEC */ +#define CONFIG_ETHPRIME "eth0" +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 0 +#define FEC_QUIRK_ENET_MAC +#define IMX_FEC_BASE 0x30BE0000 + +#endif -- cgit From b5ee48c099e4036fc0336cf66a0d324b8225d53e Mon Sep 17 00:00:00 2001 From: Stephen Carlson Date: Mon, 8 Feb 2021 11:11:29 +0100 Subject: arm: fsl: common: Improve NXP VID driver PMBus support This patch adds support for more PMBus compatible devices to the NXP drivers for its QorIQ family devices. At runtime, the voltage regulator is queried over I2C, and the required voltage multiplier determined. This change supports the DIRECT and LINEAR PMBus voltage reporting modes. Previously, the driver only supported a few specific devices such as the IR36021 and LTC3882, so this change allows the QorIQ series to be used with a much larger variety of core voltage regulator devices. checkpatch warning "Use if (IS_DEFINED (...))" was ignored to maintain consistency with the existing code. Signed-off-by: Stephen Carlson Signed-off-by: Wasim Khan Tested-by: Wasim Khan [Rebased] Signed-off-by: Priyanka Jain --- include/configs/ls1088aqds.h | 6 ------ include/configs/ls1088ardb.h | 8 +------- 2 files changed, 1 insertion(+), 13 deletions(-) (limited to 'include') diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 0dcf844303..4d04833c50 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -326,12 +326,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_VOL_MONITOR_LTC3882_SET #define CONFIG_VOL_MONITOR_LTC3882_READ -/* PM Bus commands code for LTC3882*/ -#define PMBUS_CMD_PAGE 0x0 -#define PMBUS_CMD_READ_VOUT 0x8B -#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 -#define PMBUS_CMD_VOUT_COMMAND 0x21 - #define PWM_CHANNEL0 0x0 /* diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index f59a9f5574..6f36dd417a 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -203,7 +203,7 @@ #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 -#define I2C_MUX_CH_VOL_MONITOR 0xA +#define I2C_MUX_CH_VOL_MONITOR 0xA /* Voltage monitor on channel 2*/ #define I2C_VOL_MONITOR_ADDR 0x63 #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 @@ -221,12 +221,6 @@ #define CONFIG_VOL_MONITOR_LTC3882_SET #define CONFIG_VOL_MONITOR_LTC3882_READ -/* PM Bus commands code for LTC3882*/ -#define PMBUS_CMD_PAGE 0x0 -#define PMBUS_CMD_READ_VOUT 0x8B -#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 -#define PMBUS_CMD_VOUT_COMMAND 0x21 - #define PWM_CHANNEL0 0x0 /* -- cgit From c8c0170f192e975c85aadb8ebcfb4d1ac3cfc5f2 Mon Sep 17 00:00:00 2001 From: Rajesh Bhagat Date: Mon, 15 Feb 2021 09:46:14 +0100 Subject: configs: fsl: move via specific defines to Kconfig Moves below via specific defines to Kconfig: CONFIG_FSL_VIA Signed-off-by: Rajesh Bhagat [Rebased] Signed-off-by: Priyanka Jain --- include/configs/MPC8541CDS.h | 2 -- include/configs/MPC8548CDS.h | 2 -- include/configs/MPC8555CDS.h | 2 -- 3 files changed, 6 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index b1c8917f21..ea4da6a5fe 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -18,8 +18,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_VIA - #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); #endif diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 0605f70ffc..9f83931bed 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -23,8 +23,6 @@ #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ -#define CONFIG_FSL_VIA - #ifndef __ASSEMBLY__ #include extern unsigned long get_clock_freq(void); diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 88999ef2b8..79e309c95c 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -18,8 +18,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_VIA - #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); #endif -- cgit From fc5af5c9d58b59ab708cdc2bddb62b9404f7cf75 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 25 Feb 2021 17:22:26 +0800 Subject: ppc: qemu: Fix CONFIG_SYS_PCI_MAP_END CONFIG_SYS_PCI_MAP_END currently points to 0xe8000000, which means the upper end of the virtual address mapped to PCI bus address ends at 0xe8000000. But this is wrong as the CCSBAR was already mapped at 0xe0000000 with a 1 MiB size. Fixes: fa08d3951777 ("PPC 85xx: Add qemu-ppce500 machine") Signed-off-by: Bin Meng Reviewed-by: Priyanka Jain --- include/configs/qemu-ppce500.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index ee6ef18224..f13e4ea5cf 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -35,7 +35,7 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); /* Virtual address range for PCI region maps */ #define CONFIG_SYS_PCI_MAP_START 0x80000000 -#define CONFIG_SYS_PCI_MAP_END 0xe8000000 +#define CONFIG_SYS_PCI_MAP_END 0xe0000000 /* Virtual address to a temporary map if we need it (max 128MB) */ #define CONFIG_SYS_TMPVIRT 0xe8000000 -- cgit From c40131acc030ac9b1bf0704306aa18295d44ff2a Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 25 Feb 2021 17:22:32 +0800 Subject: include: Remove extern from addr_map.h Remove the extern of the header because they are useless. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Reviewed-by: Priyanka Jain --- include/addr_map.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/addr_map.h b/include/addr_map.h index d322dd222a..85e737d0f6 100644 --- a/include/addr_map.h +++ b/include/addr_map.h @@ -8,9 +8,9 @@ #include -extern phys_addr_t addrmap_virt_to_phys(void *vaddr); -extern void *addrmap_phys_to_virt(phys_addr_t paddr); -extern void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, - phys_size_t size, int idx); +phys_addr_t addrmap_virt_to_phys(void *vaddr); +void *addrmap_phys_to_virt(phys_addr_t paddr); +void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, + phys_size_t size, int idx); #endif -- cgit From b56156331693856aceb76e6aa3d61e58f7ae8dd4 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 25 Feb 2021 17:22:33 +0800 Subject: lib: addr_map: Move address_map[] type to the header file At present address_map[] is static and its type is unknown to external modules. In preparation to create a command to list its contents, this patch moves its type definition and declaration to the header file. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Reviewed-by: Priyanka Jain --- include/addr_map.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/addr_map.h b/include/addr_map.h index 85e737d0f6..55d3a6a165 100644 --- a/include/addr_map.h +++ b/include/addr_map.h @@ -8,6 +8,14 @@ #include +struct addrmap { + phys_addr_t paddr; + phys_size_t size; + unsigned long vaddr; +}; + +extern struct addrmap address_map[CONFIG_SYS_NUM_ADDR_MAP]; + phys_addr_t addrmap_virt_to_phys(void *vaddr); void *addrmap_phys_to_virt(phys_addr_t paddr); void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, -- cgit From ea309212fe7b0baf02a09cc6c30a80ae13d1b681 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 25 Feb 2021 17:22:35 +0800 Subject: test: cmd: Add a basic test for 'addrmap' command This adds a basic test for the newly introduced 'addrmap' command. Signed-off-by: Bin Meng Reviewed-by: Simon Glass [Rebase] Signed-off-by: Priyanka Jain --- include/test/suites.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/test/suites.h b/include/test/suites.h index 52e8fc8155..f5d8e139ce 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -26,6 +26,8 @@ int cmd_ut_category(const char *name, const char *prefix, struct unit_test *tests, int n_ents, int argc, char *const argv[]); +int do_ut_addrmap(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]); int do_ut_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_bloblist(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); -- cgit From 2e91e8b3327015af4fc8b99bc81d9268a65eb559 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 25 Feb 2021 17:22:39 +0800 Subject: ppc: qemu: Switch over to use DM serial The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch over to use the DM version of the driver by: - drop unnecessary ad-hoc config macros - add get_serial_clock() in the board codes Signed-off-by: Bin Meng Reviewed-by: Simon Glass Reviewed-by: Priyanka Jain --- include/configs/qemu-ppce500.h | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'include') diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index f13e4ea5cf..feac6ef8fa 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -73,16 +73,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) - /* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. -- cgit From 8ee401670a53307e7e0e2754f09e0126bfaa11da Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 25 Feb 2021 17:22:43 +0800 Subject: ppc: qemu: Switch over to use DM ETH and PCI At present the board supports non-DM version PCI and E1000 drivers. Switch over to use DM ETH and PCI by: - Rewrite the PCI address map functions using DM APIs - Enable CONFIG_MISC_INIT_R to do the PCI initialization and address map - Drop unnecessary ad-hoc config macros - Remove board_eth_init() in the board codes Signed-off-by: Bin Meng Reviewed-by: Simon Glass Reviewed-by: Priyanka Jain --- include/configs/qemu-ppce500.h | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'include') diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index feac6ef8fa..b1ee810f01 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_RAMBOOT -#define CONFIG_PCI1 1 /* PCI controller 1 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_ENABLE_36BIT_PHYS @@ -73,17 +71,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ - -#ifdef CONFIG_PCI -#define CONFIG_PCI_INDIRECT_BRIDGE - -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ - #define CONFIG_LBA48 /* -- cgit From 9a39f76c7ac06ba04235b4192c1f4daf5094a924 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 25 Feb 2021 17:22:54 +0800 Subject: ppc: qemu: Enable RTC support via I2C The QEMU ppce500 target integrates a Freescale I2C controller and has a Pericom pt7c4338 RTC connected to it. Enable corresponding DM drivers so that 'date' command is actually useful. Signed-off-by: Bin Meng Reviewed-by: Priyanka Jain --- include/configs/qemu-ppce500.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index b1ee810f01..7c65e64d75 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -73,6 +73,9 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_LBA48 +/* RTC */ +#define CONFIG_RTC_PT7C4338 + /* * Environment */ -- cgit From b516dd5af714dabff5e0b20a280a0f0ec91dcecb Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 25 Feb 2021 17:22:56 +0800 Subject: ppc: qemu: Drop a custom env variable 'fdt_addr_r' Now that we have switched to CONFIG_OF_CONTROL, and we can use the env variable 'fdtcontroladdr' directly instead of creating one that is duplicated. Signed-off-by: Bin Meng Reviewed-by: Priyanka Jain --- include/configs/qemu-ppce500.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 7c65e64d75..b2e1204e0f 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -106,6 +106,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_LOADADDR 1000000 #define CONFIG_BOOTCOMMAND \ - "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0" + "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdtcontroladdr\0" #endif /* __QEMU_PPCE500_H */ -- cgit From 70616a1ed8c7fe22aa19eb674915623bd236926f Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 27 Feb 2021 14:08:35 +0100 Subject: efi_loader: move codepage 437 table Move the Unicode to codepage 437 table to charset.c Signed-off-by: Heinrich Schuchardt --- include/charset.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/charset.h b/include/charset.h index cc650a2ce7..64ba91f791 100644 --- a/include/charset.h +++ b/include/charset.h @@ -13,6 +13,11 @@ #define MAX_UTF8_PER_UTF16 3 +/** + * codepage_437 - Unicode to codepage 437 translation table + */ +extern const u16 codepage_437[128]; + /** * console_read_unicode() - read Unicode code point from console * -- cgit From 73bb90cabcdffcd528d1002a12779779196bf200 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 27 Feb 2021 14:08:36 +0100 Subject: efi_loader: carve out utf_to_cp() Carve out a function to translate a Unicode code point to an 8bit codepage. Provide a unit test for the new function. Signed-off-by: Heinrich Schuchardt --- include/charset.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/charset.h b/include/charset.h index 64ba91f791..52e7d1474e 100644 --- a/include/charset.h +++ b/include/charset.h @@ -275,4 +275,15 @@ u16 *u16_strdup(const void *src); */ uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size); +/** + * utf_to_cp() - translate Unicode code point to 8bit codepage + * + * Codepoints that do not exist in the codepage are rendered as question mark. + * + * @c: pointer to Unicode code point to be translated + * @codepage: Unicode to codepage translation table + * Return: 0 on success, -ENOENT if codepoint cannot be translated + */ +int utf_to_cp(s32 *c, const u16 *codepage); + #endif /* __CHARSET_H_ */ -- cgit From e91789e2f6611c0d7f3510691c154e524e7cfa43 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 27 Feb 2021 14:08:38 +0100 Subject: lib/charset: UTF-8 stream conversion Provide functions to convert an UTF-8 stream to code page 437 or UTF-32. Add unit tests. Signed-off-by: Heinrich Schuchardt --- include/charset.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'include') diff --git a/include/charset.h b/include/charset.h index 52e7d1474e..a911160f19 100644 --- a/include/charset.h +++ b/include/charset.h @@ -286,4 +286,22 @@ uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size); */ int utf_to_cp(s32 *c, const u16 *codepage); +/** + * utf8_to_cp437_stream() - convert UTF-8 stream to codepage 437 + * + * @c: next UTF-8 character to convert + * @buffer: buffer, at least 5 characters + * Return: next codepage 437 character or 0 + */ +int utf8_to_cp437_stream(u8 c, char *buffer); + +/** + * utf8_to_utf32_stream() - convert UTF-8 stream to UTF-32 + * + * @c: next UTF-8 character to convert + * @buffer: buffer, at least 5 characters + * Return: next codepage 437 character or 0 + */ +int utf8_to_utf32_stream(u8 c, char *buffer); + #endif /* __CHARSET_H_ */ -- cgit From 6bf1249a921a47a1ea656ed5d94b2d0ea9c69ff3 Mon Sep 17 00:00:00 2001 From: Siew Chin Lim Date: Mon, 1 Mar 2021 20:04:14 +0800 Subject: configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfig CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to *_defconfig file for both Stratix 10 and Agilex. Signed-off-by: Siew Chin Lim --- include/configs/socfpga_soc64_common.h | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index fdcd7d3e9a..0e54601257 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -79,19 +79,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif /* CONFIG_CADENCE_QSPI */ /* - * Boot arguments passed to the boot command. The value of - * CONFIG_BOOTARGS goes into the environment value "bootargs". - * Do note the value will override also the chosen node in FDT blob. + * Environment variable */ #ifdef CONFIG_FIT #define CONFIG_BOOTFILE "kernel.itb" -#define CONFIG_BOOTCOMMAND "run fatscript; run mmcfitload;run linux_qspi_enable;" \ - "run mmcfitboot" #else #define CONFIG_BOOTFILE "Image" -#define CONFIG_BOOTCOMMAND "run fatscript; run mmcload;run linux_qspi_enable;" \ - "run mmcboot" #endif #define CONFIG_EXTRA_ENV_SETTINGS \ -- cgit From 9773ebcfbca23c7d6fe1dc202913b005bc23cc89 Mon Sep 17 00:00:00 2001 From: Dalon Westergreen Date: Mon, 1 Mar 2021 20:04:16 +0800 Subject: Makefile: socfpga: Add target to generate hex output for combined spl and dtb Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex" is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to generate the final configuration bitstream for Intel SOCFPGA SOC64 devices. Signed-off-by: Dalon Westergreen Signed-off-by: Siew Chin Lim --- include/configs/socfpga_soc64_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 0e54601257..1cfa190047 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -194,7 +194,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB) * */ -#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex" +#define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ -- cgit From 266637db88e37686b160722e183571567c61ad1a Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 10 Feb 2021 15:22:13 +0100 Subject: configs: meson64: add fdtoverlay_addr_r In order to support loading FTD Overlays when booting with the pxe command (or extlinux.conf), supported with [1], add the missing fdtoverlay_addr_r used to load the overlay before applying it to the FDT loaded at fdt_addr_r. [1] https://patchwork.ozlabs.org/project/uboot/patch/20210120085453.2783678-1-narmstrong@baylibre.com/ Signed-off-by: Neil Armstrong --- include/configs/meson64.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 52cc01f73d..7e97f89052 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -80,6 +80,7 @@ "scriptaddr=0x08000000\0" \ "kernel_addr_r=0x08080000\0" \ "pxefile_addr_r=0x01080000\0" \ + "fdtoverlay_addr_r=0x01000000\0" \ "ramdisk_addr_r=0x13000000\0" \ "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ BOOTENV -- cgit From e9470fcd278dd85887f7671e5561351a860bb3d5 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 1 Mar 2021 19:40:56 +0100 Subject: configs: stm32mp15: move bootdelay configuration in defconfig The STM32MP15 boards have no reason to configure bootdelay in stm32mp1.h as it is already done with CONFIG_BOOTDELAY (default = 2) and in include/env_default.h. This patch allows configuration for customers which reuse stm32mp1.h and reduce the size of the default environment. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- include/configs/stm32mp1.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 36e400453e..db2117a3d7 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -160,7 +160,6 @@ * and the ramdisk at the end. */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "bootdelay=1\0" \ "kernel_addr_r=0xc2000000\0" \ "fdt_addr_r=0xc4000000\0" \ "scriptaddr=0xc4100000\0" \ -- cgit From a69c48959b7adb0df770c8733df73e42b5376d66 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Fri, 5 Mar 2021 20:48:50 -0600 Subject: ARM: da850-evm: Fix boot issues from missing SPL_PAD_TO In a previous attempt to unify config options and remove items from the whitelist file, SPL items were moved into a section enabled with CONFIG_SPL_BUILD. Unfortunately, SPL_PAD_TO is referenced at the head Makefile and uses this define to create padding of the output file. When it was moved to CONFIG_SPL_BUILD, it caused boot errors with devices that are not booting from NOR. Fix the boot issues by moving SPL_PAD_TO out so it's always. Fixes: 7bb33e4684aa ("ARM: da850-evm: Unify config options with Kconfig") Signed-off-by: Adam Ford --- include/configs/da850evm.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 0f41748093..883cbc95d2 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -215,6 +215,10 @@ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#ifndef CONFIG_MTD_NOR_FLASH +#define CONFIG_SPL_PAD_TO 32768 +#endif + #ifdef CONFIG_SPL_BUILD /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ @@ -222,7 +226,7 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 #define CONFIG_SPL_MAX_FOOTPRINT 32768 -#define CONFIG_SPL_PAD_TO 32768 + #endif /* Load U-Boot Image From MMC */ -- cgit From 003d10ba6412bb9d888d951efaaf5de7133db89c Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Tue, 9 Mar 2021 23:32:44 +0530 Subject: include: configs: am65x_evm: Optimize size of SPL BSS Current BSS allocation of SPL is as below: $ size spl/u-boot-spl text data bss dec hex filename 132369 7852 1496 141717 22995 spl/u-boot-spl But 20KB is allocated currently for BSS. Reduce it to 3KB and save some space for stack. Signed-off-by: Lokesh Vutla --- include/configs/am65x_evm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index b39a5b4ca4..76d73086fb 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -30,7 +30,7 @@ * our memory footprint. The less we use for BSS the more we have available * for everything else. */ -#define CONFIG_SPL_BSS_MAX_SIZE 0x5000 +#define CONFIG_SPL_BSS_MAX_SIZE 0xc00 /* * Link BSS to be within SPL in a dedicated region located near the top of * the MCU SRAM, this way making it available also before relocation. Note -- cgit