From a4f7d098319a6521588d32ec21ac143c73b0899d Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Wed, 11 Feb 2015 12:35:46 +0100 Subject: pmic: fix missing SWITCH_SIZE Applying ccbb18713b279f1326479cc10664d247206e9e76, the define disappeared. Fix it. Signed-off-by: Stefano Babic --- include/power/pfuze100_pmic.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h index d304658b9a..07199b4f89 100644 --- a/include/power/pfuze100_pmic.h +++ b/include/power/pfuze100_pmic.h @@ -232,5 +232,7 @@ enum { #define APS_PFM 0xc #define PWM_PFM 0xd +#define SWITCH_SIZE 0x7 + int power_pfuze100_init(unsigned char bus); #endif -- cgit From fb2589b3307bcbb1c763b2039a50b5e8198af048 Mon Sep 17 00:00:00 2001 From: Christian Gmeiner Date: Wed, 11 Feb 2015 15:20:25 +0100 Subject: ot1200: add eeprom command to non-SPL build Signed-off-by: Christian Gmeiner Acked-by: Stefano Babic --- include/configs/ot1200.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index c061e93534..3c60b4f12b 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -131,6 +131,16 @@ #define CONFIG_PHYLIB #define CONFIG_PHY_SMSC +#ifndef CONFIG_SPL +#define CONFIG_CMD_EEPROM +#define CONFIG_ENV_EEPROM_IS_ON_I2C +#define CONFIG_SYS_I2C_EEPROM_BUS 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#define CONFIG_SYS_I2C_MULTI_EEPROMS +#endif + /* Miscellaneous commands */ #define CONFIG_CMD_BMODE #define CONFIG_CMD_SETEXPR -- cgit From c82009058bd9d3fd9774cab36e9d89434f9563f4 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 12 Feb 2015 09:36:28 +0800 Subject: imx:mx6slevk add pmic and i2c configuration Add pmic and i2c configuration in board header file. Signed-off-by: Peng Fan --- include/configs/mx6slevk.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index c567d9dbb6..122141846e 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -48,6 +48,18 @@ #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII -- cgit From f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Tue, 17 Feb 2015 10:42:43 -0200 Subject: mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V This adds support to switch to 1.8V in case CMD11 succeeds. Signed-off-by: Otavio Salvador Reviewed-by: Marek Vasut --- include/fsl_esdhc.h | 2 ++ include/mmc.h | 1 + 2 files changed, 3 insertions(+) (limited to 'include') diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index c1b6648591..e3d658131d 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -154,6 +154,8 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000 +#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */ + struct fsl_esdhc_cfg { u32 esdhc_base; u32 sdhc_clk; diff --git a/include/mmc.h b/include/mmc.h index 56d97bbdcf..e4b071e50f 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -88,6 +88,7 @@ #define SD_CMD_SEND_RELATIVE_ADDR 3 #define SD_CMD_SWITCH_FUNC 6 #define SD_CMD_SEND_IF_COND 8 +#define SD_CMD_SWITCH_UHS18V 11 #define SD_CMD_APP_SET_BUS_WIDTH 6 #define SD_CMD_ERASE_WR_BLK_START 32 -- cgit From 4579dc37c3cce36d9521c26c6e82881393ec769e Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Tue, 17 Feb 2015 10:42:46 -0200 Subject: warp: Add initial WaRP Board support The WaRP Board is a Wearable Reference Plaform. The board features: - Freescale i.MX6 SoloLite processor with 512MB of RAM - Freescale FXOS8700CQ 6-axis Xtrinsic sensor - Freescale Kinetis KL16 MCU - Freescale Xtrinsic MMA955xL intelligent motion sensing platform The board implements a hybrid architecture to address the evolving needs of the wearables market. The platform consists of a main board and an example daughtercard with the ability to add additional daughtercards for different usage models. For more information about the project, visit: http://www.warpboard.org/ Signed-off-by: Otavio Salvador Reviewed-by: Marek Vasut Acked-by: Stefano Babic --- include/configs/warp.h | 198 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 198 insertions(+) create mode 100644 include/configs/warp.h (limited to 'include') diff --git a/include/configs/warp.h b/include/configs/warp.h new file mode 100644 index 0000000000..82036e497f --- /dev/null +++ b/include/configs/warp.h @@ -0,0 +1,198 @@ +/* + * Copyright (C) 2014 O.S. Systems Software LTDA. + * Copyright (C) 2014 Kynetics LLC. + * Copyright (C) 2014 Revolution Robotics, Inc. + * + * Author: Otavio Salvador + * + * Configuration settings for the WaRP Board + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include +#include +#include "mx6_common.h" + +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_SYS_GENERIC_BOARD + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_MXC_GPIO + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +/* Command definition */ +#include +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_LOADADDR 0x82000000 +#define CONFIG_SYS_TEXT_BASE 0x87800000 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 + +/* Watchdog */ +#define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_256M) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE SZ_128K + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define PHYS_SDRAM_SIZE SZ_512M + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_ENV_OFFSET (6 * SZ_64K) +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +/* VDD voltage 1.65 - 1.95 */ +#define CONFIG_SYS_SD_VOLTAGE 0x00000080 + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=zImage\0" \ + "console=ttymxc0\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_file=imx6sl-warp.dtb\0" \ + "fdt_addr=0x88000000\0" \ + "initrd_addr=0x83800000\0" \ + "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ + "mmcdev=0\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev};" \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else run netboot; fi" + +#endif /* __CONFIG_H */ -- cgit From bcc5ea24c4b48c4bea6a02b179c4a2bac8377bdc Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 21 Feb 2015 17:22:49 -0200 Subject: mc34704: Add the definition of ONOFFA bit ONOFFA is the bit 3 of the GENERAL2 register. Add its definition. Signed-off-by: Fabio Estevam --- include/mc34704.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/mc34704.h b/include/mc34704.h index 53716e0398..482d51ab2f 100644 --- a/include/mc34704.h +++ b/include/mc34704.h @@ -40,6 +40,7 @@ enum { /* GENERAL2 register fields */ #define ONOFFE (1 << 0) #define ONOFFD (1 << 1) +#define ONOFFA (1 << 3) #define ALLOFF (1 << 4) #endif /* __MC34704_H__ */ -- cgit From 6628aa57e1b61e9b1b829667269fd143c64e5ba2 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Thu, 26 Feb 2015 19:50:02 +0100 Subject: board: tbs2910: Enable USB Mass Storage support Add USB Mass Storage support. This is useful for flashing the on-board eMMC. Signed-off-by: Soeren Moch Reviewed-by: Fabio Estevam --- include/configs/tbs2910.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include') diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index c097b98575..7089378c96 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -165,6 +165,19 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB_MASS_STORAGE +#ifdef CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 0 +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "TBS" +#endif /* CONFIG_CMD_USB_MASS_STORAGE */ #define CONFIG_USB_KEYBOARD #ifdef CONFIG_USB_KEYBOARD #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE -- cgit From ad8aae82b20ac6addc9683321d38e3c9fb028d52 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 26 Feb 2015 16:58:55 -0300 Subject: mx6sabre: Enable User Mass Storage User Mass Storage is very useful for flashing the on-board eMMC. Add support for it. Signed-off-by: Fabio Estevam Acked-by: Otavio Salvador --- include/configs/mx6sabre_common.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 4aa8101524..c3f1b35830 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -276,4 +276,18 @@ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "FSL" + #endif /* __MX6QSABRE_COMMON_CONFIG_H */ -- cgit From b5cd10b911f632f74e1211ef786989781d2a1ca1 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 26 Feb 2015 16:58:56 -0300 Subject: mx6sabre: Select CMD_EXT4 options Add EXT4 support. Signed-off-by: Fabio Estevam Acked-by: Otavio Salvador --- include/configs/mx6sabre_common.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index c3f1b35830..f0e37f0ca6 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -53,6 +53,8 @@ #define CONFIG_GENERIC_MMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION -- cgit From 0200020bc2b8192c31dc57c600865267f51bface Mon Sep 17 00:00:00 2001 From: Raul Cardenas Date: Fri, 27 Feb 2015 11:22:06 -0600 Subject: imx6: Added DEK blob generator command Freescale's SEC block has built-in Data Encryption Key(DEK) Blob Protocol which provides a method for protecting a DEK for non-secure memory storage. SEC block protects data in a data structure called a Secret Key Blob, which provides both confidentiality and integrity protection. Every time the blob encapsulation is executed, a AES-256 key is randomly generated to encrypt the DEK. This key is encrypted with the OTP Secret key from SoC. The resulting blob consists of the encrypted AES-256 key, the encrypted DEK, and a 16-bit MAC. During decapsulation, the reverse process is performed to get back the original DEK. A caveat to the blob decapsulation process, is that the DEK is decrypted in secure-memory and can only be read by FSL SEC HW. The DEK is used to decrypt data during encrypted boot. Commands added -------------- dek_blob - encapsulating DEK as a cryptgraphic blob Commands Syntax --------------- dek_blob src dst len Encapsulate and create blob of a len-bits DEK at address src and store the result at address dst. Signed-off-by: Raul Cardenas Signed-off-by: Nitin Garg Signed-off-by: Ulises Cardenas Signed-off-by: Ulises Cardenas-B45798 --- include/fsl_sec.h | 78 ++++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 75 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/fsl_sec.h b/include/fsl_sec.h index b6e6f04a34..dbfae68ef4 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -135,7 +135,7 @@ typedef struct ccsr_sec { #define CONFIG_JRSTARTR_JR0 0x00000001 struct jr_regs { -#ifdef CONFIG_SYS_FSL_SEC_LE +#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6) u32 irba_l; u32 irba_h; #else @@ -148,7 +148,7 @@ struct jr_regs { u32 irsa; u32 rsvd3; u32 irja; -#ifdef CONFIG_SYS_FSL_SEC_LE +#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6) u32 orba_l; u32 orba_h; #else @@ -180,7 +180,7 @@ struct jr_regs { * related information */ struct sg_entry { -#ifdef CONFIG_SYS_FSL_SEC_LE +#ifdef defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6) uint32_t addr_lo; /* Memory Address - lo */ uint16_t addr_hi; /* Memory Address of start of buffer - hi */ uint16_t reserved_zero; @@ -201,7 +201,79 @@ struct sg_entry { #define SG_ENTRY_OFFSET_SHIFT 0 }; +#ifdef CONFIG_MX6 +/* CAAM Job Ring 0 Registers */ +/* Secure Memory Partition Owner register */ +#define SMCSJR_PO (3 << 6) +/* JR Allocation Error */ +#define SMCSJR_AERR (3 << 12) +/* Secure memory partition 0 page 0 owner register */ +#define CAAM_SMPO_0 CONFIG_SYS_FSL_SEC_ADDR + 0x1FBC +/* Secure memory command register */ +#define CAAM_SMCJR0 CONFIG_SYS_FSL_SEC_ADDR + 0x10f4 +/* Secure memory command status register */ +#define CAAM_SMCSJR0 CONFIG_SYS_FSL_SEC_ADDR + 0x10fc +/* Secure memory access permissions register */ +#define CAAM_SMAPJR0(y) (CONFIG_SYS_FSL_SEC_ADDR + 0x1104 + y*16) +/* Secure memory access group 2 register */ +#define CAAM_SMAG2JR0(y) (CONFIG_SYS_FSL_SEC_ADDR + 0x1108 + y*16) +/* Secure memory access group 1 register */ +#define CAAM_SMAG1JR0(y) (CONFIG_SYS_FSL_SEC_ADDR + 0x110C + y*16) + +/* Commands and macros for secure memory */ +#define CMD_PAGE_ALLOC 0x1 +#define CMD_PAGE_DEALLOC 0x2 +#define CMD_PART_DEALLOC 0x3 +#define CMD_INQUIRY 0x5 +#define CMD_COMPLETE (3 << 14) +#define PAGE_AVAILABLE 0 +#define PAGE_OWNED (3 << 6) +#define PAGE(x) (x << 16) +#define PARTITION(x) (x << 8) +#define PARTITION_OWNER(x) (0x3 << (x*2)) + +/* Address of secure 4kbyte pages */ +#define SEC_MEM_PAGE0 CAAM_ARB_BASE_ADDR +#define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000) +#define SEC_MEM_PAGE2 (CAAM_ARB_BASE_ADDR + 0x2000) +#define SEC_MEM_PAGE3 (CAAM_ARB_BASE_ADDR + 0x3000) + +#define JR_MID 2 /* Matches ROM configuration */ +#define KS_G1 (1 << JR_MID) /* CAAM only */ +#define PERM 0x0000B008 /* Clear on release, lock SMAP + * lock SMAG group 1 Blob */ + +#define BLOB_SIZE(x) (x + 32 + 16) /* Blob buffer size */ + +/* HAB WRAPPED KEY header */ +#define WRP_HDR_SIZE 0x08 +#define HDR_TAG 0x81 +#define HDR_PAR 0x41 +/* HAB WRAPPED KEY Data */ +#define HAB_MOD 0x66 +#define HAB_ALG 0x55 +#define HAB_FLG 0x00 + +/* Partition and Page IDs */ +#define PARTITION_1 1 +#define PAGE_1 1 + +#define ERROR_IN_PAGE_ALLOC 1 +#define ECONSTRJDESC -1 + +#endif + int sec_init(void); + +/* blob_dek: + * Encapsulates the src in a secure blob and stores it dst + * @src: reference to the plaintext + * @dst: reference to the output adrress + * @len: size in bytes of src + * @return: 0 on success, error otherwise + */ +int blob_dek(const u8 *src, u8 *dst, u8 len); + #endif #endif /* __FSL_SEC_H */ -- cgit From 09ac7b5961396ffb8644e180180b33008e0b6b35 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 Feb 2015 15:16:42 -0300 Subject: warp: Add USB Mass Storage support With UMS support we are able to flash the eMMC from U-boot, which is very convenient. Add UMS support to make the eMMC flashing process easier. Signed-off-by: Fabio Estevam Acked-by: Otavio Salvador --- include/configs/warp.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'include') diff --git a/include/configs/warp.h b/include/configs/warp.h index 82036e497f..22acdcaf25 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -120,6 +120,32 @@ #define CONFIG_CMD_CACHE #endif +/* USB Configs */ +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG2 port enabled */ +#endif + +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "FSL" + #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ -- cgit From b16c37e46c1993b7d789aa7a1840250369d6944c Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 Feb 2015 15:16:43 -0300 Subject: warp: Select BOUNCE_BUFFER and CMD_EXT options Add EXT2/EXT4 and BOUNCE_BUFFER support. Signed-off-by: Fabio Estevam Acked-by: Otavio Salvador --- include/configs/warp.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/warp.h b/include/configs/warp.h index 22acdcaf25..bcdd1125f9 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -46,6 +46,10 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION -- cgit From 32df39c741788e8637cffe6633d73594b26d70fb Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Mon, 2 Mar 2015 10:12:13 +0100 Subject: mx5: fix get_reset_cause commit d9f43c8f5c1d7ed27c99a06be85a4bb64b2c73fb sets get_reset_cause() as static, but this conflicts with mx5 where its prototype is in sys_proto.h. Drop it from sys_proto.h and drop print_cpuinfo from mx53_loco, factorizing the call for this board. Signed-off-by: Stefano Babic CC: Jason Liu --- include/configs/mx53loco.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 42bc3c869f..8d8b93cca5 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -24,6 +24,8 @@ #define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_CPUINFO + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -- cgit