From 36ea16f6a066ccb046e91ebce4f326b69f4c0569 Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Mon, 2 Jun 2008 14:57:41 +0200
Subject: ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1

This patch removes all SDRAM related defines from the PPC4xx headers
ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
the same SDRAM controller as 440 systems do (like 405EX and 440SP).

It also introduces new defines for the equipped SDRAM controller based on
which PPC variant is used. There new defines are:

used on 405GR/CR/EP and some Xilinx Virtex boards.

used on 440GP/GX/EP/GR.

used on 440EPx/GRx.

used on 405EX/r/440SP/SPe/460EX/GT.

Signed-off-by: Stefan Roese <sr@denx.de>
---
 include/ppc4xx.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

(limited to 'include/ppc4xx.h')

diff --git a/include/ppc4xx.h b/include/ppc4xx.h
index 4a6eb86f41..0a8479f262 100644
--- a/include/ppc4xx.h
+++ b/include/ppc4xx.h
@@ -22,12 +22,37 @@
 #ifndef	__PPC4XX_H__
 #define __PPC4XX_H__
 
+/*
+ * Configure which SDRAM/DDR/DDR2 controller is equipped
+ */
+#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_405EP) || \
+	defined(CONFIG_AP1000) || defined(CONFIG_ML2)
+#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM	/* IBM SDRAM controller */
+#endif
+
+#if defined(CONFIG_440GP) || defined(CONFIG_440GX) || \
+    defined(CONFIG_440EP) || defined(CONFIG_440GR)
+#define CONFIG_SDRAM_PPC4xx_IBM_DDR	/* IBM DDR controller */
+#endif
+
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+#define CONFIG_SDRAM_PPC4xx_DENALI_DDR2	/* Denali DDR(2) controller */
+#endif
+
+#if defined(CONFIG_405EX) || \
+    defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
+    defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/* IBM DDR(2) controller */
+#endif
+
 #if defined(CONFIG_440)
 #include <ppc440.h>
 #else
 #include <ppc405.h>
 #endif
 
+#include <asm/ppc4xx-sdram.h>
+
 /*
  * Macro for generating register field mnemonics
  */
-- 
cgit