From e915716a5cdb40939204b3503f9356085e39fbd2 Mon Sep 17 00:00:00 2001 From: Sriram Dash Date: Mon, 22 Aug 2016 17:55:15 +0530 Subject: drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined transfers requests This is required for better performance, and performs below tuning: 1. Enable burst length set, and define it as 4/8/16. 2. Set burst request limit to 16 requests. Signed-off-by: Rajesh Bhagat Signed-off-by: Sriram Dash --- include/linux/usb/xhci-fsl.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/linux') diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index d04e3cc95a..15cac40e9d 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -20,6 +20,9 @@ #define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON | USB3_PHY_TX_POWERON) #define USB3_PWRCTL_CLK_CMD_SHIFT 14 #define USB3_PWRCTL_CLK_FREQ_SHIFT 22 +#define USB3_ENABLE_BEAT_BURST 0xF +#define USB3_ENABLE_BEAT_BURST_MASK 0xFF +#define USB3_SET_BEAT_BURST_LIMIT 0xF00 /* USBOTGSS_WRAPPER definitions */ #define USBOTGSS_WRAPRESET BIT(17) -- cgit From 4c043712e9910ef1d612aedbd8304a1f7348ef5f Mon Sep 17 00:00:00 2001 From: Sriram Dash Date: Fri, 23 Sep 2016 12:57:52 +0530 Subject: drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller Currently the controller by default enables the Receive Detect feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive detection in P3 mode. Enabling the USB3 controller to configure USB in P2 mode whenever the Receive Detect feature is required. Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- include/linux/usb/dwc3.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux') diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h index a0274461cc..c1b23b2f1b 100644 --- a/include/linux/usb/dwc3.h +++ b/include/linux/usb/dwc3.h @@ -198,6 +198,7 @@ struct dwc3 { /* offset: 0xC100 */ /* Global USB3 PIPE Control Register */ #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) +#define DWC3_GUSB3PIPECTL_DISRXDETP3 (1 << 28) #define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17) /* Global TX Fifo Size Register */ -- cgit