From 903e779c5537e1c87470f911a178e4463984e562 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Tue, 2 Oct 2012 09:22:10 +0000 Subject: mx6qsabreauto: Change mmcroot so it works out of box The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we move this to the board configuration file. Signed-off-by: Otavio Salvador Acked-by: Fabio Estevam --- include/configs/mx6qsabre_common.h | 2 +- include/configs/mx6qsabreauto.h | 3 ++- include/configs/mx6qsabresd.h | 1 + 3 files changed, 4 insertions(+), 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index 247e8d6dde..e25e9439e5 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -86,7 +86,7 @@ "initrd_high=0xffffffff\0" \ "mmcdev=0\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadbootscript=" \ diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index a878dec89a..760f3ce0c9 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2012 Freescale Semiconductor, Inc. * - * Configuration settings for the Freescale i.MX6Q SabreSD board. + * Configuration settings for the Freescale i.MX6Q SabreAuto board. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -15,6 +15,7 @@ #define CONFIG_MACH_TYPE 3529 #define CONFIG_MXC_UART_BASE UART4_BASE #define CONFIG_CONSOLE_DEV "ttymxc3" +#define CONFIG_MMCROOT "/dev/mmcblk0p2" #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) #include "mx6qsabre_common.h" diff --git a/include/configs/mx6qsabresd.h b/include/configs/mx6qsabresd.h index f2ce79e9ec..771d1297f7 100644 --- a/include/configs/mx6qsabresd.h +++ b/include/configs/mx6qsabresd.h @@ -20,6 +20,7 @@ #define CONFIG_MACH_TYPE 3980 #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_CONSOLE_DEV "ttymxc0" +#define CONFIG_MMCROOT "/dev/mmcblk1p2" #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #include "mx6qsabre_common.h" -- cgit From e58010b554500eab87603cb1ff9c546b46d8fd60 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Wed, 3 Oct 2012 07:28:43 +0000 Subject: i.MX6: mx6qsabrelite: Add splash screen support Adds support for HDMI, two LVDS panels and one RGB panel to the SABRE-Lite board. Displays supported: HDMI - 1024 x 768 for maximum compatibility Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1) wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600) wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480) Since the ipuv3_fb display driver currently supports only a single display, this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect or the I2C touch controller of the LVDS and RGB displays in the priority listed above. Setting 'panel' environment variable to one of the names above will override auto-detection. Signed-off-by: Eric Nelson --- include/configs/mx6qsabrelite.h | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index e7bf6582c3..c592a33b00 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -37,7 +37,7 @@ #define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R @@ -119,6 +119,19 @@ /* Miscellaneous commands */ #define CONFIG_CMD_BMODE +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 -- cgit From c606608a3427a6b35106e2ddd55c482b6b97265f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 15 Oct 2012 05:37:17 +0000 Subject: mx53loco: Adapt the IPU clock Since PLL2 now has changed, it is necessary to adapt the CONFIG_IPUV3_CLK accordingly. Signed-off-by: Fabio Estevam --- include/configs/mx53loco.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 6a6aaa1923..2ecfbd6bfc 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -222,6 +222,6 @@ #define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_LOGO -#define CONFIG_IPUV3_CLK 133000000 +#define CONFIG_IPUV3_CLK 200000000 #endif /* __CONFIG_H */ -- cgit From eca04423d14950bf9a7c8238b61a8c5fa26fda82 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 15 Oct 2012 07:26:16 +0000 Subject: configs: mx53loco: Remove CONFIG_HAS_ETH1 mx53loco has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam --- include/configs/mx53loco.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 2ecfbd6bfc..0658dd3003 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -58,7 +58,6 @@ #define CONFIG_DOS_PARTITION /* Eth Configs */ -#define CONFIG_HAS_ETH1 #define CONFIG_MII #define CONFIG_FEC_MXC -- cgit From ff7a89bb0f3a3a2a9b63097d899a43c2706f3253 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 15 Oct 2012 07:26:17 +0000 Subject: configs: mx51evk: Remove CONFIG_HAS_ETH1 mx51evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam --- include/configs/mx51evk.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 34b07831cb..d3edcba19b 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -96,7 +96,6 @@ /* * Eth Configs */ -#define CONFIG_HAS_ETH1 #define CONFIG_MII #define CONFIG_FEC_MXC -- cgit From 0690c69b279b39764925dc880aa11f3eb0f6141b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 15 Oct 2012 07:26:18 +0000 Subject: configs: mx53evk: Remove CONFIG_HAS_ETH1 mx53evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam --- include/configs/mx53evk.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 832050ea97..8fc415eb70 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -73,7 +73,6 @@ #define CONFIG_DOS_PARTITION /* Eth Configs */ -#define CONFIG_HAS_ETH1 #define CONFIG_MII #define CONFIG_FEC_MXC -- cgit From f5a289ba1ec0323bc588d504a5bb82a21f60cc0d Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Wed, 8 Aug 2012 02:26:31 +0000 Subject: mx6qsabrelite: enable DCache and MMC bounce buffer The recent U-Boot version 2012.07 has improved drivers (e.g. MMC and network/FEC) regarding DCache handling. So it should be safe to use the DCache on the i.MX6, now. Signed-off-by: Dirk Behme Acked-by: Stefano Babic --- include/configs/mx6qsabrelite.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index c592a33b00..5989eb21d9 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -72,6 +72,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_MMC_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION @@ -247,8 +248,6 @@ #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ -#define CONFIG_SYS_DCACHE_OFF - #ifndef CONFIG_SYS_DCACHE_OFF #define CONFIG_CMD_CACHE #endif -- cgit From 0208a53fb297bdc56731fd39fc07f0fff387e2ea Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 18 Oct 2012 18:42:00 +0000 Subject: mx25pdk: Use internal RAM for stack pointer Use internal RAM for stack pointer as it is done in other i.MX boards. Signed-off-by: Fabio Estevam --- include/configs/mx25pdk.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 96c143efb9..bd000a7f09 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -15,6 +15,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include + /* High Level Configuration Options */ #define CONFIG_SYS_HZ 1000 @@ -41,8 +43,13 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_ADDR IMX_RAM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE IMX_RAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Memory Test */ #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2) -- cgit From e6e85cd02624dc3d06192edf17b6c775127f76e8 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 17 Oct 2012 07:33:26 +0000 Subject: mx6qsabre_common: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFER Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Signed-off-by: Fabio Estevam --- include/configs/mx6qsabre_common.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index e25e9439e5..bfb9cd468e 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -45,6 +45,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_MMC_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION @@ -168,8 +169,6 @@ #define CONFIG_OF_LIBFDT -#define CONFIG_SYS_DCACHE_OFF - #ifndef CONFIG_SYS_DCACHE_OFF #define CONFIG_CMD_CACHE #endif -- cgit From c2cfe57e7ce8ea8550cb9b8cc1f35053abe7815f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 17 Oct 2012 07:33:27 +0000 Subject: mx6qarm2: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFER Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Signed-off-by: Fabio Estevam --- include/configs/mx6qarm2.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 965bea37ca..b425fedcf9 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -50,6 +50,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_MMC_BOUNCE_BUFFER #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION @@ -164,6 +165,4 @@ #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ -#define CONFIG_SYS_DCACHE_OFF - #endif /* __CONFIG_H */ -- cgit From c3f8318f33eb4eb79b3b5c5204a438d499572de0 Mon Sep 17 00:00:00 2001 From: Andrew Bradford Date: Thu, 25 Oct 2012 08:21:32 -0400 Subject: am335x_evm: Enable use of UART{1,2,3,4,5} Add targets of am335x_evm_uart{1,2,3,4,5} to have serial input/output on UART{1,2,3,4,5} for use with the Beaglebone RS232 cape, am335x_evm daughterboard, and other custom configurations. Modify target for am335x_evm to include SERIAL1 and CONS_INDEX=1 options in order to clarify UART selection requirements. Signed-off-by: Andrew Bradford --- include/configs/am335x_evm.h | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'include/configs') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 58d62d0c7d..cdb6697890 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -158,9 +158,15 @@ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SERIAL_MULTI #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ /* I2C Configuration */ #define CONFIG_I2C @@ -182,11 +188,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } -/* - * select serial console configuration - */ -#define CONFIG_SERIAL1 1 -#define CONFIG_CONS_INDEX 1 +#define CONFIG_ENV_OVERWRITE 1 #define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_ENV_IS_NOWHERE -- cgit From 6bbda88384948808dd4050624a6c27d6d63265a1 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Sun, 7 Oct 2012 11:36:06 +0000 Subject: tegra: add Colibri T20 board support This adds board support for the Toradex Colibri T20 module. Working functions: - SD card boot - USB boot - Network - NAND environment Signed-off-by: Lucas Stach Signed-off-by: Tom Warren --- include/configs/colibri_t20_iris.h | 83 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 include/configs/colibri_t20_iris.h (limited to 'include/configs') diff --git a/include/configs/colibri_t20_iris.h b/include/configs/colibri_t20_iris.h new file mode 100644 index 0000000000..0e5f281b25 --- /dev/null +++ b/include/configs/colibri_t20_iris.h @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2012 Lucas Stach + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "tegra20-common.h" + +/* Enable FDT support */ +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-colibri_t20_iris +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE + +/* High-level configuration options */ +#define V_PROMPT "Tegra20 (Colibri) # " +#define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T20 on Iris" + +/* Board-specific serial config */ +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_TEGRA_UARTA_SDIO1 +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +#define CONFIG_BOARD_EARLY_INIT_F + +/* SD/MMC support */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC + +/* File system support */ +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT + +/* USB host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_ULPI +#define CONFIG_USB_ULPI_VIEWPORT +#define CONFIG_USB_STORAGE +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 +#define CONFIG_CMD_USB + +/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_CMD_NET +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PING + +/* NAND support */ +#define CONFIG_CMD_NAND +#define CONFIG_TEGRA_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +/* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET (SZ_2M) +#undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */ +#define CONFIG_ENV_SIZE (SZ_64K) + +/* Debug commands */ +#define CONFIG_CMD_BDI +#define CONFIG_CMD_CACHE + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ -- cgit From 7f1b767aea949d954e75fa635968a9d315d2e7ff Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 20 Sep 2012 09:29:03 +0000 Subject: ARM: tegra: define CONFIG_SYS_BOOTMAPSZ This define indicates the size of the memory region where it is safe to place data passed to the Linux kernel (ATAGs, DTB, initrd). The value needs to be: a) Less than or equal to RAM size. b) Small enough that the area is not within the kernel's highmem region, since the kernel cannot access ATAGs/DTB/initrd from highmem. c) Large enough to hold the kernel+DTB+initrd. 256M seems large enough for (c) in most circumstances, and small enough to satisfy (a) and (b) across any possible Tegra board. Note that the user can override this value via environment variable "bootm_mapsize" if needed. The advantage of defining BOOTMAPSZ is that we no longer need to define variable fdt_high in the default environment. Previously, we defined this to prevent the DTB from being relocated to the very end of RAM, which on most Tegra systems is within highmem, and hence which would cause boot failures. A user can still define this variable themselves if they want the FDT to be either left in-place wherever loaded, or copied to some other specific location. Similarly, there should no longer be a strict requirement for the user to define initrd_high if using an initrd. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- include/configs/tegra-common-post.h | 1 - include/configs/tegra20-common.h | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 9698c23dad..5d1d3ddcb7 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -143,7 +143,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ "fdt_load=0x01000000\0" \ - "fdt_high=01100000\0" \ BOOTCMDS_COMMON /* overrides for SPL build here */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index dc7444d1cc..70c5cfbba8 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -171,6 +171,8 @@ #define CONFIG_SYS_TEXT_BASE 0x0010c000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ + #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ -- cgit From 938176a48274361c0b86b237ff6c0953a08233b3 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 2 Oct 2012 09:26:51 +0000 Subject: ARM: tegra: use standard variables to define load addresses Currently, Tegra's default environment uses non-standard variables to define where boot scripts should load the kernel, FDT, and initrd. This change both changes the variable names to match those described in U-Boot's README, and shuffles their values around a little so that the values make a little more sense; see comments in the patch for rationale behind the values chosen. Note that this patch does remove the old non-standard variable "fdt_load" from the default environment, so this patch requires people to change their boot scripts. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/tegra-common-post.h | 31 ++++++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) (limited to 'include/configs') diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 5d1d3ddcb7..6835155d11 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -95,8 +95,6 @@ #endif #define BOOTCMDS_COMMON \ - "scriptaddr=0x400000\0" \ - \ "rootpart=1\0" \ \ "script_boot=" \ @@ -140,9 +138,36 @@ #endif +/* + * Memory layout for where various images get loaded by boot scripts: + * + * scriptaddr can be pretty much anywhere that doesn't conflict with something + * else. Put it above BOOTMAPSZ to eliminate conflicts. + * + * kernel_addr_r must be within the first 128M of RAM in order for the + * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will + * decompress itself to 0x8000 after the start of RAM, kernel_addr_r + * should not overlap that area, or the kernel will have to copy itself + * somewhere else before decompression. Similarly, the address of any other + * data passed to the kernel shouldn't overlap the start of RAM. Pushing + * this up to 16M allows for a sizable kernel to be decompressed below the + * compressed load address. + * + * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for + * the compressed kernel to be up to 16M too. + * + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * for the FDT/DTB to be up to 1M, which is hopefully plenty. + */ +#define MEM_LAYOUT_ENV_SETTINGS \ + "scriptaddr=0x10000000\0" \ + "kernel_addr_r=0x01000000\0" \ + "fdt_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x02100000\0" \ + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ - "fdt_load=0x01000000\0" \ + MEM_LAYOUT_ENV_SETTINGS \ BOOTCMDS_COMMON /* overrides for SPL build here */ -- cgit From 699c40e8789cfbb5c3ca4ef2849a4bd051ff79bb Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 12 Oct 2012 09:45:48 +0000 Subject: ARM: tegra: Harmony: enable ULPI USB port The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- include/configs/harmony.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/configs') diff --git a/include/configs/harmony.h b/include/configs/harmony.h index d582ae1ab6..040bfe48eb 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -72,8 +72,11 @@ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */ /* USB Host support */ +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_ULPI +#define CONFIG_USB_ULPI_VIEWPORT #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB -- cgit From e73c7cdd1ea152f35f6cf2bc850362cd859f36b6 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 12 Oct 2012 09:45:49 +0000 Subject: ARM: tegra: Seaboard: enable multiple USB ports The device tree already contains the required configuration for both the USB1 and USB3 ports. Enable the required configuration options to enable both these ports, which in turn allows the USB1 port to be used. Note that on a true Seaboard, this port is typically used as a device port hosting Tegra's USB recovery protocol. However, on the Springbank derivative, this port is the only external USB port, so we enable it as a host port so that USB peripherals may be used. Enabling this port in U-Boot as a host port doesn't prevent the port from reverting to a device port when the CPU is reset into recovery mode. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- include/configs/seaboard.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 0727a4c6f8..74d3b94887 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -81,6 +81,7 @@ #define CONFIG_SYS_MMC_ENV_PART 2 /* USB Host support */ +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_STORAGE -- cgit From a833b95039a08cd52980f95564b567c8b3138cfe Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Sun, 7 Oct 2012 11:29:38 +0000 Subject: tegra: nand: make ONFI detection work Add the missing bits to the Tegra NAND driver to make ONFI detection work properly. Also add it to the Tegra default config, as it seems to be a reasonable thing to have it available on all boards that use any kind of NAND. Signed-off-by: Lucas Stach Acked-by: Scott Wood Signed-off-by: Tom Warren --- include/configs/tegra20-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs') diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 70c5cfbba8..272c46e06b 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -200,5 +200,6 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/tegra20/u-boot-spl.lds" #define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* __TEGRA20_COMMON_H */ -- cgit From 644a69ec85a73b4d24c3a7b0369da76e2c336bce Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 22 Oct 2012 06:19:34 +0000 Subject: ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it For Tegra, the SPL and main U-Boot are concatenated together to form a single memory image. Hence, the maximum SPL size is the different in TEXT_BASE for SPL and main U-Boot. Instead of manually calculating SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform the calculation automatically. Signed-off-by: Stephen Warren Acked-by: Simon Glass Acked-by: Allen Martin Tested-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/tegra20-common.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 272c46e06b..5b048e0094 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -188,7 +188,8 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x00108000 -#define CONFIG_SPL_MAX_SIZE 0x00004000 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SYS_SPL_MALLOC_START 0x00090000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 #define CONFIG_SPL_STACK 0x000ffffc -- cgit From b2f9893826c48f2653d4a1ffaff8623fdec22303 Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Fri, 19 Oct 2012 21:08:23 +0000 Subject: tegra: move to common SPL framework Change tegra SPL to use common SPL framework. Any tegra specific initialization is now done in spl_board_init() instead of board_init_f()/board_init_r(). Only one SPL boot target is supported on tegra, which is boot to RAM image. jump_to_image_no_args() must be overridden on tegra so the host CPU can be initialized. Signed-off-by: Allen Martin Acked-by: Stephen Warren Tested-by: Stephen Warren Tested-by: Lucas Stach Acked-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/tegra20-common.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/configs') diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 5b048e0094..15bd9bb146 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -169,6 +169,7 @@ #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_TEXT_BASE 0x0010c000 +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ @@ -186,6 +187,9 @@ /* Defines for SPL */ #define CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_RAM_DEVICE +#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x00108000 #define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \ -- cgit From ed407be53e1e8f0be90d5723ca71ab1c37e2eed8 Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Mon, 29 Oct 2012 07:54:01 +0000 Subject: New board support: Nokia RX-51 aka N900 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Based on previous work by: Alistair Buxton Signed-off-by: Pali Rohár Cc: Ивайло Димитров --- include/configs/nokia_rx51.h | 452 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 452 insertions(+) create mode 100644 include/configs/nokia_rx51.h (limited to 'include/configs') diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h new file mode 100644 index 0000000000..8506604a76 --- /dev/null +++ b/include/configs/nokia_rx51.h @@ -0,0 +1,452 @@ +/* + * (C) Copyright 2011-2012 + * Pali Rohár + * + * (C) Copyright 2010 + * Alistair Buxton + * + * Derived from Beagle Board code: + * (C) Copyright 2006-2008 + * Texas Instruments. + * Richard Woodruff + * Syed Mohammed Khasim + * + * Configuration settings for the Nokia RX-51 aka N900. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ + +#define CONFIG_OMAP /* in a TI OMAP core */ +#define CONFIG_OMAP34XX /* which is a 34XX */ +#define CONFIG_OMAP3430 /* which is in a 3430 */ +#define CONFIG_OMAP3_RX51 /* working with RX51 */ +#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ + +#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51 + +/* + * Nokia X-Loader loading secondary image to address 0x80400000 + * NOLO loading boot image to random place, so it doesn't really + * matter what we set this to. We have to copy u-boot to this address + */ +#define CONFIG_SYS_TEXT_BASE 0x80008000 + +#define CONFIG_SDRC /* The chip has SDRC controller */ + +#include /* get chip and board defs */ +#include +#include +#include + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R +#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */ + +#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */ +#define CONFIG_INITRD_TAG /* enable passing initrd */ +#define CONFIG_REVISION_TAG /* enable passing revision tag*/ +#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_UBI_SIZE (512 << 10) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \ + (128 << 10)) + +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_OMAP_HSMMC +#define CONFIG_DOS_PARTITION + +/* USB */ +#define CONFIG_MUSB_UDC +#define CONFIG_MUSB_HDC +#define CONFIG_USB_OMAP3 +#define CONFIG_TWL4030_USB + +/* USB device configuration */ +#define CONFIG_USB_DEVICE +#define CONFIG_USBD_VENDORID 0x0421 +#define CONFIG_USBD_PRODUCTID 0x01c8 +#define CONFIG_USBD_MANUFACTURER "Nokia" +#define CONFIG_USBD_PRODUCT_NAME "N900" + +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_NO_FLASH + +/* commands to include */ +#include + +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_EXT4 /* EXT4 Support */ +#define CONFIG_CMD_FAT /* FAT support */ + +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_GPIO /* Enable gpio command */ + +#define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ + +#define CONFIG_CMD_CLEAR /* ANSI terminal clear screen command */ + +#ifdef ONENAND_SUPPORT + +#define CONFIG_CMD_ONENAND /* ONENAND support */ +#define CONFIG_CMD_MTDPARTS /* mtd parts support */ + +#ifdef UBIFS_SUPPORT +#define CONFIG_CMD_UBI /* UBI Support */ +#define CONFIG_CMD_UBIFS /* UBIFS Support */ +#endif + +#endif + +/* commands not needed from config_cmd_default.h */ +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +#undef CONFIG_CMD_IMI /* iminfo */ +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_NFS /* NFS support */ +#undef CONFIG_CMD_SAVEENV /* saveenv */ +#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ + +#define CONFIG_OMAP3_SPI +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_DRIVER_OMAP34XX_I2C + +/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER +#define CONFIG_TWL4030_LED +#define CONFIG_TWL4030_KEYPAD + +#define CONFIG_OMAP_GPIO +#define GPIO_SLIDE 71 + +/* + * Board ONENAND Info. + */ + +#define PART1_NAME "bootloader" +#define PART1_SIZE 128 +#define PART1_MULL 1024 +#define PART1_SUFF "k" +#define PART1_OFFS 0x00000000 +#define PART1_MASK 0x00000003 + +#define PART2_NAME "config" +#define PART2_SIZE 384 +#define PART2_MULL 1024 +#define PART2_SUFF "k" +#define PART2_OFFS 0x00020000 +#define PART2_MASK 0x00000000 + +#define PART3_NAME "log" +#define PART3_SIZE 256 +#define PART3_MULL 1024 +#define PART3_SUFF "k" +#define PART3_OFFS 0x00080000 +#define PART3_MASK 0x00000000 + +#define PART4_NAME "kernel" +#define PART4_SIZE 2 +#define PART4_MULL 1024*1024 +#define PART4_SUFF "m" +#define PART4_OFFS 0x000c0000 +#define PART4_MASK 0x00000000 + +#define PART5_NAME "initfs" +#define PART5_SIZE 2 +#define PART5_MULL 1024*1024 +#define PART5_SUFF "m" +#define PART5_OFFS 0x002c0000 +#define PART5_MASK 0x00000000 + +#define PART6_NAME "rootfs" +#define PART6_SIZE 257280 +#define PART6_MULL 1024 +#define PART6_SUFF "k" +#define PART6_OFFS 0x004c0000 +#define PART6_MASK 0x00000000 + +#ifdef ONENAND_SUPPORT + +#define PISMO1_NAND_SIZE GPMC_SIZE_128M +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS + +#ifdef UBIFS_SUPPORT +#define CONFIG_RBTREE +#define CONFIG_LZO +#endif + +#define MTDIDS_DEFAULT "onenand0=onenand" +#define MTDPARTS_DEFAULT "mtdparts=onenand:" \ + __stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \ + __stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \ + __stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \ + __stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \ + __stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \ + "-(" PART6_NAME ")" + +#endif + +/* Watchdog support */ +#define CONFIG_HW_WATCHDOG + +/* + * Framebuffer + */ +/* Video console */ +#define CONFIG_VIDEO +#define CONFIG_CFB_CONSOLE +#define CONFIG_CFB_CONSOLE_ANSI /* Enable ANSI escape codes in framebuffer */ +#define CONFIG_VIDEO_LOGO +#define VIDEO_FB_16BPP_PIXEL_SWAP +#define VIDEO_FB_16BPP_WORD_SWAP +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_SPLASH_SCREEN + +/* functions for cfb_console */ +#define VIDEO_KBD_INIT_FCT rx51_kp_init() +#define VIDEO_TSTC_FCT rx51_kp_tstc +#define VIDEO_GETC_FCT rx51_kp_getc +#ifndef __ASSEMBLY__ +int rx51_kp_init(void); +int rx51_kp_tstc(void); +int rx51_kp_getc(void); +#endif + +#ifndef MTDPARTS_DEFAULT +#define MTDPARTS_DEFAULT +#endif + +/* Environment information */ +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "usbtty=cdc_acm\0" \ + "stdin=vga\0" \ + "stdout=vga\0" \ + "stderr=vga\0" \ + "setcon=setenv stdin ${con};" \ + "setenv stdout ${con};" \ + "setenv stderr ${con}\0" \ + "sercon=setenv con serial; run setcon\0" \ + "usbcon=setenv con usbtty; run setcon\0" \ + "vgacon=setenv con vga; run setcon\0" \ + "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ + "switchmmc=mmc dev ${mmcnum}\0" \ + "kernaddr=0x82008000\0" \ + "initrdaddr=0x84008000\0" \ + "scriptaddr=0x86008000\0" \ + "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \ + "${loadaddr} ${mmcfile}\0" \ + "kernload=setenv loadaddr ${kernaddr};" \ + "setenv mmcfile ${mmckernfile};" \ + "run fileload\0" \ + "initrdload=setenv loadaddr ${initrdaddr};" \ + "setenv mmcfile ${mmcinitrdfile};" \ + "run fileload\0" \ + "scriptload=setenv loadaddr ${scriptaddr};" \ + "setenv mmcfile ${mmcscriptfile};" \ + "run fileload\0" \ + "scriptboot=echo Running ${mmcscriptfile} from mmc " \ + "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \ + "kernboot=echo Booting ${mmckernfile} from mmc " \ + "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \ + "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\ + "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \ + "attachboot=echo Booting attached kernel image ...;" \ + "setenv setup_omap_atag 1;" \ + "bootm ${attkernaddr};" \ + "setenv setup_omap_atag\0" \ + "trymmcscriptboot=if run switchmmc; then " \ + "if run scriptload; then " \ + "run scriptboot;" \ + "fi;" \ + "fi\0" \ + "trymmckernboot=if run switchmmc; then " \ + "if run kernload; then " \ + "run kernboot;" \ + "fi;" \ + "fi\0" \ + "trymmckerninitrdboot=if run switchmmc; then " \ + "if run initrdload; then " \ + "if run kernload; then " \ + "run kerninitrdboot;" \ + "fi;" \ + "fi; " \ + "fi\0" \ + "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \ + "setenv mmckernfile uImage; run trymmckernboot\0" \ + "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \ + "setenv mmcpart 2; run trymmcpartboot;" \ + "setenv mmcpart 3; run trymmcpartboot;" \ + "setenv mmcpart 4; run trymmcpartboot\0" \ + "trymmcboot=if run switchmmc; then " \ + "setenv mmctype fat;" \ + "run trymmcallpartboot;" \ + "setenv mmctype ext2;" \ + "run trymmcallpartboot;" \ + "setenv mmctype ext4;" \ + "run trymmcallpartboot;" \ + "fi\0" \ + "emmcboot=setenv mmcnum 1; run trymmcboot\0" \ + "sdboot=setenv mmcnum 0; run trymmcboot\0" \ + "" + +#define CONFIG_PREBOOT \ + "if run slide; then true; else run attachboot; fi;" \ + "echo Extra commands:;" \ + "echo run sercon - Use serial port for control.;" \ + "echo run usbcon - Use usbtty for control.;" \ + "echo run vgacon - Use framebuffer/keyboard.;" \ + "echo run sdboot - Boot from SD card slot.;" \ + "echo run emmcboot - Boot internal eMMC memory.;" \ + "echo run attachboot - Boot attached kernel image.;" \ + "echo" + +#define CONFIG_BOOTCOMMAND \ + "run sdboot;" \ + "run emmcboot;" \ + "run attachboot;" \ + "echo" + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "Nokia RX-51 # " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/ + +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 + +/* + * FLASH and environment organization + */ + +#define CONFIG_ENV_IS_NOWHERE + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) + +/* + * Attached kernel image + */ + +#define SDRAM_SIZE 0x10000000 /* 256 MB */ +#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE) + +#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ +#define KERNEL_OFFSET 0x40000 /* 256 kB */ +#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET) +#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) + +/* Reserve protected RAM for attached kernel */ +#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1) + +#endif /* __CONFIG_H */ -- cgit From 843a7ee8c4b1e47fae41268d6b95306f7e6408f5 Mon Sep 17 00:00:00 2001 From: Raphael Assenat Date: Mon, 22 Oct 2012 05:23:46 +0000 Subject: eco5pk: Add new board and default config Signed-off-by: Raphael Assenat [trini: Squash boards.cfg / MAINTAINERS change into main patch] Signed-off-by: Tom Rini --- include/configs/eco5pk.h | 81 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 include/configs/eco5pk.h (limited to 'include/configs') diff --git a/include/configs/eco5pk.h b/include/configs/eco5pk.h new file mode 100644 index 0000000000..b9ebf6a2a8 --- /dev/null +++ b/include/configs/eco5pk.h @@ -0,0 +1,81 @@ +/* + * Copyright (C) 2012 8D Technologies inc. + * Based on mt_ventoux.h, original banner below: + * + * Copyright (C) 2011 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * Copyright (C) 2009 TechNexion Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "tam3517-common.h" + +#undef CONFIG_USB_EHCI +#undef CONFIG_USB_EHCI_OMAP +#undef CONFIG_USB_OMAP3 +#undef CONFIG_CMD_USB + +/* Our console port is port3 */ +#undef CONFIG_CONS_INDEX +#undef CONFIG_SYS_NS16550_COM1 +#undef CONFIG_SERIAL1 + +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 + +#define MACH_TYPE_ECO5_PK 4017 +#define CONFIG_MACH_TYPE MACH_TYPE_ECO5_PK + +#define CONFIG_BOOTDELAY 10 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_AUTO_COMPLETE + +/* + * Miscellaneous configurable options + */ +#define V_PROMPT "ECO5-PK # " +#define CONFIG_SYS_PROMPT V_PROMPT + +/* + * Set its own mtdparts, different from common + */ +#undef MTDIDS_DEFAULT +#undef MTDPARTS_DEFAULT +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(xloader-nand)," \ + "1024k(uboot-nand),256k(params-nand)," \ + "5120k(kernel),-(ubifs)" + +/* + * The arithmetic in tam3517.h is wrong for us and the kernel gets overwritten. + */ +#undef CONFIG_ENV_OFFSET_REDUND +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_SYS_ENV_SECT_SIZE) + +#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ + "install_kernel=if dhcp $bootfile; then nand erase kernel;" \ + "nand write $fileaddr kernel; fi\0" \ + "mtdparts="MTDPARTS_DEFAULT"\0" \ + "serverip=192.168.142.60\0" + + +#endif /* __CONFIG_H */ -- cgit From cc69cc002714422cbb551e3d6ebf7e2723c0c6de Mon Sep 17 00:00:00 2001 From: "Jens Scharsig (BuS Elektronik)" Date: Thu, 18 Oct 2012 21:41:10 +0000 Subject: arm: atmel: cpux9k2: add missing cache configs * add CONFIG_SYS_CACHELINE_SIZE to eb_cpux9k2 board config header * dissable dcache (CONFIG_SYS_DCACHE_OFF) for eb_cpux9k2 Signed-off-by: Jens Scharsig (BuS Elektronik) --- include/configs/eb_cpux9k2.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include/configs') diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 9371ec31f3..3be4929fc2 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -43,6 +43,10 @@ #define MACH_TYPE_EB_CPUX9K2 1977 #define CONFIG_MACH_TYPE MACH_TYPE_EB_CPUX9K2 + +#define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_SYS_DCACHE_OFF + /*--------------------------------------------------------------------------*/ #ifndef CONFIG_RAMBOOT #define CONFIG_SYS_TEXT_BASE 0x00000000 @@ -56,7 +60,6 @@ #define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1 #define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */ - #define CONFIG_BOOT_RETRY_TIME 30 #define CONFIG_CMDLINE_EDITING -- cgit