From 812711ce6b3a386125dcf0d6a59588e461abbb87 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 13 Dec 2007 12:56:31 +0100 Subject: Implement __raw_{read,write}[bwl] on all architectures This adds implementations of __raw_read[bwl] and __raw_write[bwl] to m68k, ppc, nios and nios2. The m68k and ppc implementations were taken from Linux. Signed-off-by: Haavard Skinnemoen --- include/asm-nios2/io.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include/asm-nios2/io.h') diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h index 5bb5322952..54cbd57c06 100644 --- a/include/asm-nios2/io.h +++ b/include/asm-nios2/io.h @@ -33,6 +33,14 @@ extern unsigned char inb (unsigned char *port); extern unsigned short inw (unsigned short *port); extern unsigned inl (unsigned port); +#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) + +#define __raw_readb(a) (*(volatile unsigned char *)(a)) +#define __raw_readw(a) (*(volatile unsigned short *)(a)) +#define __raw_readl(a) (*(volatile unsigned int *)(a)) + #define readb(addr)\ ({unsigned char val;\ asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) -- cgit From 4d7d6936eb29af7cca330937808312aa5f61454d Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 13 Dec 2007 12:56:33 +0100 Subject: Introduce map_physmem() and unmap_physmem() map_physmem() returns a virtual address which can be used to access a given physical address without involving the cache. unmap_physmem() should be called when the virtual address returned by map_physmem() is no longer needed. This patch adds a stub implementation which simply returns the physical address cast to a uchar * for all architectures except AVR32, which converts the physical address to an uncached virtual mapping. unmap_physmem() is a no-op on all architectures, but if any architecture needs to do such mappings through the TLB, this is the hook where those TLB entries can be invalidated. Signed-off-by: Haavard Skinnemoen --- include/asm-nios2/io.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'include/asm-nios2/io.h') diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h index 54cbd57c06..a52b95cf23 100644 --- a/include/asm-nios2/io.h +++ b/include/asm-nios2/io.h @@ -29,6 +29,32 @@ static inline void sync(void) __asm__ __volatile__ ("sync" : : : "memory"); } +/* + * Given a physical address and a length, return a virtual address + * that can be used to access the memory range with the caching + * properties specified by "flags". + */ +typedef unsigned long phys_addr_t; + +#define MAP_NOCACHE (0) +#define MAP_WRCOMBINE (0) +#define MAP_WRBACK (0) +#define MAP_WRTHROUGH (0) + +static inline void * +map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) +{ + return (void *)paddr; +} + +/* + * Take down a mapping set up by map_physmem(). + */ +static inline void unmap_physmem(void *vaddr, unsigned long flags) +{ + +} + extern unsigned char inb (unsigned char *port); extern unsigned short inw (unsigned short *port); extern unsigned inl (unsigned port); -- cgit