From b0d9512ab0f1b2c3f56346bf14b0978d45477ad2 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Mon, 13 Feb 2017 09:21:22 +0530 Subject: dm: core: Fix Handling of global_data moving in SPL commit 2f11cd9121658 ("dm: core: Handle global_data moving in SPL") handles relocation of GD in SPL if spl_init() is called before board_init_r(). So, uclass_root.next need not be initialized always and accessing uclass_root.next->prev gives an abort. Update the uclass_root only if it is available. Reviewed-by: Simon Glass Signed-off-by: Lokesh Vutla --- drivers/core/root.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/core/root.c b/drivers/core/root.c index 93ab568296..33cfde6a5c 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -44,8 +44,10 @@ struct udevice *dm_root(void) void dm_fixup_for_gd_move(struct global_data *new_gd) { /* The sentinel node has moved, so update things that point to it */ - new_gd->uclass_root.next->prev = &new_gd->uclass_root; - new_gd->uclass_root.prev->next = &new_gd->uclass_root; + if (gd->dm_root) { + new_gd->uclass_root.next->prev = &new_gd->uclass_root; + new_gd->uclass_root.prev->next = &new_gd->uclass_root; + } } fdt_addr_t dm_get_translation_offset(void) -- cgit From 1804044f30872075ee1996631caa18b617f3c718 Mon Sep 17 00:00:00 2001 From: Jean-Jacques Hiblot Date: Mon, 13 Feb 2017 16:17:48 +0100 Subject: regmap: use fdt address translation In the DTS, the addresses are defined relative to the parent bus. We need to translate them to get the address as seen by the CPU core. Signed-off-by: Jean-Jacques Hiblot --- drivers/core/regmap.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c index 833cd78e84..3bec3df9b6 100644 --- a/drivers/core/regmap.c +++ b/drivers/core/regmap.c @@ -70,6 +70,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp) int addr_len, size_len, both_len; int parent; int len; + int index; parent = dev_of_offset(dev->parent); addr_len = fdt_address_cells(blob, parent); @@ -86,13 +87,14 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp) if (!map) return -ENOMEM; - map->base = fdtdec_get_number(cell, addr_len); - - for (range = map->range; count > 0; - count--, cell += both_len, range++) { - range->start = fdtdec_get_number(cell, addr_len); - range->size = fdtdec_get_number(cell + addr_len, size_len); + for (range = map->range, index = 0; count > 0; + count--, cell += both_len, range++, index++) { + fdt_size_t sz; + range->start = fdtdec_get_addr_size_fixed(blob, dev->of_offset, + "reg", index, addr_len, size_len, &sz, true); + range->size = sz; } + map->base = map->range[0].start; *mapp = map; -- cgit From b06a381a69a292d54485e5fd51e8d57f9cf2f7f9 Mon Sep 17 00:00:00 2001 From: Jean-Jacques Hiblot Date: Mon, 13 Feb 2017 16:17:49 +0100 Subject: drivers: ti_qspi: use syscon to get the address ctrl_mod_mmap register We used to get the address of the optionnal ctrl_mod_mmap register as the third memory range of the "reg" property. the linux driver moved to use a syscon instead. In order to keep the DTS as close as possible to that of linux, we move to using a syscon as well. If SYSCON is not supported, the driver reverts to the old way of getting the address from the 3rd memory range Signed-off-by: Jean-Jacques Hiblot --- drivers/spi/ti_qspi.c | 47 ++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 42 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 79955d7597..3c4c9dd986 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -549,21 +551,56 @@ static int ti_qspi_probe(struct udevice *bus) return 0; } +static void *map_syscon_chipselects(struct udevice *bus) +{ +#if CONFIG_IS_ENABLED(SYSCON) + struct udevice *syscon; + struct regmap *regmap; + const fdt32_t *cell; + int len, err; + + err = uclass_get_device_by_phandle(UCLASS_SYSCON, bus, + "syscon-chipselects", &syscon); + if (err) { + debug("%s: unable to find syscon device (%d)\n", __func__, + err); + return NULL; + } + + regmap = syscon_get_regmap(syscon); + if (IS_ERR(regmap)) { + debug("%s: unable to find regmap (%ld)\n", __func__, + PTR_ERR(regmap)); + return NULL; + } + + cell = fdt_getprop(gd->fdt_blob, bus->of_offset, "syscon-chipselects", + &len); + if (len < 2*sizeof(fdt32_t)) { + debug("%s: offset not available\n", __func__); + return NULL; + } + + return fdtdec_get_number(cell + 1, 1) + regmap_get_range(regmap, 0); +#else + fdt_addr_t addr; + addr = dev_get_addr_index(bus, 2); + return (addr == FDT_ADDR_T_NONE) ? NULL : + map_physmem(addr, 0, MAP_NOCACHE); +#endif +} + static int ti_qspi_ofdata_to_platdata(struct udevice *bus) { struct ti_qspi_priv *priv = dev_get_priv(bus); const void *blob = gd->fdt_blob; int node = dev_of_offset(bus); - fdt_addr_t addr; - void *mmap; + priv->ctrl_mod_mmap = map_syscon_chipselects(bus); priv->base = map_physmem(dev_get_addr(bus), sizeof(struct ti_qspi_regs), MAP_NOCACHE); priv->memory_map = map_physmem(dev_get_addr_index(bus, 1), 0, MAP_NOCACHE); - addr = dev_get_addr_index(bus, 2); - mmap = map_physmem(dev_get_addr_index(bus, 2), 0, MAP_NOCACHE); - priv->ctrl_mod_mmap = (addr == FDT_ADDR_T_NONE) ? NULL : mmap; priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1); if (priv->max_hz < 0) { -- cgit