From 8f74e659c42e419cb896e171f00b77023bd35054 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 16 Jun 2020 19:06:29 -0400 Subject: spi: Enable missing CONFIG_SPL_DM_SPI support Due to how the Makefile logic is we currently get DM_SPI support in SPL enabled by having DM_SPI enabled for full U-Boot but not having CONFIG_SPL_DM_SPI set. Add this missing option to boards that were inadvertently making use of it. Cc: Adam Ford Cc: Akash Gajjar Cc: Anatolij Gustschin Cc: Andy Yan Cc: Anup Patel Cc: Atish Patra Cc: Bin Meng Cc: Chee Hong Ang Cc: Chin-Liang See Cc: Dalon Westergreen Cc: Dinh Nguyen Cc: Eugen Hristev Cc: Hannes Schmelzer Cc: Heiko Schocher Cc: Jagan Teki Cc: Klaus Goger Cc: Levin Du Cc: Ley Foon Tan Cc: Lokesh Vutla Cc: Luca Ceresoli Cc: Marek Vasut Cc: Michal Simek Cc: Mike Looijmans Cc: Nicolas Ferre Cc: Nikita Kiryanov Cc: Palmer Dabbelt Cc: Patrick Delaunay Cc: Paul Walmsley Cc: Pavel Machek Cc: Peter Robinson Cc: Philipp Tomsich Cc: Simon Glass Cc: Stefan Roese Cc: Suniel Mahesh Cc: Vitaly Andrianov Cc: Wolfgang Grandegger Signed-off-by: Tom Rini Reviewed-by: Simon Glass Reviewed-by: Luca Ceresoli --- configs/chromebook_speedy_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'configs/chromebook_speedy_defconfig') diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 5a5152541b..f930ba6179 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -3,6 +3,7 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SPL_DM_SPI=y CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_TARGET_CHROMEBOOK_SPEEDY=y -- cgit