From 4ef630df773e45806d701bf5d25c328778bb4cde Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Thu, 5 Feb 2009 11:25:25 -0600 Subject: 86xx: Reset update Update the 86xx reset sequence to try executing a board-specific reset function. If the board-specific reset is not implemented or does not succeed, then assert #HRESET_REQ. Using #HRESET_REQ is a more standard reset procedure than the previous method and allows all board peripherals to be reset if needed. Signed-off-by: Peter Tyser --- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 8 ++++++++ board/freescale/mpc8641hpcn/mpc8641hpcn.c | 8 ++++++++ board/sbc8641d/sbc8641d.c | 29 +++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+) (limited to 'board') diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index a2097a5aff..b419dcc5b5 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -484,3 +484,11 @@ int board_eth_init(bd_t *bis) { return pci_eth_init(bis); } + +void board_reset(void) +{ + out8(PIXIS_BASE + PIXIS_RST, 0); + + while (1) + ; +} diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 28c16833dc..49718dac6c 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -363,3 +363,11 @@ int board_eth_init(bd_t *bis) cpu_eth_init(bis); return pci_eth_init(bis); } + +void board_reset(void) +{ + out8(PIXIS_BASE + PIXIS_RST, 0); + + while (1) + ; +} diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index 508bdc5dd8..52ad2d86c9 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -384,3 +384,32 @@ unsigned long get_board_sys_clk (ulong dummy) return val; } + +void board_reset(void) +{ +#ifdef CONFIG_SYS_RESET_ADDRESS + ulong addr = CONFIG_SYS_RESET_ADDRESS; + + /* flush and disable I/D cache */ + __asm__ __volatile__ ("mfspr 3, 1008" ::: "r3"); + __asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5"); + __asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4"); + __asm__ __volatile__ ("andc 5, 3, 5" ::: "r5"); + __asm__ __volatile__ ("sync"); + __asm__ __volatile__ ("mtspr 1008, 4"); + __asm__ __volatile__ ("isync"); + __asm__ __volatile__ ("sync"); + __asm__ __volatile__ ("mtspr 1008, 5"); + __asm__ __volatile__ ("isync"); + __asm__ __volatile__ ("sync"); + + /* + * SRR0 has system reset vector, SRR1 has default MSR value + * rfi restores MSR from SRR1 and sets the PC to the SRR0 value + */ + __asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr)); + __asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4"); + __asm__ __volatile__ ("mtspr 27, 4"); + __asm__ __volatile__ ("rfi"); +#endif +} -- cgit