From b3b9d7ca324429319df1d1f246643d2ae928beb6 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:34 -0600 Subject: dm: tegra: cros_ec: Enable Chrome OS EC on Nyan-big Enable the EC and keyboard, using the SPI bus. The EC driver requires a particular format and a deactivation delay. Also U-Boot does not support interrupts. For now, adjust the device tree to comply. At some point we should tidy this up to support interrupts and make tegra and exynos use the same setup. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/dts/tegra124-nyan-big.dts | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/tegra124-nyan-big.dts b/arch/arm/dts/tegra124-nyan-big.dts index 5a39e93c68..8be6adbf07 100644 --- a/arch/arm/dts/tegra124-nyan-big.dts +++ b/arch/arm/dts/tegra124-nyan-big.dts @@ -163,12 +163,15 @@ spi@7000d400 { status = "okay"; + spi-deactivate-delay = <200>; + spi-max-frequency = <3000000>; cros_ec: cros-ec@0 { compatible = "google,cros-ec-spi"; spi-max-frequency = <3000000>; interrupt-parent = <&gpio>; interrupts = ; + ec-interrupt = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; reg = <0>; google,cros-ec-spi-msg-delay = <2000>; -- cgit From 746dc76b99e44128025d9f18f7a154e2382ed134 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:36 -0600 Subject: tegra: clock: Support enabling external clocks Add a simple function to enable external clocks. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra/clock.h | 8 ++++++++ arch/arm/mach-tegra/clock.c | 17 +++++++++++++++++ 2 files changed, 25 insertions(+) (limited to 'arch') diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index 04011ae255..f9dd3c817d 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -336,4 +336,12 @@ void arch_timer_init(void); void tegra30_set_up_pllp(void); +/** + * Enable output clock for external peripherals + * + * @param clk_id Clock ID to output (1, 2 or 3) + * @return 0 if OK. -ve on error + */ +int clock_external_output(int clk_id); + #endif /* _TEGRA_CLOCK_H_ */ diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index cdd54388c5..590826072b 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -17,11 +17,13 @@ /* Tegra SoC common clock control functions */ #include +#include #include #include #include #include #include +#include #include #include #include @@ -702,3 +704,18 @@ void tegra30_set_up_pllp(void) set_avp_clock_source(SCLK_SOURCE_PLLP_OUT4); } + +int clock_external_output(int clk_id) +{ + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + + if (clk_id >= 1 && clk_id <= 3) { + setbits_le32(&pmc->pmc_clk_out_cntrl, + 1 << (2 + (clk_id - 1) * 8)); + } else { + printf("%s: Unknown output clock id %d\n", __func__, clk_id); + return -EINVAL; + } + + return 0; +} -- cgit From cd3c67692b13fb24f69b3016bc9990eeaaa32ca1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:37 -0600 Subject: tegra: clock: Adjust PLL access to avoid a warning A harmless but confusing warning is displayed when looking up the DisplayPort PLL. Correct this. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/mach-tegra/clock.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 590826072b..24047b8c82 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -84,7 +84,7 @@ static struct clk_pll *get_pll(enum clock_id clkid) assert(clock_id_is_pll(clkid)); if (clkid >= (enum clock_id)TEGRA_CLK_PLLS) { - debug("%s: Invalid PLL\n", __func__); + debug("%s: Invalid PLL %d\n", __func__, clkid); return NULL; } return &clkrst->crc_pll[clkid]; @@ -120,9 +120,12 @@ int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn, unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn, u32 divp, u32 cpcon, u32 lfcon) { - struct clk_pll *pll = get_pll(clkid); + struct clk_pll *pll = NULL; u32 misc_data, data; + if (clkid < (enum clock_id)TEGRA_CLK_PLLS) + pll = get_pll(clkid); + /* * We cheat by treating all PLL (except PLLU) in the same fashion. * This works only because: -- cgit From 701b7b1d2cf657d435d2bd6caf43d0247d37220d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:38 -0600 Subject: tegra: Introduce SRAM repair on tegra124 This is required in order to avoid instability when running from caches after the kernel starts. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra124/flow.h | 12 ++++++++++++ arch/arm/mach-tegra/powergate.c | 20 +++++++++++++++++++- 2 files changed, 31 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/include/asm/arch-tegra124/flow.h b/arch/arm/include/asm/arch-tegra124/flow.h index d6f515f1e9..7818b1bd34 100644 --- a/arch/arm/include/asm/arch-tegra124/flow.h +++ b/arch/arm/include/asm/arch-tegra124/flow.h @@ -26,6 +26,12 @@ struct flow_ctlr { u32 cpu_pwr_csr; /* offset 0x38 */ u32 mpid; /* offset 0x3c */ u32 ram_repair; /* offset 0x40 */ + u32 flow_dbg_sel; /* offset 0x44 */ + u32 flow_dbg_cnt0; /* offset 0x48 */ + u32 flow_dbg_cnt1; /* offset 0x4c */ + u32 flow_dbg_qual; /* offset 0x50 */ + u32 flow_ctlr_spare; /* offset 0x54 */ + u32 ram_repair_cluster1;/* offset 0x58 */ }; /* HALT_COP_EVENTS_0, 0x04 */ @@ -43,4 +49,10 @@ struct flow_ctlr { #define CSR_WAIT_WFI_SHIFT 8 #define CSR_PWR_OFF_STS (1 << 16) +/* RAM_REPAIR, 0x40, 0x58 */ +enum { + RAM_REPAIR_REQ = 0x1 << 0, + RAM_REPAIR_STS = 0x1 << 1, +}; + #endif /* _TEGRA124_FLOW_H_ */ diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index 6331cd40fd..30ae036bff 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -9,7 +9,7 @@ #include #include - +#include #include #include @@ -75,11 +75,29 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) return 0; } +static void tegra_powergate_ram_repair(void) +{ +#ifdef CONFIG_TEGRA124 + struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; + + /* Request RAM repair for cluster 0 and wait until complete */ + setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ); + while (!(readl(&flow->ram_repair) & RAM_REPAIR_STS)) + ; + + /* Same for cluster 1 */ + setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ); + while (!(readl(&flow->ram_repair_cluster1) & RAM_REPAIR_STS)) + ; +#endif +} + int tegra_powergate_sequence_power_up(enum tegra_powergate id, enum periph_id periph) { int err; + tegra_powergate_ram_repair(); reset_set_enable(periph, 1); err = tegra_powergate_power_on(id); -- cgit From 057772b7618321ef5a2d48318d2ded758015cc1a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:39 -0600 Subject: tegra: Add missing tegra124 peripherals There are some missing entries in the tables. Add them. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra124/clock-tables.h | 12 ++++++------ arch/arm/mach-tegra/tegra124/clock.c | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/arm/include/asm/arch-tegra124/clock-tables.h b/arch/arm/include/asm/arch-tegra124/clock-tables.h index 7005855999..3c67e72afe 100644 --- a/arch/arm/include/asm/arch-tegra124/clock-tables.h +++ b/arch/arm/include/asm/arch-tegra124/clock-tables.h @@ -285,12 +285,12 @@ enum periph_id { /* 184 */ PERIPH_ID_GPU, PERIPH_ID_AMX1, - PERIPH_ID_X_RESERVED26, - PERIPH_ID_X_RESERVED27, - PERIPH_ID_X_RESERVED28, - PERIPH_ID_X_RESERVED29, - PERIPH_ID_X_RESERVED30, - PERIPH_ID_X_RESERVED31, + PERIPH_ID_AFC5, + PERIPH_ID_AFC4, + PERIPH_ID_AFC3, + PERIPH_ID_AFC2, + PERIPH_ID_AFC1, + PERIPH_ID_AFC0, PERIPH_ID_COUNT, PERIPH_ID_NONE = -1, diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index 2d17550f73..b9558484b0 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -475,7 +475,7 @@ static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = { PERIPHC_ACTMON, /* 120 */ - NONE(EXTPERIPH1), + PERIPHC_EXTPERIPH1, NONE(EXTPERIPH2), NONE(EXTPERIPH3), NONE(OOB), -- cgit From c96d709f30cdf57ba78ef780066784a09276705f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:42 -0600 Subject: tegra: Allow board-specific init Add a hook to allows boards to add their own init to board_init(). Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra/sys_proto.h | 7 +++++++ arch/arm/mach-tegra/board2.c | 8 ++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/include/asm/arch-tegra/sys_proto.h b/arch/arm/include/asm/arch-tegra/sys_proto.h index 83f9f472c9..b64f9d813b 100644 --- a/arch/arm/include/asm/arch-tegra/sys_proto.h +++ b/arch/arm/include/asm/arch-tegra/sys_proto.h @@ -25,4 +25,11 @@ int tegra_board_id(void); */ int tegra_lcd_pmic_init(int board_id); +/** + * nvidia_board_init() - perform any board-specific init + * + * @return 0 if OK, -ve on error + */ +int nvidia_board_init(void); + #endif diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 131802ae62..ebcee4ed9a 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -107,6 +107,11 @@ __weak int tegra_lcd_pmic_init(int board_it) return 0; } +__weak int nvidia_board_init(void) +{ + return 0; +} + /* * Routine: board_init * Description: Early hardware init. @@ -180,8 +185,7 @@ int board_init(void) /* prepare the WB code to LP0 location */ warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); #endif - - return 0; + return nvidia_board_init(); } #ifdef CONFIG_BOARD_EARLY_INIT_F -- cgit From f3746621f1ee2122a9fa180bce74b2940fc5c297 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 5 Jun 2015 14:39:45 -0600 Subject: tegra: Replace 'Norrin' with 'Nyan-big' and fix typo With the rename the MAINTAINER file was not updated. Fix it and the 'Chrombook' typo in Kconfig. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/mach-tegra/tegra124/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index 6579e3f30c..f3324ffaa8 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -10,7 +10,7 @@ config TARGET_JETSON_TK1 select CPU_V7_HAS_VIRT if !SPL_BUILD config TARGET_NYAN_BIG - bool "Google/NVIDIA Nyan-big Chrombook" + bool "Google/NVIDIA Nyan-big Chromebook" help Nyan Big is a Tegra124 clamshell board that is very similar to venice2, but it has a different panel, the sdcard CD and WP -- cgit From 91432d2f2fab4a780d860bd6cb4922ca11b2aac8 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Mon, 18 May 2015 17:56:47 +0200 Subject: odroid: dts: cleanup of MAX77686 regulators This commit cleanup MAX77686 regulator node by: - remove the sub-nodes of unconnected regulators - remove the "regulator-compatible" properties of all regulators This prevents printing init errors for the regulators, with duplicated name strings. Signed-off-by: Przemyslaw Marczak Cc: Minkyu Kang Signed-off-by: Minkyu Kang --- arch/arm/dts/exynos4412-odroid.dts | 80 +------------------------------------- 1 file changed, 2 insertions(+), 78 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts index 415dfeab6a..d572f1e72b 100644 --- a/arch/arm/dts/exynos4412-odroid.dts +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -43,140 +43,102 @@ voltage-regulators { ldo1_reg: ldo1 { - regulator-compatible = "LDO1"; regulator-name = "VDD_ALIVE_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; ldo2_reg: ldo2 { - regulator-compatible = "LDO2"; regulator-name = "VDDQ_VM1M2_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; ldo3_reg: ldo3 { - regulator-compatible = "LDO3"; regulator-name = "VCC_1.8V_AP"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo4_reg: ldo4 { - regulator-compatible = "LDO4"; regulator-name = "VDDQ_MMC2_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; ldo5_reg: ldo5 { - regulator-compatible = "LDO5"; regulator-name = "VDDQ_MMC0/1/3_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo6_reg: ldo6 { - regulator-compatible = "LDO6"; regulator-name = "VMPLL_1.0V"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; }; ldo7_reg: ldo7 { - regulator-compatible = "LDO7"; regulator-name = "VPLL_1.1V"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; }; ldo8_reg: ldo8 { - regulator-compatible = "LDO8"; regulator-name = "VDD_MIPI/HDMI_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; - ldo9_reg: ldo9 { - regulator-compatible = "LDO9"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - ldo10_reg: ldo10 { - regulator-compatible = "LDO10"; regulator-name = "VDD_MIPI/HDMI_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo11_reg: ldo11 { - regulator-compatible = "LDO11"; regulator-name = "VDD_ABB1_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo12_reg: ldo12 { - regulator-compatible = "LDO12"; regulator-name = "VDD_UOTG_3.0V"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; }; ldo13_reg: ldo13 { - regulator-compatible = "LDO13"; regulator-name = "VDD_C2C_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo14_reg: ldo14 { - regulator-compatible = "LDO14"; regulator-name = "VDD_ABB02_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo15_reg: ldo15 { - regulator-compatible = "LDO15"; regulator-name = "VDD_HSIC/OTG_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; ldo16_reg: ldo16 { - regulator-compatible = "LDO16"; regulator-name = "VDD_HSIC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo17_reg: ldo17 { - regulator-compatible = "LDO17"; regulator-name = "VDDQ_CAM_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo18_reg: ldo18 { - regulator-compatible = "LDO18"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo19_reg: ldo19 { - regulator-compatible = "LDO19"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - ldo20_reg: ldo20 { - regulator-compatible = "LDO20"; regulator-name = "VDDQ_EMMC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -185,7 +147,6 @@ }; ldo21_reg: ldo21 { - regulator-compatible = "LDO21"; regulator-name = "TFLASH_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; @@ -194,7 +155,6 @@ }; ldo22_reg: ldo22 { - regulator-compatible = "LDO22"; regulator-name = "VDDQ_EMMC_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; @@ -202,20 +162,6 @@ regulator-boot-on; }; - ldo23_reg: ldo23 { - regulator-compatible = "LDO23"; - regulator-name = "nc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - ldo24_reg: ldo24 { - regulator-compatible = "LDO24"; - regulator-name = "nc"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - ldo25_reg: ldo25 { regulator-compatible = "LDO25"; regulator-name = "VDDQ_LCD_3.0V"; @@ -223,75 +169,53 @@ regulator-max-microvolt = <3000000>; }; - ldo26_reg: ldo26 { - regulator-compatible = "LDO26"; - regulator-name = "nc"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - - buck1_reg: buck@1 { - regulator-compatible = "BUCK1"; + buck1_reg: buck1 { regulator-name = "VDD_MIF_1.0V"; regulator-min-microvolt = <8500000>; regulator-max-microvolt = <1100000>; }; - buck2_reg: buck@2 { - regulator-compatible = "BUCK2"; + buck2_reg: buck2 { regulator-name = "VDD_ARM_1.0V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1500000>; }; buck3_reg: buck3 { - regulator-compatible = "BUCK3"; regulator-name = "VDD_INT_1.1V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; }; buck4_reg: buck4 { - regulator-compatible = "BUCK4"; regulator-name = "VDD_G3D_1.0V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; }; buck5_reg: buck5 { - regulator-compatible = "BUCK5"; regulator-name = "VDDQ_AP_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; buck6_reg: buck6 { - regulator-compatible = "BUCK6"; regulator-name = "VCC_INL1/7_1.35V"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; }; buck7_reg: buck7 { - regulator-compatible = "BUCK7"; regulator-name = "VCC_INL2/3/5_2.0V"; regulator-min-microvolt = <2000000>; regulator-max-microvolt = <2000000>; }; buck8_reg: buck8 { - regulator-compatible = "BUCK8"; regulator-name = "VCC_P3V3_2.85V"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <3300000>; }; - - buck9_reg: buck9 { - regulator-compatible = "BUCK9"; - regulator-name = "nc"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; }; }; }; -- cgit From 9eb45aabe0780eb837baefe706482fe7bf68d9fc Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:24 +0200 Subject: avr32: delete non generic board favr-32-ezkit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/Kconfig | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch') diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index c69654c993..34881edd45 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -26,9 +26,6 @@ config TARGET_ATSTK1004 config TARGET_ATSTK1006 bool "Support atstk1006" -config TARGET_FAVR_32_EZKIT - bool "Support favr-32-ezkit" - config TARGET_GRASSHOPPER bool "Support grasshopper" @@ -43,7 +40,6 @@ endchoice source "board/atmel/atngw100/Kconfig" source "board/atmel/atngw100mkii/Kconfig" source "board/atmel/atstk1000/Kconfig" -source "board/earthlcd/favr-32-ezkit/Kconfig" source "board/in-circuit/grasshopper/Kconfig" source "board/mimc/mimc200/Kconfig" source "board/miromico/hammerhead/Kconfig" -- cgit From e36930764471711c12a7fac8dfb9535b96a284ca Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:25 +0200 Subject: avr32: delete non generic board hammerhead MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/Kconfig | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch') diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 34881edd45..cfcdbe7565 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -32,9 +32,6 @@ config TARGET_GRASSHOPPER config TARGET_MIMC200 bool "Support mimc200" -config TARGET_HAMMERHEAD - bool "Support hammerhead" - endchoice source "board/atmel/atngw100/Kconfig" @@ -42,6 +39,5 @@ source "board/atmel/atngw100mkii/Kconfig" source "board/atmel/atstk1000/Kconfig" source "board/in-circuit/grasshopper/Kconfig" source "board/mimc/mimc200/Kconfig" -source "board/miromico/hammerhead/Kconfig" endmenu -- cgit From c62d2f8fc5c682ad541d98e289434a0f76d5ad4b Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:26 +0200 Subject: avr32: delete non generic board mimc200 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/Kconfig | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch') diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index cfcdbe7565..0c7b1ba11a 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -29,15 +29,11 @@ config TARGET_ATSTK1006 config TARGET_GRASSHOPPER bool "Support grasshopper" -config TARGET_MIMC200 - bool "Support mimc200" - endchoice source "board/atmel/atngw100/Kconfig" source "board/atmel/atngw100mkii/Kconfig" source "board/atmel/atstk1000/Kconfig" source "board/in-circuit/grasshopper/Kconfig" -source "board/mimc/mimc200/Kconfig" endmenu -- cgit From e5354b8a9e2ad7035c8623b552e7532ef7b133ae Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:27 +0200 Subject: avr32: delete non generic board's atstk100{3, 4, 6} MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/Kconfig | 9 --------- 1 file changed, 9 deletions(-) (limited to 'arch') diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 0c7b1ba11a..eb3377486f 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -17,15 +17,6 @@ config TARGET_ATNGW100MKII config TARGET_ATSTK1002 bool "Support atstk1002" -config TARGET_ATSTK1003 - bool "Support atstk1003" - -config TARGET_ATSTK1004 - bool "Support atstk1004" - -config TARGET_ATSTK1006 - bool "Support atstk1006" - config TARGET_GRASSHOPPER bool "Support grasshopper" -- cgit From b5614f9a7fb25521823a84fc0e4b5bb21dc45331 Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Mon, 11 May 2015 13:07:29 +0200 Subject: avr32: delete ancient board.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Bießmann --- arch/avr32/lib/Makefile | 3 - arch/avr32/lib/board.c | 256 ------------------------------------------------ 2 files changed, 259 deletions(-) delete mode 100644 arch/avr32/lib/board.c (limited to 'arch') diff --git a/arch/avr32/lib/Makefile b/arch/avr32/lib/Makefile index 6750913630..8108ae5272 100644 --- a/arch/avr32/lib/Makefile +++ b/arch/avr32/lib/Makefile @@ -8,9 +8,6 @@ # obj-y += memset.o -ifndef CONFIG_SYS_GENERIC_BOARD -obj-y += board.o -endif obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += interrupts.o obj-y += dram_init.o diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c deleted file mode 100644 index aacfcbf69a..0000000000 --- a/arch/avr32/lib/board.c +++ /dev/null @@ -1,256 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_BITBANGMII -#include -#endif - -#include -#include -#include - -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - -#ifdef CONFIG_GENERIC_ATMEL_MCI -#include -#endif -DECLARE_GLOBAL_DATA_PTR; - -unsigned long monitor_flash_len; - -__weak void dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = gd->ram_size; -} - -/* Weak aliases for optional board functions */ -static int __do_nothing(void) -{ - return 0; -} -int board_postclk_init(void) __attribute__((weak, alias("__do_nothing"))); -int board_early_init_r(void) __attribute__((weak, alias("__do_nothing"))); - -static int init_baudrate(void) -{ - gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); - return 0; -} - -static int display_banner (void) -{ - printf ("\n\n%s\n\n", version_string); - printf ("U-Boot code: %08lx -> %08lx data: %08lx -> %08lx\n", - (unsigned long)_text, (unsigned long)_etext, - (unsigned long)_data, (unsigned long)(&__bss_end)); - return 0; -} - -static int display_dram_config (void) -{ - int i; - - puts ("DRAM Configuration:\n"); - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - printf ("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); - print_size (gd->bd->bi_dram[i].size, "\n"); - } - - return 0; -} - -static void display_flash_config (void) -{ - puts ("Flash: "); - print_size(gd->bd->bi_flashsize, " "); - printf("at address 0x%08lx\n", gd->bd->bi_flashstart); -} - -void board_init_f(ulong board_type) -{ - gd_t gd_data; - gd_t *new_gd; - bd_t *bd; - unsigned long *new_sp; - unsigned long monitor_len; - unsigned long monitor_addr; - unsigned long addr; - - /* Initialize the global data pointer */ - memset(&gd_data, 0, sizeof(gd_data)); - gd = &gd_data; - - /* Perform initialization sequence */ - board_early_init_f(); - arch_cpu_init(); - board_postclk_init(); - env_init(); - init_baudrate(); - serial_init(); - console_init_f(); - display_banner(); - dram_init(); - - /* If we have no SDRAM, we can't go on */ - if (gd->ram_size <= 0) - panic("No working SDRAM available\n"); - - /* - * Now that we have DRAM mapped and working, we can - * relocate the code and continue running from DRAM. - * - * Reserve memory at end of RAM for (top down in that order): - * - u-boot image - * - heap for malloc() - * - board info struct - * - global data struct - * - stack - */ - addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size; - monitor_len = (char *)(&__bss_end) - _text; - - /* - * Reserve memory for u-boot code, data and bss. - * Round down to next 4 kB limit. - */ - addr -= monitor_len; - addr &= ~(4096UL - 1); - monitor_addr = addr; - - /* Reserve memory for malloc() */ - addr -= CONFIG_SYS_MALLOC_LEN; - -#ifdef CONFIG_LCD -#ifdef CONFIG_FB_ADDR - printf("LCD: Frame buffer allocated at preset 0x%08x\n", - CONFIG_FB_ADDR); - gd->fb_base = CONFIG_FB_ADDR; -#else - addr = lcd_setmem(addr); - printf("LCD: Frame buffer allocated at 0x%08lx\n", addr); - gd->fb_base = addr; -#endif /* CONFIG_FB_ADDR */ -#endif /* CONFIG_LCD */ - - /* Allocate a Board Info struct on a word boundary */ - addr -= sizeof(bd_t); - addr &= ~3UL; - gd->bd = bd = (bd_t *)addr; - - /* Allocate a new global data copy on a 8-byte boundary. */ - addr -= sizeof(gd_t); - addr &= ~7UL; - new_gd = (gd_t *)addr; - - /* And finally, a new, bigger stack. */ - new_sp = (unsigned long *)addr; - gd->start_addr_sp = addr; - *(--new_sp) = 0; - *(--new_sp) = 0; - - dram_init_banksize(); - - memcpy(new_gd, gd, sizeof(gd_t)); - - relocate_code((unsigned long)new_sp, new_gd, monitor_addr); -} - -void board_init_r(gd_t *new_gd, ulong dest_addr) -{ -#ifndef CONFIG_ENV_IS_NOWHERE - extern char * env_name_spec; -#endif - bd_t *bd; - - gd = new_gd; - bd = gd->bd; - - gd->flags |= GD_FLG_RELOC; - gd->reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE; - - /* Enable the MMU so that we can keep u-boot simple */ - mmu_init_r(dest_addr); - - board_early_init_r(); - - monitor_flash_len = _edata - _text; - -#if defined(CONFIG_NEEDS_MANUAL_RELOC) - /* - * We have to relocate the command table manually - */ - fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd), - ll_entry_count(cmd_tbl_t, cmd)); -#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */ - - /* there are some other pointer constants we must deal with */ -#ifndef CONFIG_ENV_IS_NOWHERE - env_name_spec += gd->reloc_off; -#endif - - timer_init(); - - /* The malloc area is right below the monitor image in RAM */ - mem_malloc_init(CONFIG_SYS_MONITOR_BASE + gd->reloc_off - - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN); - - enable_interrupts(); - - bd->bi_flashstart = 0; - bd->bi_flashsize = 0; - bd->bi_flashoffset = 0; - -#ifndef CONFIG_SYS_NO_FLASH - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; - bd->bi_flashsize = flash_init(); - bd->bi_flashoffset = (unsigned long)_edata - (unsigned long)_text; - - if (bd->bi_flashsize) - display_flash_config(); -#endif - - if (bd->bi_dram[0].size) - display_dram_config(); - - gd->bd->bi_boot_params = malloc(CONFIG_SYS_BOOTPARAMS_LEN); - if (!gd->bd->bi_boot_params) - puts("WARNING: Cannot allocate space for boot parameters\n"); - - /* initialize environment */ - env_relocate(); - - stdio_init(); - jumptable_init(); - console_init_r(); - - /* Initialize from environment */ - load_addr = getenv_ulong("loadaddr", 16, load_addr); - -#ifdef CONFIG_BITBANGMII - bb_miiphy_init(); -#endif -#if defined(CONFIG_CMD_NET) - puts("Net: "); - eth_initialize(); -#endif - -#ifdef CONFIG_GENERIC_ATMEL_MCI - mmc_initialize(gd->bd); -#endif - for (;;) { - main_loop(); - } -} -- cgit From 8aeed95626f03dbd9f86101c7f0b0867a71d1680 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 7 Jun 2015 15:26:42 +0200 Subject: sunxi: Request macpwr gpio before using it This fixes ethernet no longer working on boards which use a gpio to enable the phy. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- arch/arm/cpu/armv7/sunxi/board.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index a82c8b9d44..4b2494ea37 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -223,6 +223,7 @@ int cpu_eth_init(bd_t *bis) __maybe_unused int rc; #ifdef CONFIG_MACPWR + gpio_request(CONFIG_MACPWR, "macpwr"); gpio_direction_output(CONFIG_MACPWR, 1); mdelay(200); #endif -- cgit From 534f9d3feffdcccc0f21def87bb21b8aebb7ba30 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 6 May 2015 14:00:16 -0600 Subject: dm: tegra: usb: Move USB to driver model Somehow this change was dropped in the various merges. I noticed when I came to turn off the non-driver-model support for Tegra. We need to make this change (and deal with any problems) before going further. Change-Id: Ib9389a0d41008014eb0df0df98c27be65bc79ce6 Signed-off-by: Simon Glass Acked-by: Marek Vasut --- arch/arm/mach-tegra/Kconfig | 3 +++ arch/arm/mach-tegra/board2.c | 2 ++ 2 files changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 9b42871935..1fd6b6547e 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -24,6 +24,9 @@ config SYS_MALLOC_F_LEN config USE_PRIVATE_LIBGCC default y +config DM_USB + default y + config SPL_DM default y diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index ebcee4ed9a..8512afa792 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -161,7 +161,9 @@ int board_init(void) #ifdef CONFIG_USB_EHCI_TEGRA pin_mux_usb(); +# ifndef CONFIG_DM_USB usb_process_devicetree(gd->fdt_blob); +# endif #endif #ifdef CONFIG_LCD -- cgit From 4d24a11ee6aeba68fe4a8c94ed37019b773af2f3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 13 May 2015 07:02:25 -0600 Subject: arm: Allow cleanup_before_linux() without disabling caches This function is used before jumping to U-Boot, but in that case we don't always want to disable caches. Signed-off-by: Simon Glass Signed-off-by: Vadim Bendebury --- arch/arm/cpu/armv7/cpu.c | 47 +++++++++++++++++++++++++++++------------------ 1 file changed, 29 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index c56417dd2f..0b0e5003cc 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -24,7 +24,7 @@ void __weak cpu_cache_initialization(void){} -int cleanup_before_linux(void) +int cleanup_before_linux_select(int flags) { /* * this function is called just before we call linux @@ -42,24 +42,30 @@ int cleanup_before_linux(void) icache_disable(); invalidate_icache_all(); - /* - * turn off D-cache - * dcache_disable() in turn flushes the d-cache and disables MMU - */ - dcache_disable(); - v7_outer_cache_disable(); + if (flags & CBL_DISABLE_CACHES) { + /* + * turn off D-cache + * dcache_disable() in turn flushes the d-cache and disables MMU + */ + dcache_disable(); + v7_outer_cache_disable(); - /* - * After D-cache is flushed and before it is disabled there may - * be some new valid entries brought into the cache. We are sure - * that these lines are not dirty and will not affect our execution. - * (because unwinding the call-stack and setting a bit in CP15 SCTLR - * is all we did during this. We have not pushed anything on to the - * stack. Neither have we affected any static data) - * So just invalidate the entire d-cache again to avoid coherency - * problems for kernel - */ - invalidate_dcache_all(); + /* + * After D-cache is flushed and before it is disabled there may + * be some new valid entries brought into the cache. We are + * sure that these lines are not dirty and will not affect our + * execution. (because unwinding the call-stack and setting a + * bit in CP15 SCTRL is all we did during this. We have not + * pushed anything on to the stack. Neither have we affected + * any static data) So just invalidate the entire d-cache again + * to avoid coherency problems for kernel + */ + invalidate_dcache_all(); + } else { + flush_dcache_all(); + invalidate_icache_all(); + icache_enable(); + } /* * Some CPU need more cache attention before starting the kernel. @@ -68,3 +74,8 @@ int cleanup_before_linux(void) return 0; } + +int cleanup_before_linux(void) +{ + return cleanup_before_linux_select(CBL_ALL); +} -- cgit From 29748515fd7ba49fe027b39eb184b84f2890631e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 13 May 2015 07:02:26 -0600 Subject: sandbox: Add an implementation for cleanup_before_linux_select() Support this function so we can use Chrome OS verified boot with sandbox. Signed-off-by: Simon Glass --- arch/sandbox/cpu/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index 02c4cd366d..e6ddb17a14 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -52,6 +52,11 @@ int cleanup_before_linux(void) return 0; } +int cleanup_before_linux_select(int flags) +{ + return 0; +} + void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) { #ifdef CONFIG_PCI -- cgit From b65d5209b36f6a4c3d9b9b3009ca1ceaeedb40ba Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 12 May 2015 14:55:03 -0600 Subject: fdt: arm: Drop device tree padding The 4KB padding doesn't seem necessary since we don't normally adjust the control device tree file within U-Boot. Also drop the memory table space. Signed-off-by: Simon Glass --- arch/arm/dts/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index bc1421e1c3..9c735c672a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -138,7 +138,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \ targets += $(dtb-y) -DTC_FLAGS += -R 4 -p 0x1000 +# Add any required device tree compiler flags here +DTC_FLAGS += PHONY += dtbs dtbs: $(addprefix $(obj)/, $(dtb-y)) -- cgit From 47a785a9dd9725e0a1981ca0ebd50b37f35f07c6 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 12 May 2015 14:55:04 -0600 Subject: dts: Disable device tree for SPL on all boards We plan to enable device tree in SPL by default. Before doing this, explicitly disable it for all boards. Signed-off-by: Simon Glass --- arch/arm/Kconfig | 2 ++ arch/arm/cpu/armv7/exynos/Kconfig | 8 ++++++++ arch/arm/cpu/armv7/s5pc1xx/Kconfig | 2 ++ arch/arm/mach-tegra/Kconfig | 3 +++ 4 files changed, 15 insertions(+) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2985e6e065..fd47e60a90 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -668,6 +668,7 @@ config TEGRA select SUPPORT_SPL select SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL select CPU_V7 select DM select DM_SPI_FLASH @@ -794,6 +795,7 @@ config ARCH_UNIPHIER select DM select DM_SERIAL select DM_I2C + select SPL_DISABLE_OF_CONTROL help Support for UniPhier SoC family developed by Socionext Inc. (formerly, System LSI Business Division of Panasonic Corporation) diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index c61442578d..3ca7128ed7 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -8,6 +8,7 @@ config TARGET_SMDKV310 select SUPPORT_SPL bool "Exynos4210 SMDKV310 board" select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_TRATS bool "Exynos4210 Trats board" @@ -28,6 +29,7 @@ config TARGET_ODROID config TARGET_ODROID_XU3 bool "Exynos5422 Odroid board" select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_ARNDALE bool "Exynos5250 Arndale board" @@ -35,31 +37,37 @@ config TARGET_ARNDALE select CPU_V7_HAS_VIRT select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_SMDK5250 bool "SMDK5250 board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_SNOW bool "Snow board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_SMDK5420 bool "SMDK5420 board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_PEACH_PI bool "Peach Pi board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_PEACH_PIT bool "Peach Pit board" select SUPPORT_SPL select OF_CONTROL + select SPL_DISABLE_OF_CONTROL endchoice diff --git a/arch/arm/cpu/armv7/s5pc1xx/Kconfig b/arch/arm/cpu/armv7/s5pc1xx/Kconfig index 04acdaad79..792ef595e4 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/Kconfig +++ b/arch/arm/cpu/armv7/s5pc1xx/Kconfig @@ -7,10 +7,12 @@ choice config TARGET_S5P_GONI bool "S5P Goni board" select OF_CONTROL + select SPL_DISABLE_OF_CONTROL config TARGET_SMDKC100 bool "Support smdkc100 board" select OF_CONTROL + select SPL_DISABLE_OF_CONTROL endchoice diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 1fd6b6547e..f5b5ee9cb7 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -30,6 +30,9 @@ config DM_USB config SPL_DM default y +config SPL_DISABLE_OF_CONTROL + default y + source "arch/arm/mach-tegra/tegra20/Kconfig" source "arch/arm/mach-tegra/tegra30/Kconfig" source "arch/arm/mach-tegra/tegra114/Kconfig" -- cgit From 257bfd2e215ff02aacce23e14bf17b61524a723f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Mar 2015 12:23:06 -0600 Subject: dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass --- arch/arm/mach-tegra/board2.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 8512afa792..ce9b6959ef 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -161,9 +161,6 @@ int board_init(void) #ifdef CONFIG_USB_EHCI_TEGRA pin_mux_usb(); -# ifndef CONFIG_DM_USB - usb_process_devicetree(gd->fdt_blob); -# endif #endif #ifdef CONFIG_LCD -- cgit