From 511107d85d6f2739a641076acfb5646ba2a19fc8 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Wed, 12 Dec 2018 06:12:31 -0800 Subject: riscv: Implement riscv_get_time() API using rdtime instruction This adds an implementation of riscv_get_time() API that is using rdtime instruction. This is the case for S-mode U-Boot, and is useful for processors that support rdtime in M-mode too. Signed-off-by: Anup Patel Signed-off-by: Bin Meng Reviewed-by: Lukas Auer --- arch/riscv/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/riscv/Kconfig') diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index f513f52672..7dc6e3fad2 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -104,4 +104,12 @@ config SIFIVE_CLINT The SiFive CLINT block holds memory-mapped control and status registers associated with software and timer interrupts. +config RISCV_RDTIME + bool + default y if RISCV_SMODE + help + The provides the riscv_get_time() API that is implemented using the + standard rdtime instruction. This is the case for S-mode U-Boot, and + is useful for processors that support rdtime in M-mode too. + endmenu -- cgit