From 6f5f89f01195e2d009b317df27197a38fcab3553 Mon Sep 17 00:00:00 2001 From: Detlev Zundel Date: Thu, 1 Apr 2010 14:16:41 +0200 Subject: Remove unused "local_crc32" function. For code archeologists, this is a nice example of copy and paste history. Signed-off-by: Detlev Zundel Signed-off-by: Ben Warren --- arch/powerpc/cpu/mpc8220/fec.c | 41 +---------------------------------------- 1 file changed, 1 insertion(+), 40 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c index 992e0ffbc4..5df9735332 100644 --- a/arch/powerpc/cpu/mpc8220/fec.c +++ b/arch/powerpc/cpu/mpc8220/fec.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2003 + * (C) Copyright 2003-2010 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * This file is based on mpc4200fec.c, @@ -27,10 +27,6 @@ static void tfifo_print (char *devname, mpc8220_fec_priv * fec); static void rfifo_print (char *devname, mpc8220_fec_priv * fec); #endif /* DEBUG */ -#ifdef DEBUG -static u32 local_crc32 (char *string, unsigned int crc_value, int len); -#endif - typedef struct { u8 data[1500]; /* actual data */ int length; /* actual length */ @@ -962,39 +958,4 @@ int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data) return 0; } -#ifdef DEBUG -static u32 local_crc32 (char *string, unsigned int crc_value, int len) -{ - int i; - char c; - unsigned int crc, count; - - /* - * crc32 algorithm - */ - /* - * crc = 0xffffffff; * The initialized value should be 0xffffffff - */ - crc = crc_value; - - for (i = len; --i >= 0;) { - c = *string++; - for (count = 0; count < 8; count++) { - if ((c & 0x01) ^ (crc & 0x01)) { - crc >>= 1; - crc = crc ^ 0xedb88320; - } else { - crc >>= 1; - } - c >>= 1; - } - } - - /* - * In big endian system, do byte swaping for crc value - */ - return crc; -} -#endif /* DEBUG */ - #endif /* CONFIG_MPC8220_FEC */ -- cgit From 3882d7a5a57eb8d1f41570522445bab61c628e6f Mon Sep 17 00:00:00 2001 From: Norbert van Bolhuis Date: Fri, 19 Mar 2010 15:34:25 +0100 Subject: ppc: unused memory region too close to current stack pointer This avoids a possible overwrite of the (end of) ramdisk by u-boot. The unused memory region for ppc boot currently starts 1k below the do_bootm->bootm_start->arch_lmb_reserve stack ptr. This isn't enough since do_bootm->do_bootm_linux->boot_relocate_fdt calls printf which may very well use more than 1k stack space. Signed-off-by: Norbert van Bolhuis --- arch/powerpc/lib/bootm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index 0685a9331c..6702df51a5 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -163,8 +163,8 @@ void arch_lmb_reserve(struct lmb *lmb) sp = get_sp(); debug ("## Current stack ends at 0x%08lx\n", sp); - /* adjust sp by 1K to be safe */ - sp -= 1024; + /* adjust sp by 4K to be safe */ + sp -= 4096; lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - sp)); return ; -- cgit From e4a95d112e5ea8368bfbdac6ff963d1b8dc63cf0 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 28 Apr 2010 10:47:36 +0200 Subject: powerpc: Consolidate bootcount_{store|load} for PowerPC This patch consolidates bootcount_{store|load} for PowerPC by implementing a common version in arch/powerpc/lib/bootcount.c. This code is now used by all PowerPC variants that currently have these functions implemented. The functions now use the proper IO-accessor functions to read/write the values. This code also supports two different bootcount versions: a) Use 2 separate words (2 * 32bit) to store the bootcounter b) Use only 1 word (2 * 16bit) to store the bootcounter Version b) was already used by MPC5xxx. Signed-off-by: Stefan Roese Acked-by: Detlev Zundel Acked-by: Kim Phillips for 83xx parts Cc: Michael Zaidman Cc: Wolfgang Denk Cc: Kim Phillips Cc: Anatolij Gustschin --- arch/powerpc/cpu/mpc5xxx/cpu.c | 20 --------- arch/powerpc/cpu/mpc8260/commproc.c | 24 ---------- arch/powerpc/cpu/mpc83xx/cpu.c | 30 ------------- arch/powerpc/cpu/mpc8xx/commproc.c | 26 ----------- arch/powerpc/cpu/ppc4xx/commproc.c | 24 ---------- arch/powerpc/lib/Makefile | 1 + arch/powerpc/lib/bootcount.c | 90 +++++++++++++++++++++++++++++++++++++ 7 files changed, 91 insertions(+), 124 deletions(-) create mode 100644 arch/powerpc/lib/bootcount.c (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc5xxx/cpu.c b/arch/powerpc/cpu/mpc5xxx/cpu.c index b20234d32e..44b8a7a6d4 100644 --- a/arch/powerpc/cpu/mpc5xxx/cpu.c +++ b/arch/powerpc/cpu/mpc5xxx/cpu.c @@ -154,26 +154,6 @@ void ft_cpu_setup(void *blob, bd_t *bd) } #endif -#ifdef CONFIG_BOOTCOUNT_LIMIT - -void bootcount_store (ulong a) -{ - volatile ulong *save_addr = (volatile ulong *) (MPC5XXX_CDM_BRDCRMB); - - *save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) | a; -} - -ulong bootcount_load (void) -{ - volatile ulong *save_addr = (volatile ulong *) (MPC5XXX_CDM_BRDCRMB); - - if ((*save_addr & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) - return 0; - else - return (*save_addr & 0x0000ffff); -} -#endif /* CONFIG_BOOTCOUNT_LIMIT */ - #ifdef CONFIG_MPC5xxx_FEC /* Default initializations for FEC controllers. To override, * create a board-specific function called: diff --git a/arch/powerpc/cpu/mpc8260/commproc.c b/arch/powerpc/cpu/mpc8260/commproc.c index 111a67c98c..c522bc5c07 100644 --- a/arch/powerpc/cpu/mpc8260/commproc.c +++ b/arch/powerpc/cpu/mpc8260/commproc.c @@ -195,27 +195,3 @@ ulong post_word_load (void) } #endif /* CONFIG_POST || CONFIG_LOGBUFFER*/ - -#ifdef CONFIG_BOOTCOUNT_LIMIT - -void bootcount_store (ulong a) -{ - volatile ulong *save_addr = - (volatile ulong *)(CONFIG_SYS_IMMR + CPM_BOOTCOUNT_ADDR); - - save_addr[0] = a; - save_addr[1] = BOOTCOUNT_MAGIC; -} - -ulong bootcount_load (void) -{ - volatile ulong *save_addr = - (volatile ulong *)(CONFIG_SYS_IMMR + CPM_BOOTCOUNT_ADDR); - - if (save_addr[1] != BOOTCOUNT_MAGIC) - return 0; - else - return save_addr[0]; -} - -#endif /* CONFIG_BOOTCOUNT_LIMIT */ diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c index 8b98a57758..d3be909761 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu.c +++ b/arch/powerpc/cpu/mpc83xx/cpu.c @@ -304,33 +304,3 @@ int cpu_mmc_init(bd_t *bis) return 0; #endif } - -#ifdef CONFIG_BOOTCOUNT_LIMIT - -#if !defined(CONFIG_MPC8360) -#error "CONFIG_BOOTCOUNT_LIMIT only for MPC8360 implemented" -#endif - -#if !defined(CONFIG_BOOTCOUNT_ADDR) -#define CONFIG_BOOTCOUNT_ADDR (0x110000 + QE_MURAM_SIZE - 2 * sizeof(unsigned long)) -#endif - -#include - -void bootcount_store (ulong a) -{ - void *reg = (void *)(CONFIG_SYS_IMMR + CONFIG_BOOTCOUNT_ADDR); - out_be32 (reg, a); - out_be32 (reg + 4, BOOTCOUNT_MAGIC); -} - -ulong bootcount_load (void) -{ - void *reg = (void *)(CONFIG_SYS_IMMR + CONFIG_BOOTCOUNT_ADDR); - - if (in_be32 (reg + 4) != BOOTCOUNT_MAGIC) - return 0; - else - return in_be32 (reg); -} -#endif /* CONFIG_BOOTCOUNT_LIMIT */ diff --git a/arch/powerpc/cpu/mpc8xx/commproc.c b/arch/powerpc/cpu/mpc8xx/commproc.c index a87a0dce88..2c85377762 100644 --- a/arch/powerpc/cpu/mpc8xx/commproc.c +++ b/arch/powerpc/cpu/mpc8xx/commproc.c @@ -103,29 +103,3 @@ ulong post_word_load (void) } #endif /* CONFIG_POST || CONFIG_LOGBUFFER*/ - -#ifdef CONFIG_BOOTCOUNT_LIMIT - -void bootcount_store (ulong a) -{ - volatile ulong *save_addr = - (volatile ulong *)( ((immap_t *) CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + - CPM_BOOTCOUNT_ADDR ); - - save_addr[0] = a; - save_addr[1] = BOOTCOUNT_MAGIC; -} - -ulong bootcount_load (void) -{ - volatile ulong *save_addr = - (volatile ulong *)( ((immap_t *) CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + - CPM_BOOTCOUNT_ADDR ); - - if (save_addr[1] != BOOTCOUNT_MAGIC) - return 0; - else - return save_addr[0]; -} - -#endif /* CONFIG_BOOTCOUNT_LIMIT */ diff --git a/arch/powerpc/cpu/ppc4xx/commproc.c b/arch/powerpc/cpu/ppc4xx/commproc.c index a1696d37e6..6bf95e67b2 100644 --- a/arch/powerpc/cpu/ppc4xx/commproc.c +++ b/arch/powerpc/cpu/ppc4xx/commproc.c @@ -51,27 +51,3 @@ ulong post_word_load (void) } #endif /* CONFIG_POST || CONFIG_LOGBUFFER*/ - -#ifdef CONFIG_BOOTCOUNT_LIMIT - -void bootcount_store (ulong a) -{ - volatile ulong *save_addr = - (volatile ulong *)(CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_BOOTCOUNT_ADDR); - - save_addr[0] = a; - save_addr[1] = BOOTCOUNT_MAGIC; -} - -ulong bootcount_load (void) -{ - volatile ulong *save_addr = - (volatile ulong *)(CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_BOOTCOUNT_ADDR); - - if (save_addr[1] != BOOTCOUNT_MAGIC) - return 0; - else - return save_addr[0]; -} - -#endif /* CONFIG_BOOTCOUNT_LIMIT */ diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 334e457805..5f85502d1c 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -33,6 +33,7 @@ SOBJS-y += reloc.o COBJS-y += bat_rw.o COBJS-y += board.o COBJS-y += bootm.o +COBJS-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount.o COBJS-y += cache.o COBJS-y += extable.o COBJS-y += interrupts.o diff --git a/arch/powerpc/lib/bootcount.c b/arch/powerpc/lib/bootcount.c new file mode 100644 index 0000000000..6346527677 --- /dev/null +++ b/arch/powerpc/lib/bootcount.c @@ -0,0 +1,90 @@ +/* + * (C) Copyright 2010 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +/* + * Only override CONFIG_SYS_BOOTCOUNT_ADDR if not already defined. This + * way, some boards can define it directly in their config header. + */ +#if !defined(CONFIG_SYS_BOOTCOUNT_ADDR) + +#if defined(CONFIG_MPC5xxx) +#define CONFIG_SYS_BOOTCOUNT_ADDR (MPC5XXX_CDM_BRDCRMB) +#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD +#endif /* defined(CONFIG_MPC5xxx) */ + +#if defined(CONFIG_8xx) +#define CONFIG_SYS_BOOTCOUNT_ADDR (((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + \ + CPM_BOOTCOUNT_ADDR) +#endif /* defined(CONFIG_8xx) */ + +#if defined(CONFIG_MPC8260) +#include + +#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_IMMR + CPM_BOOTCOUNT_ADDR) +#endif /* defined(CONFIG_MPC8260) */ + +#if defined(CONFIG_MPC8360) +#include + +#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_IMMR + 0x110000 + \ + QE_MURAM_SIZE - 2 * sizeof(u32)) +#endif /* defined(CONFIG_MPC8360) */ + +#if defined(CONFIG_4xx) +#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_OCM_DATA_ADDR + \ + CONFIG_SYS_BOOTCOUNT_ADDR) +#endif /* defined(CONFIG_4xx) */ + +#endif /* !defined(CONFIG_SYS_BOOTCOUNT_ADDR) */ + +void bootcount_store(ulong a) +{ + void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR; + +#if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) + out_be32(reg, (BOOTCOUNT_MAGIC & 0xffff0000) | a); +#else + out_be32(reg, a); + out_be32(reg + 4, BOOTCOUNT_MAGIC); +#endif +} + +ulong bootcount_load(void) +{ + void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR; + +#if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) + if (in_be16(reg + 2) != (BOOTCOUNT_MAGIC & 0xffff)) + return 0; + else + return in_be16(reg); +#else + if (in_be32(reg + 4) != BOOTCOUNT_MAGIC) + return 0; + else + return in_be32(reg); +#endif +} -- cgit From 3b439792b0781921c599d8af9bed6a771d295b53 Mon Sep 17 00:00:00 2001 From: Ron Madrid Date: Wed, 28 Apr 2010 16:04:43 -0700 Subject: mpc83xx: Add UPMA configuration to SIMPC8313 Added UPM array table, upmconfig, and Local Bus configuration support for SIMPC8313 Signed-off-by: Ron Madrid Signed-off-by: Kim Phillips --- arch/powerpc/include/asm/fsl_lbc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/powerpc') diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index dfe8f793a3..03ae6a765b 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -245,6 +245,7 @@ #define MxMR_DSx_4_CYCL 0x00c00000 /* 4 cycle Disable Period */ #define MxMR_DSx_MSK 0x00c00000 /* Disable Timer Period Mask */ #define MxMR_AMx_MSK 0x07000000 /* Addess Multiplex Size Mask */ +#define MxMR_UWPL 0x08000000 /* LUPWAIT Polarity Mask */ #define MxMR_OP_NORM 0x00000000 /* Normal Operation */ #define MxMR_OP_WARR 0x10000000 /* Write to Array */ #define MxMR_OP_RARR 0x20000000 /* Read from Array */ -- cgit From 6ab4011b796e0af130ca160ea3c674d462f3bec4 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 20 Apr 2010 10:20:33 -0500 Subject: 85xx: Add is_serdes_configured() support to MPC8536 SERDES Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c | 79 +++++++++++++++++++++++++++++-- arch/powerpc/include/asm/fsl_serdes.h | 53 ++++++++++++++++----- 2 files changed, 114 insertions(+), 18 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c index cb6a6f00c9..7e72f5fb7c 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c @@ -1,17 +1,31 @@ /* - * Copyright (C) 2008 Freescale Semicondutor, Inc. + * Copyright 2008,2010 Freescale Semiconductor, Inc. * Dave Liu * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA */ #include #include #include #include +#include /* PORDEVSR register */ #define GUTS_PORDEVSR_OFFS 0xc @@ -52,6 +66,61 @@ #define FSL_SRDSCR3_LANEE_SGMII 0x00000000 #define FSL_SRDSCR3_LANEE_SATA 0x00150005 + +#define SRDS1_MAX_LANES 8 +#define SRDS2_MAX_LANES 2 + +static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { + [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE}, + [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1}, + [0x5] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2}, + [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3}, +}; + +static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { + [0x1] = {SATA1, SATA2}, + [0x3] = {SATA1, NONE}, + [0x4] = {SGMII_TSEC1, SGMII_TSEC3}, + [0x6] = {SGMII_TSEC1, NONE}, +}; + +int is_serdes_configured(enum srds_prtcl device) +{ + int i; + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 pordevsr = in_be32(&gur->pordevsr); + u32 srds1_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> + MPC85xx_PORDEVSR_IO_SEL_SHIFT; + + u32 srds2_cfg = (pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> + GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT; + + debug("%s: dev = %d\n", __FUNCTION__, device); + debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg); + debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_cfg); + + if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg); + return 0; + } + + if (srds2_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) { + printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_cfg); + return 0; + } + + for (i = 0; i < SRDS1_MAX_LANES; i++) { + if (serdes1_cfg_tbl[srds1_cfg][i] == device) + return 1; + } + for (i = 0; i < SRDS2_MAX_LANES; i++) { + if (serdes2_cfg_tbl[srds2_cfg][i] == device) + return 1; + } + + return 0; +} + void fsl_serdes_init(void) { void *guts = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h index 6da4b6ff94..d4839f4673 100644 --- a/arch/powerpc/include/asm/fsl_serdes.h +++ b/arch/powerpc/include/asm/fsl_serdes.h @@ -1,21 +1,48 @@ +/* + * Copyright 2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + #ifndef __FSL_SERDES_H #define __FSL_SERDES_H #include -#define FSL_SERDES_CLK_100 (0 << 28) -#define FSL_SERDES_CLK_125 (1 << 28) -#define FSL_SERDES_CLK_150 (3 << 28) -#define FSL_SERDES_PROTO_SATA 0 -#define FSL_SERDES_PROTO_PEX 1 -#define FSL_SERDES_PROTO_PEX_X2 2 -#define FSL_SERDES_PROTO_SGMII 3 -#define FSL_SERDES_VDD_1V 1 +enum srds_prtcl { + NONE = 0, + PCIE1, + PCIE2, + PCIE3, + PCIE4, + SATA1, + SATA2, + SRIO1, + SRIO2, + SGMII_FM1, + SGMII_FM2, + SGMII_TSEC1, + SGMII_TSEC2, + SGMII_TSEC3, + SGMII_TSEC4, + XAUI_FM1, + XAUI_FM2, + AURORA, +}; -#ifdef CONFIG_FSL_SERDES -extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd); -#else -static void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd) {} -#endif /* CONFIG_FSL_SERDES */ +int is_serdes_configured(enum srds_prtcl device); #endif /* __FSL_SERDES_H */ -- cgit From 54648985e2a64e29784e3ed37cd45b637305cd65 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 20 Apr 2010 10:21:12 -0500 Subject: 85xx/mpc8536ds: Use is_serdes_configured() to determine of PCIe enabled The new is_serdes_configured covers a broader range of devices than the PCI specific code. Use it instead as we convert away from the is_fsl_pci_cfg() code. Additionally move to setting LAWs for PCI based on if its configured. Also updated PCI FDT fixup code to remove PCI controllers from dtb if they are configured. Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc8xxx/pci_cfg.c | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c index 85995cac95..186936f23e 100644 --- a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c +++ b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c @@ -56,18 +56,6 @@ static struct pci_info pci_config_info[] = #elif defined(CONFIG_MPC8536) static struct pci_info pci_config_info[] = { - [LAW_TRGT_IF_PCI] = { - .cfg = 0, - }, - [LAW_TRGT_IF_PCIE_1] = { - .cfg = (1 << 2) | (1 << 3) | (1 << 5) | (1 << 7), - }, - [LAW_TRGT_IF_PCIE_2] = { - .cfg = (1 << 5) | (1 << 7), - }, - [LAW_TRGT_IF_PCIE_3] = { - .cfg = (1 << 7), - }, }; #elif defined(CONFIG_MPC8544) static struct pci_info pci_config_info[] = -- cgit From f54fe87acedbbad7d29ad18cab31d2b323717514 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 20 Apr 2010 10:21:25 -0500 Subject: 85xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabled On the MPC85xx platform if we have SATA its connected on SERDES. Determing if SATA is enabled via sata_initialize should not be board specific and thus we move it out of the MPC8536DS board code. Additionally, now that we have is_serdes_configured() we can determine if the given SATA port is enabled and error out if its not in the driver. Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index e578b296df..99431dc1a7 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -1,5 +1,5 @@ /* - * Copyright 2007-2009 Freescale Semiconductor, Inc. + * Copyright 2007-2010 Freescale Semiconductor, Inc. * * (C) Copyright 2003 Motorola Inc. * Modified by Xianghua Xiao, X.Xiao@motorola.com @@ -30,9 +30,11 @@ #include #include #include +#include #include #include #include +#include #include "mp.h" DECLARE_GLOBAL_DATA_PTR; @@ -418,3 +420,13 @@ void arch_preboot_os(void) setup_ivors(); } + +#if defined(CONFIG_CMD_SATA) && defined(CONFIG_FSL_SATA) +int sata_initialize(void) +{ + if (is_serdes_configured(SATA1) || is_serdes_configured(SATA2)) + return __sata_initialize(); + + return 1; +} +#endif -- cgit From bcb6c2bb84705bfd73eed5c9a31e9ff24833ee8c Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 7 May 2010 09:12:01 -0500 Subject: Enabled support for Rev 1.3 SPD for DDR2 DIMMs SPD has minor change from Rev 1.2 to 1.3. This patch enables Rev 1.3. The difference has ben examined and the code is compatible. Speed bins is not verified on hardware for CL7 at this moment. This patch also enables SPD Rev 1.x where x is up to "F". According to SPD spec, the lower nibble is optionally used to determine which additinal bytes or attribute bits have been defined. Software can safely use defaults. However, the upper nibble should always be checked. Signed-off-by: York Sun Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c index d9d0fa70ee..dcb37cea1f 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c @@ -175,8 +175,8 @@ determine_refresh_rate_ps(const unsigned int spd_refresh) * ordinal 2, ddr2_speed_bins[1] contains tCK for CL=3 * Not certain if any good value exists for CL=2 */ - /* CL2 CL3 CL4 CL5 CL6 */ -unsigned short ddr2_speed_bins[] = { 0, 5000, 3750, 3000, 2500 }; + /* CL2 CL3 CL4 CL5 CL6 CL7*/ +unsigned short ddr2_speed_bins[] = { 0, 5000, 3750, 3000, 2500, 1875 }; unsigned int compute_derated_DDR2_CAS_latency(unsigned int mclk_ps) -- cgit From a4bfc4cc466473b97c7fe84bdf261b2935887e3f Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Fri, 14 May 2010 13:18:54 -0500 Subject: mpc83xx: fix NAND bootstrap too big error commit 167cdad1372917bc11c636c359aad02625291fa9 "SERIAL: Enable port-mapped access" inadvertently broke 83xx nand boards by converting NS16550_init to use io accessors, which expanded the size of the generated code. this patch fixes the problem by removing icache functions from the nand builds, which somewhat follows commit 1a2e203b31d33fb720f2cf1033b241ad36ab405a "mpc83xx: turn on icache in core initialization to improve u-boot boot time" Signed-off-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/start.S | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index a7c80792de..1b3d618f49 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -739,6 +739,7 @@ setup_bats: * Note: requires that all cache bits in * HID0 are in the low half word. */ +#ifndef CONFIG_NAND_SPL .globl icache_enable icache_enable: mfspr r3, HID0 @@ -767,6 +768,7 @@ icache_status: mfspr r3, HID0 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31 blr +#endif /* !CONFIG_NAND_SPL */ .globl dcache_enable dcache_enable: -- cgit From f6970d0c545b9134af3b347c75ee3d13545b36d8 Mon Sep 17 00:00:00 2001 From: Horst Kronstorfer Date: Tue, 18 May 2010 10:37:05 +0200 Subject: Fixed two typos in arch/powerpc/cpu/mpc83xx/start.S. Signed-off-by: Horst Kronstorfer Signed-off-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/start.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 1b3d618f49..c7d85a878e 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -507,7 +507,7 @@ init_e300_core: /* time t 10 */ lis r3, CONFIG_SYS_IMMR@h #if defined(CONFIG_WATCHDOG) - /* Initialise the Wathcdog values and reset it (if req) */ + /* Initialise the Watchdog values and reset it (if req) */ /*------------------------------------------------------*/ lis r4, CONFIG_SYS_WATCHDOG_VALUE ori r4, r4, (SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR) @@ -520,7 +520,7 @@ init_e300_core: /* time t 10 */ li r4, -0x55C7 sth r4, SWSRR@l(r3) #else - /* Disable Wathcdog */ + /* Disable Watchdog */ /*-------------------*/ lwz r4, SWCRR(r3) /* Check to see if its enabled for disabling -- cgit From 71bd860cce4493c5def07804723661e75271052b Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Wed, 19 May 2010 17:06:46 -0500 Subject: mpc83xx: don't shift pre-shifted ACR, SPCR, SCCR bitfield masks in cpu_init.c commit c7190f028fa950d4d36b6d0b4bb3fc72602ec54c "mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields" incorrectly shifted _ (e.g. ACR_PIPE_DEP) values that were preshifted by their definition in mpc83xx.h. this patch removes the unnecessary shifting for the newly utilized mask values in cpu_init.c, and prevents seemingly unrelated symptoms such as an mpc8379erdb board from locking up whilst performing a networking operation, e.g. a tftp. Signed-off-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/cpu_init.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index 75b45222bd..f3b67ae2b9 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -65,16 +65,16 @@ void cpu_init_f (volatile immap_t * im) { __be32 acr_mask = #ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */ - (ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT) | + ACR_PIPE_DEP | #endif #ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */ - (ACR_RPTCNT << ACR_RPTCNT_SHIFT) | + ACR_RPTCNT | #endif #ifdef CONFIG_SYS_ACR_APARK /* Arbiter address parking mode */ - (ACR_APARK << ACR_APARK_SHIFT) | + ACR_APARK | #endif #ifdef CONFIG_SYS_ACR_PARKM /* Arbiter parking master */ - (ACR_PARKM << ACR_PARKM_SHIFT) | + ACR_PARKM | #endif 0; __be32 acr_val = @@ -93,16 +93,16 @@ void cpu_init_f (volatile immap_t * im) 0; __be32 spcr_mask = #ifdef CONFIG_SYS_SPCR_OPT /* Optimize transactions between CSB and other dev */ - (SPCR_OPT << SPCR_OPT_SHIFT) | + SPCR_OPT | #endif #ifdef CONFIG_SYS_SPCR_TSECEP /* all eTSEC's Emergency priority */ - (SPCR_TSECEP << SPCR_TSECEP_SHIFT) | + SPCR_TSECEP | #endif #ifdef CONFIG_SYS_SPCR_TSEC1EP /* TSEC1 Emergency priority */ - (SPCR_TSEC1EP << SPCR_TSEC1EP_SHIFT) | + SPCR_TSEC1EP | #endif #ifdef CONFIG_SYS_SPCR_TSEC2EP /* TSEC2 Emergency priority */ - (SPCR_TSEC2EP << SPCR_TSEC2EP_SHIFT) | + SPCR_TSEC2EP | #endif 0; __be32 spcr_val = @@ -121,34 +121,34 @@ void cpu_init_f (volatile immap_t * im) 0; __be32 sccr_mask = #ifdef CONFIG_SYS_SCCR_ENCCM /* Encryption clock mode */ - (SCCR_ENCCM << SCCR_ENCCM_SHIFT) | + SCCR_ENCCM | #endif #ifdef CONFIG_SYS_SCCR_PCICM /* PCI & DMA clock mode */ - (SCCR_PCICM << SCCR_PCICM_SHIFT) | + SCCR_PCICM | #endif #ifdef CONFIG_SYS_SCCR_TSECCM /* all TSEC's clock mode */ - (SCCR_TSECCM << SCCR_TSECCM_SHIFT) | + SCCR_TSECCM | #endif #ifdef CONFIG_SYS_SCCR_TSEC1CM /* TSEC1 clock mode */ - (SCCR_TSEC1CM << SCCR_TSEC1CM_SHIFT) | + SCCR_TSEC1CM | #endif #ifdef CONFIG_SYS_SCCR_TSEC2CM /* TSEC2 clock mode */ - (SCCR_TSEC2CM << SCCR_TSEC2CM_SHIFT) | + SCCR_TSEC2CM | #endif #ifdef CONFIG_SYS_SCCR_TSEC1ON /* TSEC1 clock switch */ - (SCCR_TSEC1ON << SCCR_TSEC1ON_SHIFT) | + SCCR_TSEC1ON | #endif #ifdef CONFIG_SYS_SCCR_TSEC2ON /* TSEC2 clock switch */ - (SCCR_TSEC2ON << SCCR_TSEC2ON_SHIFT) | + SCCR_TSEC2ON | #endif #ifdef CONFIG_SYS_SCCR_USBMPHCM /* USB MPH clock mode */ - (SCCR_USBMPHCM << SCCR_USBMPHCM_SHIFT) | + SCCR_USBMPHCM | #endif #ifdef CONFIG_SYS_SCCR_USBDRCM /* USB DR clock mode */ - (SCCR_USBDRCM << SCCR_USBDRCM_SHIFT) | + SCCR_USBDRCM | #endif #ifdef CONFIG_SYS_SCCR_SATACM /* SATA controller clock mode */ - (SCCR_SATACM << SCCR_SATACM_SHIFT) | + SCCR_SATACM | #endif 0; __be32 sccr_val = -- cgit From 59dde44acb82e571808190ccd3cd6b82dc9d7001 Mon Sep 17 00:00:00 2001 From: Michael Weiss Date: Thu, 20 May 2010 16:09:35 +0200 Subject: powerpc/bootcount: Fix endianness problem For CONFIG_SYS_BOOTCOUNT_SINGLEWORD the code had an endianness problem. Signed-off-by: Michael Weiss Signed-off-by: Detlev Zundel --- arch/powerpc/lib/bootcount.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/lib/bootcount.c b/arch/powerpc/lib/bootcount.c index 6346527677..338c8486d7 100644 --- a/arch/powerpc/lib/bootcount.c +++ b/arch/powerpc/lib/bootcount.c @@ -77,10 +77,12 @@ ulong bootcount_load(void) void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR; #if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) - if (in_be16(reg + 2) != (BOOTCOUNT_MAGIC & 0xffff)) + u32 tmp = in_be32(reg); + + if ((tmp & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) return 0; else - return in_be16(reg); + return (tmp & 0x0000ffff); #else if (in_be32(reg + 4) != BOOTCOUNT_MAGIC) return 0; -- cgit From 6ece2550d1c0c5c811b302b1639ea35c2e485203 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 21 May 2010 04:17:48 -0500 Subject: Convert Makefiles from COBJS-${} to COBJS-$() Match style we use almost everywhere else Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc512x/Makefile | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile index 9cfdb0f35d..28926e0d24 100644 --- a/arch/powerpc/cpu/mpc512x/Makefile +++ b/arch/powerpc/cpu/mpc512x/Makefile @@ -37,11 +37,11 @@ COBJS-y += interrupts.o COBJS-y += iopin.o COBJS-y += serial.o COBJS-y += speed.o -COBJS-${CONFIG_FSL_DIU_FB} += diu.o -COBJS-${CONFIG_FSL_DIU_FB} += ../../../../board/freescale/common/fsl_diu_fb.o -COBJS-${CONFIG_FSL_DIU_FB} += ../../../../board/freescale/common/fsl_logo_bmp.o -COBJS-${CONFIG_CMD_IDE} += ide.o -COBJS-${CONFIG_IIM} += iim.o +COBJS-$(CONFIG_FSL_DIU_FB) += diu.o +COBJS-$(CONFIG_FSL_DIU_FB) += ../../../../board/freescale/common/fsl_diu_fb.o +COBJS-$(CONFIG_FSL_DIU_FB) += ../../../../board/freescale/common/fsl_logo_bmp.o +COBJS-$(CONFIG_CMD_IDE) += ide.o +COBJS-$(CONFIG_IIM) += iim.o COBJS-$(CONFIG_PCI) += pci.o COBJS := $(COBJS-y) -- cgit