From 2c451f7831208741d0ff7ca6046cffcd9ee49def Mon Sep 17 00:00:00 2001 From: Aneesh V Date: Thu, 16 Jun 2011 23:30:47 +0000 Subject: armv7: cache maintenance operations for armv7 - Add a framework for layered cache maintenance - separate out SOC specific outer cache maintenance from maintenance of caches known to CPU - Add generic ARMv7 cache maintenance operations that affect all caches known to ARMv7 CPUs. For instance in Cortex-A8 these opertions will affect both L1 and L2 caches. In Cortex-A9 these will affect only L1 cache - D-cache operations supported: - Invalidate entire D-cache - Invalidate D-cache range - Flush(clean & invalidate) entire D-cache - Flush D-cache range - I-cache operations supported: - Invalidate entire I-cache - Add maintenance functions for TLB, branch predictor array etc. - Enable -march=armv7-a so that armv7 assembly instructions can be used Signed-off-by: Aneesh V --- arch/arm/cpu/armv7/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/cpu/armv7/Makefile') diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 8c0e915003..299792ac5a 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).o START := start.o -COBJS := cpu.o +COBJS := cpu.o cache_v7.o COBJS += syslib.o SRCS := $(START:.o=.S) $(COBJS:.o=.c) -- cgit