From f27d73e941525cab15682f2aea1673f5f943a128 Mon Sep 17 00:00:00 2001 From: Zhao Qiang Date: Fri, 10 Jul 2020 16:55:18 +0800 Subject: Watchdog: introduce ARM SBSA watchdog driver According to Server Base System Architecture (SBSA) specification, the SBSA Generic Watchdog has two stage timeouts: the first signal (WS0) is for alerting the system by interrupt, the second one (WS1) is a real hardware reset. More details about the hardware specification of this device: ARM DEN0029B - Server Base System Architecture (SBSA) This driver can operate ARM SBSA Generic Watchdog as a single stage In the single stage mode, when the timeout is reached, your system will be reset by WS1. The first signal (WS0) is ignored. Signed-off-by: Zhao Qiang Signed-off-by: Biwen Li Reviewed-by: Stefan Roese Reviewed-by: Priyanka Jain --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 6316c6ca00..4c84c4da54 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -689,6 +689,7 @@ M: Priyanka Jain S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git F: drivers/watchdog/sp805_wdt.c +F: drivers/watchdog/sbsa_gwdt.c I2C M: Heiko Schocher -- cgit