From f455d78a197d7d30b0ffe2c5a94878d9e3abc782 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 1 Dec 2019 02:33:40 +0100 Subject: ARM: rmobile: Convert Gen2 Blanche to DM_SPI{,_FLASH} Enable DM_SPI and DM_SPI_FLASH in U-Boot on V2H Blanche. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- configs/blanche_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 5c7b517e7c..64b7bccfb4 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -24,7 +24,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_SDRAM=y -CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y @@ -53,7 +52,7 @@ CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x18000000 @@ -68,6 +67,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_SH_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y -- cgit From 061ef41fcf7744a56e0778f16e390fc8323e3383 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 21 Mar 2020 16:45:29 +0100 Subject: clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2 The fdtdec_get_addr() does not take into account values set in #address-cells and #size-cells , but assumes them to be 1 for 32bit systems and 2 for 64bit systems. This is true for most DTs, however there are exceptions. Switch to fdtdec_get_addr_size_auto_noparent(), which takes the #address/size-cells values into consideration, otherwise the reset controller node register offset is incorrectly parsed. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- drivers/clk/renesas/clk-rcar-gen2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index 13111b341a..bfd7620dae 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -291,7 +291,8 @@ int gen2_clk_probe(struct udevice *dev) if (ret < 0) return ret; - rst_base = fdtdec_get_addr(gd->fdt_blob, ret, "reg"); + rst_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, ret, "reg", + 0, NULL, false); if (rst_base == FDT_ADDR_T_NONE) return -EINVAL; -- cgit From fd2657314f6e06c7713967e380b5951abca86f6f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 21 Mar 2020 16:57:38 +0100 Subject: ARM: dts: rmobile: Add IIC3 node on Gen2 R8A7792 V2H Add IIC3 node from mainline Linux DT. This will be further updated in subsequent DT sync, however adding this node for now is sufficient and minimal change. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/dts/r8a7792.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/dts/r8a7792.dtsi b/arch/arm/dts/r8a7792.dtsi index 8e9eb4b704..6fd80e3541 100644 --- a/arch/arm/dts/r8a7792.dtsi +++ b/arch/arm/dts/r8a7792.dtsi @@ -444,6 +444,23 @@ status = "disabled"; }; + iic3: i2c@e60b0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7792", + "renesas,rcar-gen2-iic", + "renesas,rmobile-iic"; + reg = <0 0xe60b0000 0 0x425>; + interrupts = ; + clocks = <&cpg CPG_MOD 926>; + dmas = <&dmac0 0x77>, <&dmac0 0x78>, + <&dmac1 0x77>, <&dmac1 0x78>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + resets = <&cpg 926>; + status = "disabled"; + }; + dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7792", "renesas,rcar-dmac"; -- cgit From 9cf09c799a389c07d26104bb6ca2079dcc835f37 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 21 Mar 2020 16:57:50 +0100 Subject: ARM: dts: rmobile: Enable IIC3 on V2H Blanche Enable IIC3 to permit access to the PMIC. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/dts/r8a7792-blanche-u-boot.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dts b/arch/arm/dts/r8a7792-blanche-u-boot.dts index 3555663d64..30b27040f5 100644 --- a/arch/arm/dts/r8a7792-blanche-u-boot.dts +++ b/arch/arm/dts/r8a7792-blanche-u-boot.dts @@ -8,6 +8,10 @@ #include "r8a7792-blanche.dts" #include "r8a7792-u-boot.dtsi" +&iic3 { + status = "okay"; +}; + &scif0 { u-boot,dm-pre-reloc; }; -- cgit From 4666521d19df4421be1b3c1042ac7ecfb351f884 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 21 Mar 2020 16:57:58 +0100 Subject: ARM: rmobile: Implement PMIC reset on V2H Blanche Add code to reset the board through PMIC, by writing the required PMIC registers in the CPU reset handler. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- board/renesas/blanche/blanche.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c index 7232370d6f..471d80fc72 100644 --- a/board/renesas/blanche/blanche.c +++ b/board/renesas/blanche/blanche.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -355,4 +356,23 @@ int dram_init_banksize(void) void reset_cpu(ulong addr) { + struct udevice *dev; + const u8 pmic_bus = 6; + const u8 pmic_addr = 0x58; + u8 data; + int ret; + + ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev); + if (ret) + hang(); + + ret = dm_i2c_read(dev, 0x13, &data, 1); + if (ret) + hang(); + + data |= BIT(1); + + ret = dm_i2c_write(dev, 0x13, &data, 1); + if (ret) + hang(); } -- cgit From 264398b2ec5dd5ee045939e11e14caeece4c8dde Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 21 Mar 2020 17:38:57 +0100 Subject: ARM: rmobile: Only register ethernet on V2H Blanche if not DM_ETH If the DM_ETH is enabled, the board-specific ethernet registeration should be disabled, make it so. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- board/renesas/blanche/blanche.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c index 471d80fc72..c15387366c 100644 --- a/board/renesas/blanche/blanche.c +++ b/board/renesas/blanche/blanche.c @@ -314,6 +314,7 @@ int board_init(void) } /* Added for BLANCHE(R-CarV2H board) */ +#ifndef CONFIG_DM_ETH int board_eth_init(bd_t *bis) { int rc = 0; @@ -338,6 +339,7 @@ int board_eth_init(bd_t *bis) return rc; } +#endif int dram_init(void) { -- cgit