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| | * | usb: xhci: convert to TRB_LEN() and TRB_INTR_TARGET()Chunfeng Yun2020-10-011-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For normal TRB fields: use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK); and use TRB_INTR_TARGET(x) instead of (((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: convert to TRB_TYPE()Chunfeng Yun2020-10-011-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use TRB_TYPE(p) instead of ((p) << TRB_TYPE_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: convert to HCS_MAX_PORTS()Chunfeng Yun2020-10-011-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use HCS_MAX_PORTS(p) instead of ((p & HCS_MAX_PORTS_MASK) >> HCS_MAX_PORTS_SHIFT) Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: add quirks flag to support MediaTek xHCI 0.96Chunfeng Yun2020-10-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There some vendor quirks for MTK xHCI 0.96 host controller: 1. It defines some extra SW scheduling parameters for HW to minimize the scheduling effort for synchronous and interrupt endpoints. The parameters are put into reserved DWs of slot context and endpoint context. 2. Its TDS in Normal TRB defines a number of packets that remains to be transferred for a TD after processing all Max packets in all previous TRBs. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: create one unified function to calculate TRB TD remainderChunfeng Yun2020-10-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xhci versions 1.0 and later report the untransferred data remaining in a TD a bit differently than older hosts. We used to have separate functions for these, and needed to check host version before calling the right function. Now Mediatek host has an additional quirk on how it uses the TD Size field for remaining data. To prevent yet another function for calculating remainder we instead want to make one quirk friendly unified function. Porting from the Linux: c840d6ce772d("xhci: create one unified function to calculate TRB TD remainder.") 124c39371114("xhci: use boolean to indicate last trb in td remainder calculation") Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | usb: xhci: add a member hci_version in xhci_ctrl structChunfeng Yun2020-10-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a member to save xHCI version, it's used some times. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | Merge branch 'next' of git://git.denx.de/u-boot-sh into nextTom Rini2020-10-019-53/+259
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| | * | arm: dts: r8a774e1: Import DTS from Linux 5.9-rc4Biju Das2020-09-262-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import R8A774E1 (RZ/G2H) SoC DTSI and headers from upstream Linux kernel 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| | * | arm: dts: r8a774b1: Import DTS from Linux 5.9-rc4Biju Das2020-09-262-0/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import R8A774B1 (RZ/G2N) SoC DTSI and headers from upstream Linux kernel 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| | * | arm: dts: r8a774a1: Import DTS from Linux 5.9-rc4Biju Das2020-09-262-53/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize RZ/G2M SoC DTs with mainline Linux 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| | * | ARM: rmobile: Enable RPC on Salvator-X, ULCB, EbisuMarek Vasut2020-09-263-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the RPC Hyperflash driver on R8A7795,R8A7796,R8A77965 Salvator-X,ULCB and R8A77990 Ebisu. Note that to make the HF accessible, mainline ATF is mandatory and must be built with RCAR_RPC_HYPERFLASH_LOCKED=0 . Note that this is intended for development and testing convenience only and must be disabled in deployment for platform security reasons. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | | Merge branch '2020-09-30-assorted-network-improvements' into nextTom Rini2020-10-013-1/+100
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | - Generic UDP framework - TFTP fixes - dwc_eth_qos, smc911x, smc911x and mscc phy fixes
| | * | | sntp: use udp frameworkPhilippe Reynes2020-09-301-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commits update the support of sntp to use the framework udp. This change allows to remove all the reference to sntp in the main network file net/net.c. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * | | net: add a generic udp protocolPhilippe Reynes2020-09-302-1/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a generic udp protocol framework in the network loop. So protocol based on udp may be implemented without modifying the network loop (for example custom wait magic packet). Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | reset: add reset controller driver for SCMI agentsEtienne Carriere2020-09-301-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces a reset controller driver for SCMI agent devices. When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent binds a reset controller device for each SCMI reset domain protocol devices enabled in the FDT. SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If enabled, CONFIG_SCMI_AGENT is also enabled. SCMI Reset Domain protocol is defined in the SCMI specification [1]. Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | clk: add clock driver for SCMI agentsEtienne Carriere2020-09-301-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces a clock driver for SCMI agent devices. When SCMI agent and SCMI clock drivers are enabled, SCMI agent binds a clock device for each SCMI clock protocol devices enabled in the FDT. SCMI clock driver is embedded upon CONFIG_CLK_SCMI=y. If enabled, CONFIG_SCMI_AGENT is also enabled. SCMI Clock protocol is defined in the SCMI specification [1]. Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Lukasz Majewski <lukma@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | firmware: add SCMI agent uclassEtienne Carriere2020-09-304-0/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces SCMI agent uclass to interact with a firmware using the SCMI protocols [1]. SCMI agent uclass currently supports a single method to request processing of the SCMI message by an identified server. A SCMI message is made of a byte payload associated to a protocol ID and a message ID, all defined by the SCMI specification [1]. On return from process_msg() method, the caller gets the service response. SCMI agent uclass defines a post bind generic sequence for all devices. The sequence binds all the SCMI protocols listed in the FDT for that SCMI agent device. Currently none, but later change will introduce protocols. This change implements a simple sandbox device for the SCMI agent uclass. The sandbox nicely answers SCMI_NOT_SUPPORTED to SCMI messages. To prepare for further test support, the sandbox exposes a architecture function for test application to read the sandbox emulated devices state. Currently supports 2 SCMI agents, identified by an ID in the FDT device name. The simplistic DM test does nothing yet. SCMI agent uclass is designed for platforms that embed a SCMI server in a firmware hosted somewhere, for example in a companion co-processor or in the secure world of the executing processor. SCMI protocols allow an SCMI agent to discover and access external resources as clock, reset controllers and more. SCMI agent and server communicate following the SCMI specification [1]. This SCMI agent implementation complies with the DT bindings defined in the Linux kernel source tree regarding SCMI agent description since v5.8. Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | regmap: Add support for regmap fieldsJean-Jacques Hiblot2020-09-301-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A regmap field is an abstraction available in Linux. It provides to access bitfields in a regmap without having to worry about shifts and masks. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
| * | | | regmap: Allow devices to specify regmap range start and size in configPratyush Yadav2020-09-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices need to calculate the regmap base address at runtime. This makes it impossible to use device tree to get the regmap base. Instead, allow devices to specify it in the regmap config. This will create a regmap with a single range that corresponds to the start and size given by the driver. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | regmap: Add regmap_init_mem_range()Pratyush Yadav2020-09-301-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now, the base of a regmap can only be obtained from the device tree. This makes it impossible for devices which calculate the base at runtime to use a regmap. An example of such a device is the Cadence Sierra PHY. Allow creating a regmap with one range whose start and size can be specified by the driver based on calculations at runtime. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | regmap: Allow left shifting register offset before accessPratyush Yadav2020-09-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drivers can configure it to adjust the final read/write location. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | regmap: Allow specifying read/write widthPratyush Yadav2020-09-301-16/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now, regmap_read() and regmap_write() read/write a 32-bit value only. To write other lengths, regmap_raw_read() and regmap_raw_write() need to be used. This means that any driver ported from Linux that relies on regmap_{read,write}() to know the size already has to be updated at each callsite. This makes the port harder to maintain. So, allow specifying the read/write width to make it easier to port the drivers, since now the only change needed is when initializing the regmap. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | regmap: Add devm_regmap_init()Jean-Jacques Hiblot2020-09-301-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of new linux drivers are using managed-API to allocate resources. To ease porting drivers from linux to U-Boot, introduce devm_regmap_init() as a managed API to get a regmap from the device tree. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
| * | | | drivers: gpio: Add a managed API to get a GPIO from the device-treeJean-Jacques Hiblot2020-09-301-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add managed functions to get a gpio from the devce-tree, based on a property name (minus the '-gpios' suffix) and optionally an index. When the device is unbound, the GPIO is automatically released and the data structure is freed. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
| * | | | drivers: reset: Add a managed API to get reset controllers from the DTJean-Jacques Hiblot2020-09-301-1/+134
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add managed functions to get a reset_ctl from the device-tree, based on a name or an index. Also add a managed functions to get a reset_ctl_bulk (array of reset_ctl) from the device-tree. When the device is unbound, the reset controllers are automatically released and the data structure is freed. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
| * | | Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv ↵Tom Rini2020-09-302-0/+16
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next - Disable CMD_IRQ for RISC-V. - Update sipeed/maix doc - Obtain reg of SiFive RAM via dev_read_addr_index() instead of regmap API. - Cleans up RISC-V timer drivers and converts them to DM. - Correctly handle IPIs already pending upon prior stage bootloader (on the K210)
| | * | | riscv: clk: Add CLINT clock to kendryte clock driverSean Anderson2020-09-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Another "virtual" clock (in the sense that it isn't configurable). This could possibly be done as a clock in the device tree, but I think this is a bit cleaner. Signed-off-by: Sean Anderson <seanga2@gmail.com>
| | * | | timer: Add helper for drivers using timebase fallbackSean Anderson2020-09-301-0/+15
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is designed to be used when a timer used to be initialized by the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In such a case, the timer may prefer to use the clocks and clock-frequency properties, but should be able to fall back on using the cpu's timebase-frequency. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * | | dm: Print device name in dev_xxx like LinuxSean Anderson2020-09-301-28/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adorns messages generated by dev_xxx with the device and driver names. It also redirects dev_xxx to log when it is available. The names of these functions very roughly take inspiration from Linux, but there is no deeper correlation. Both struct udevice and struct device are supported when logging, though logging with struct device is no better than using log_xxx. The latter is supported because of the large amount of existing code which logs with struct device. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | dm: Use symbolic constants for log levels in dev_xxxSean Anderson2020-09-301-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This substitutes literal log levels with their symbolic constants. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | remoteproc: Remove unused function rproc_elf_sanity_checkSean Anderson2020-09-301-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is never used anywhere, and it also tries to log with a nonexistant device. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | linux/compat.h: Remove netdev_xxx functionsSean Anderson2020-09-301-19/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No drivers in U-Boot use these functions. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | mmc: Add mmc_dev()Sean Anderson2020-09-301-0/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | This macro is necessary for arasan_zynqmp_dll_reset to compile. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 ↵Tom Rini2020-09-2510-20/+683
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next - Enhance the 'zboot' command to be more like 'bootm' with sub-commands - The last series of ACPI core changes for programmatic generation of ACPI tables - Add all required ACPI tables for ApolloLake and enable ACPIGEN on Chromebook Coral - A feature minor enhancements to the 'hob' command - Intel edison: Support for writing an xFSTK image via binman
| | * | x86: video: Show information about each video deviceSimon Glass2020-09-251-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the 'bdinfo' command shows the framebuffer address, but not the address of the copy framebuffer, if present. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | acpi: Use I2cSerialBusV2() instead of I2cSerialBus()Simon Glass2020-09-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the correct name of the ACPI structure being created. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | acpi: Add more documentation for struct acpi_gpioSimon Glass2020-09-251-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some documentation provided by Andy Shevchenko to describe how to use struct acpi_gpio. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Move include of bitops out of ACPI regionSimon Glass2020-09-251-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present linux/bitops.h is included in ACPI code. This is not needed and can cause a problem in fls64.h since BITS_PER_LONG is not defined. Move the #include into the part not used by ACPI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | acpi: Use defines for field lengthsSimon Glass2020-09-251-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few fields have an open-coded length. Use the defines for this purpose instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| | * | acpi: tpm: Add a TPM1 tableSimon Glass2020-09-252-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides information about a v1 TPM in the system. Generate this table if the TPM is present. Add a required new bloblist type and correct the header order of one header file. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | acpi: tpm: Add a TPM2 tableSimon Glass2020-09-252-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides information about a v2 TPM in the system. Generate this table if the TPM is present. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: apl: Generate required ACPI tablesSimon Glass2020-09-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for generating various ACPI tables for Apollo Lake. Add a few S3 definitions that are needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | p2sb: Add some definitions used for ACPISimon Glass2020-09-251-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow this header to be included in ASL files by adding a header guard and a few definitions that are needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: acpi: Add support for additional Intel tablesSimon Glass2020-09-251-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Apollo Lake needs to generate a few more table types used on Intel SoCs. Add support for these into the x86 ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | acpi: Add more support for generating processor tablesSimon Glass2020-09-251-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | This adds tables relating to P-States and C-States. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | acpi: Add support for generating processor tablesSimon Glass2020-09-251-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ACPI has a number of CPU-related tables. Add utility functions to write out the basic packages. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: acpi: Support generation of the DBG2 tableSimon Glass2020-09-251-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an implementation of the DBG2 (Debug Port Table 2) ACPI table. Adjust one of the header includes to be in the correct order, before adding more. Note that the DBG2 table is generic but the PCI UART is x86-specific at present since it assumes an ns16550 UART. It can be generalised later if necessary. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: acpi: Support generation of the HPET tableSimon Glass2020-09-251-9/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an implementation of the HPET (High Precision Event Timer) ACPI table. Since this is x86-specific, put it in an x86-specific file Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: Add a few common Intel CPU functionsSimon Glass2020-09-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Add functions to query CPU information, needed for ACPI. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: apl: Add power-management definitionsSimon Glass2020-09-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SCI and power-state definitions required by ACPI tables. Fix the license to match the original source file. Als update the guard on acpi_pmc.h to avoid an error when buiding ASL. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2025-10-01 05:18:40 +0000