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| * | | | dm: gpio: Add a way to update flagsSimon Glass2021-03-031-6/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is convenient to be able to adjust some of the flags for a GPIO while leaving others alone. Add a function for this. Update dm_gpio_set_dir_flags() to make use of this. Also update dm_gpio_set_value() to use this also, since this allows the open-drain / open-source features to be implemented directly in the driver, rather than using the uclass workaround. Update the sandbox tests accordingly. This involves a lot of changes to dm_test_gpio_opendrain_opensource() since we no-longer have the direciion being reported differently depending on the open drain/open source flags. Also update the STM32 drivers to let the uclass handle the active low/high logic. Drop the GPIOD_FLAGS_OUTPUT() macro which is no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | | gpio: Rename dm_gpio_get_dir_flags() to dm_gpio_get_flags()Simon Glass2021-03-031-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function can be used to get any flags, not just direction flags. Rename it to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
| * | | | dm: gpio: Rename get_dir_flags() method to get_flags()Simon Glass2021-03-031-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is more useful to be able to read all the flags, not just the direction ones. In fact this is what the STM32 driver does. Update the method name to reflect this. Tweak the docs a little and use 'flagsp' as the return argument, as is common in driver model, to indicate it returns a value. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
| * | | | dm: gpio: Rename set_dir_flags() method to update_flags()Simon Glass2021-03-031-6/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current method is a misnomer since it is also used (e.g. by stm32) to update pull settings and open source/open drain. Rename it and expand the documentation to cover a few more details. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | | tpm: Allow disabling platform hierarchy with TPM2Simon Glass2021-03-021-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With TPM2 we don't actually lock the TPM once verified boot is finished. Instead we disable the platform hierarchy which serves the same purpose. Add an implementation of this so we can safely boot into the kernel. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
| * | | | tpm: Add TPM2 support for write_lockSimon Glass2021-03-021-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement this API function for TPM2. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
| * | | | tpm: Add TPM2 support for read/write valuesSimon Glass2021-03-022-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement this API function for TPM2. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
| * | | | tpm: Add an implementation of define_spaceSimon Glass2021-03-021-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for this so that the TPM can be set up for use with Chromium OS verified boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
| * | | | tpm: Switch TPMv1 over to use the new APISimon Glass2021-03-021-38/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Take over the plain 'tpm_...' functions for use by the new TPM API. Rename all the TPMv1 functions so they are called from the API. Update the TPMv1 functions so that they are called from the API. Change existing users to use the tpm1_ prefix so they don't need to go through the API, which might introduce uncertainty. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
| * | | | tpm: Add an API that can support v1.2 and v2Simon Glass2021-03-021-0/+322
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two different TPM standards. U-Boot supports both but each has its own set of functions. We really need a single TPM API that can call one or the other. This is not always possible as there are some differences between the two standards, but it is mostly possible. Add an API to handle this. So far it is not plumbed into the build and only supports TPMv1. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
| * | | | sandbox: Avoid using malloc() for system stateSimon Glass2021-03-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This state is not accessible to the running U-Boot but at present it is allocated in the emulated SDRAM. This doesn't seem very useful. Adjust it to allocate from the OS instead. The RAM buffer is currently not freed, but should be, so add that into state_uninit(). Update the comment for os_free() to indicate that NULL is a valid parameter value. Note that the strdup() in spl_board_load_image() is changed as well, since strdup() allocates memory in the RAM buffer. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | sandbox: Add os_realloc()Simon Glass2021-03-021-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We provide os_malloc() and os_free() but not os_realloc(). Add this, following the usual semantics. Also update os_malloc() to behave correctly when passed a zero size. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | | reset: Remove addr parameter from reset_cpu()Harald Seiler2021-03-022-3/+3
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | / imx8mn_ddr4_evk: Allow booting the kernel by defaultFabio Estevam2021-04-051-2/+2
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently it is not possible to boot Linux from the SD card by default. Make the necessary adjustments to allow it. Reported-by: Peter Bergin <peter@berginkonsult.se> Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Andrey Zhizhikin <andrey.z@gmail.com> # imx8mn_ddr4_evk Reviewed-by: Peng Fan <peng.fan@nxp.com>
* | | test: Add udevice declaration to avoid build errorSimon Glass2021-03-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | When including this file on a board other than sandbox (e.g by enabling UNIT_TEST and CMD_SETEXPR) an results. Fix it by declaring struct udevice first. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | configs: ls1028aqds: Move CONFIG_SPI_FLASH_* definitions to defconfigKuldeep Singh2021-03-231-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | LS1028A-QDS has CONFIG_SPI_FLASH_SST and CONFIG_SPI_FLASH_EON defines present in header. Move these entries from header to defconfigs. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | configs: lx2160a: Remove unused Flexspi config optionsKuldeep Singh2021-03-231-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | It is now safe to remove Flexspi configs NXP_FSPI_FLASH_SIZE and NXP_FSPI_FLASH_NUM options from headers as they are no longer used by driver anymore. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | fsl_ifc: fix typo in the NOR CSOR register definitionAleksandar Gerasimovski2021-03-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The name of the define must indicate 'Asynchronous', so 'ASYNC' is more appropriate. AYSNC is probably a typo, and checkpatch script is throwing a warning if this is set in the board include files. It is save to change this now as none of the existing designs is using it so far, but we will use it in our design it help to make IFC settings more transparent. Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | Merge tag 'efi-2021-04-rc5-2' of ↵Tom Rini2021-03-201-0/+10
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-efi Pull request efi-2021-04-rc5-2 Bug fixes: * re-enable loading UEFI binaries via UART * fix a NULL dereference in EFI console
| * | | efi_loader: Uart device pathHeinrich Schuchardt2021-03-191-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When uploading an EFI binary via the UART we need to assign a device path. * Provide devicepath node to text conversion for Uart() node. * Provide function to create Uart() device path. * Add UART support to efi_dp_from_name(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | | api: fix a potential serious bug caused by undef CONFIG_SYS_64BIT_LBAMarek Behún2021-03-191-5/+18
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The api_public.h header file undefined macro CONFIG_SYS_64BIT_LBA. But api/api_storage.c includes this header before including part.h, causing the type of lbaint_t and subsequently the type signature of blk_dread() and blk_dwrite() functions to change from the rest of U-Boot (if CONFIG_SYS_64BIT_LBA is defined for the board). This is of course wrong, because the call to blk_dread() / blk_dwrite() will receive mangled arguments. Fix this by removing the undef of macro CONFIG_SYS_64BIT_LBA and instead make the immediate code do what it would do as if the macro was not defined. Add a FIXME to whoever is maintaining this code. CI managed to trigger this bug when compiling for lsxhl_defconfig, which has CONFIG_API selected. The compiler complained about blk_dwrite() and blk_dread() not matching original declarations: include/blk.h:280:15: warning: type of ‘blk_dwrite’ does not match original declaration [-Wlto-type-mismatch] 280 | unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t st | ^ drivers/block/blk-uclass.c:456:15: note: type mismatch in parameter 2 456 | unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t st | ^ Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge tag 'video-for-v2021.04' of ↵Tom Rini2021-03-191-129/+129
|\ \ \ | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-video - drop unprintable characters from video font header
| * | | video: Drop unprintable characters from video_font_data.hSimon Glass2021-02-221-129/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This file contains characters which are not valid in utf-8. This confuses dtoc which wants to parse it. They don't really serve any purpose anyway, so drop them. To: U-Boot Mailing List <u-boot@lists.denx.de> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | image: Avoid -ENODATA in host toolsSimon Glass2021-03-171-1/+1
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | Unfortunately -ENODATA is not available in OpenBSD. Use -EBADMSG instead, to indicate a missing timestamp. Fixes: c5819701a3d image: Adjust the workings of fit_check_format() Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
* | | Merge tag 'ti-v2021.04-rc4' of ↵Tom Rini2021-03-152-2/+6
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-ti - Fix boot for da850-evm and omap3_logic - Optimize SPL size for am65x boards
| * | | include: configs: am65x_evm: Optimize size of SPL BSSLokesh Vutla2021-03-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current BSS allocation of SPL is as below: $ size spl/u-boot-spl text data bss dec hex filename 132369 7852 1496 141717 22995 spl/u-boot-spl But 20KB is allocated currently for BSS. Reduce it to 3KB and save some space for stack. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | | ARM: da850-evm: Fix boot issues from missing SPL_PAD_TOAdam Ford2021-03-151-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a previous attempt to unify config options and remove items from the whitelist file, SPL items were moved into a section enabled with CONFIG_SPL_BUILD. Unfortunately, SPL_PAD_TO is referenced at the head Makefile and uses this define to create padding of the output file. When it was moved to CONFIG_SPL_BUILD, it caused boot errors with devices that are not booting from NOR. Fix the boot issues by moving SPL_PAD_TO out so it's always. Fixes: 7bb33e4684aa ("ARM: da850-evm: Unify config options with Kconfig") Signed-off-by: Adam Ford <aford173@gmail.com>
* | | | Merge tag 'u-boot-stm32-20210312' of ↵Tom Rini2021-03-151-1/+0
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver - stm32mp1_trusted_defconfig rely on SCMI support - Remove the nand MTD configuration for NOR boot in stm32mp1 board - STM32programmer update - Bsec: manage clock when present in device tree - stm32mp15: move bootdelay configuration in defconfig - Update for stm32 dsi and dw_mipi_dsi - STM32 MCU's cleanup - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags - Update stm32mp1 doc
| * | | configs: stm32mp15: move bootdelay configuration in defconfigPatrick Delaunay2021-03-111-1/+0
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32MP15 boards have no reason to configure bootdelay in stm32mp1.h as it is already done with CONFIG_BOOTDELAY (default = 2) and in include/env_default.h. This patch allows configuration for customers which reuse stm32mp1.h and reduce the size of the default environment. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | | Merge tag 'u-boot-amlogic-20210308' of ↵Tom Rini2021-03-081-0/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - button: adc: fix treshold typo - configs: meson64: add fdtoverlay_addr_r
| * | | configs: meson64: add fdtoverlay_addr_rNeil Armstrong2021-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support loading FTD Overlays when booting with the pxe command (or extlinux.conf), supported with [1], add the missing fdtoverlay_addr_r used to load the overlay before applying it to the FDT loaded at fdt_addr_r. [1] https://patchwork.ozlabs.org/project/uboot/patch/20210120085453.2783678-1-narmstrong@baylibre.com/ Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | | | Merge branch 'v2021.04-rc4' of https://github.com/lftan/u-bootTom Rini2021-03-081-8/+2
|\ \ \ \ | | | | | | | | | | | | | | | - Add VAB support
| * | | | Makefile: socfpga: Add target to generate hex output for combined spl and dtbDalon Westergreen2021-03-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex" is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to generate the final configuration bitstream for Intel SOCFPGA SOC64 devices. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
| * | | | configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfigSiew Chin Lim2021-03-081-7/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to *_defconfig file for both Stratix 10 and Agilex. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
* | | | lib/charset: UTF-8 stream conversionHeinrich Schuchardt2021-03-071-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide functions to convert an UTF-8 stream to code page 437 or UTF-32. Add unit tests. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | | efi_loader: carve out utf_to_cp()Heinrich Schuchardt2021-03-071-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Carve out a function to translate a Unicode code point to an 8bit codepage. Provide a unit test for the new function. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | | efi_loader: move codepage 437 tableHeinrich Schuchardt2021-03-071-0/+5
|/ / / | | | | | | | | | | | | | | | Move the Unicode to codepage 437 table to charset.c Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | ppc: qemu: Drop a custom env variable 'fdt_addr_r'Bin Meng2021-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have switched to CONFIG_OF_CONTROL, and we can use the env variable 'fdtcontroladdr' directly instead of creating one that is duplicated. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | ppc: qemu: Enable RTC support via I2CBin Meng2021-03-051-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The QEMU ppce500 target integrates a Freescale I2C controller and has a Pericom pt7c4338 RTC connected to it. Enable corresponding DM drivers so that 'date' command is actually useful. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | ppc: qemu: Switch over to use DM ETH and PCIBin Meng2021-03-051-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the board supports non-DM version PCI and E1000 drivers. Switch over to use DM ETH and PCI by: - Rewrite the PCI address map functions using DM APIs - Enable CONFIG_MISC_INIT_R to do the PCI initialization and address map - Drop unnecessary ad-hoc config macros - Remove board_eth_init() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | ppc: qemu: Switch over to use DM serialBin Meng2021-03-051-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch over to use the DM version of the driver by: - drop unnecessary ad-hoc config macros - add get_serial_clock() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | test: cmd: Add a basic test for 'addrmap' commandBin Meng2021-03-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a basic test for the newly introduced 'addrmap' command. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> [Rebase] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | lib: addr_map: Move address_map[] type to the header fileBin Meng2021-03-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present address_map[] is static and its type is unknown to external modules. In preparation to create a command to list its contents, this patch moves its type definition and declaration to the header file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | include: Remove extern from addr_map.hBin Meng2021-03-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Remove the extern of the header because they are useless. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | ppc: qemu: Fix CONFIG_SYS_PCI_MAP_ENDBin Meng2021-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_PCI_MAP_END currently points to 0xe8000000, which means the upper end of the virtual address mapped to PCI bus address ends at 0xe8000000. But this is wrong as the CCSBAR was already mapped at 0xe0000000 with a 1 MiB size. Fixes: fa08d3951777 ("PPC 85xx: Add qemu-ppce500 machine") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | configs: fsl: move via specific defines to KconfigRajesh Bhagat2021-03-053-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moves below via specific defines to Kconfig: CONFIG_FSL_VIA Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | arm: fsl: common: Improve NXP VID driver PMBus supportStephen Carlson2021-03-052-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for more PMBus compatible devices to the NXP drivers for its QorIQ family devices. At runtime, the voltage regulator is queried over I2C, and the required voltage multiplier determined. This change supports the DIRECT and LINEAR PMBus voltage reporting modes. Previously, the driver only supported a few specific devices such as the IR36021 and LTC3882, so this change allows the QorIQ series to be used with a much larger variety of core voltage regulator devices. checkpatch warning "Use if (IS_DEFINED (...))" was ignored to maintain consistency with the existing code. Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com> Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Tested-by: Wasim Khan <wasim.khan@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | Merge tag 'u-boot-imx-20210303' of ↵Tom Rini2021-03-0312-30/+135
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2021.04 ---------------- - new boards: - i.MX8MN Beacon EmbeddedWorks (2GB) - Gateworks Venice imx8mm - convert to DM: - imx53-qsb, mx53loco, mx51evk, mx23-evk - Fixes : - Network : FEC ethernet quirks - DH dh-imx6 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
| * | | board: gateworks: imx8mm: Add Gateworks Venice board supportTim Harvey2021-03-031-0/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Gateworks Venice product family based on the i.MX 8M Mini SoC Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | | imx: Add 2GB lpddr support for i.MX8MN Beacon EmbeddedWorks devkit.Adam Ford2021-03-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a second lpddr configuration with 2GB of RAM, but this requires different RAM timings, so in addition to adding the timing file, a separate defconfig is necessary. Signed-off-by: Adam Ford <aford173@gmail.com>
generated by cgit (git 2.34.1) at 2025-09-27 21:14:55 +0000