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| * | uclass: cpu: Add new API to get udevice for current CPUPeng Fan2020-05-031-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running on SoC with multiple clusters, the boot CPU may not be fixed, saying booting from cluster A or cluster B. Add a API that can return the udevice for current boot CPU. Cpu driver needs to implement is_current_cpu interface for this feature, otherwise the API only returns the first udevice in cpu uclass. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* | | iopoll: Add readl_poll_sleep_timeoutJagan Teki2020-05-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add readl poll API with sleep and timeout support. This change is referenced from Linux from below commit: commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll: introduce read_poll_timeout macro") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | | iopoll: Add dealy to read pollJagan Teki2020-05-111-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some drivers and other bsp code not only poll the register with timeout but also required to delay on each transaction. This patch add that requirement by adding sleep_us variable so-that read_poll_timeout now support delay as well. This change is referenced from Linux from below commit: commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll: introduce read_poll_timeout macro") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | | iopoll: Add read_poll_timeout common APIJagan Teki2020-05-111-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add read_poll_timeout common API similar to Linux iopoll. readx_poll_timeout will trigger read_poll_timeout with proper op. This will help to extend the functionalities like sleep_us to poll timeout in future. This change is referenced from Linux from below commit: commit <5f5323a14cad19323060a8cbf9d96f2280a462dd> ("iopoll: introduce read_poll_timeout macro") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | | clk: Fix clk func names in commentsJagan Teki2020-05-111-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk function names in comments should be prefix with clk instead of clock. Fix it. Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | phy: Use _nodev naming convention if non-device clientsJagan Teki2020-05-111-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clients that are requesting some of uclass API's without a device (with ofnode) usually have _nodev naming convention. - clk_get_by_index_nodev - clk_get_by_name_nodev - reset_get_by_index_nodev - gpio_request_by_name_nodev So, update the same naming convention PHY framework. This doesn't change the existing functionality. Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | | phy: Fix node description of phy_get_by_nodeJagan Teki2020-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | node is most of device related API's are termed as device node and without device related API's are termed as ofnode. generic_phy_get_by_node API is without device API, so fixed the node description as ofnode. Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | | spi: Zap lpc32xx_ssp driver-related codeJagan Teki2020-05-112-10/+0
| |/ |/| | | | | | | | | | | | | | | | | lpc32xx_ssp driver is deprecated, no active updates and no board user, hence dropped the same. Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Albert ARIBAUD <albert.aribaud@3adev.fr> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* | test: describe naming conventions for macro UNIT_TESTHeinrich Schuchardt2020-05-081-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | Strict naming conventions have to be followed for Python function generate_ut_subtest() to collect C unit tests to be executed via command 'ut'. Describe the requirements both on the C as well on the Python side. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | treewide: mem: Move mtest related defines to KconfigAshok Reddy Soma2020-05-08294-784/+1
| | | | | | | | | | | | | | | | | | | | | | Move below defines which are used by mtest utility to Kconfig. CONFIG_SYS_MEMTEST_START CONFIG_SYS_MEMTEST_END Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> [trini: Fix kmcoge5ne board, re-run migration as well] Signed-off-by: Tom Rini <trini@konsulko.com>
* | treewide: mem: Enable MEMTEST via defconfigMichal Simek2020-05-082-3/+0
| | | | | | | | | | | | | | There is no reason to enable MEMTEST from headers when was converted to Kconfig already. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | treewide: mem: Remove alternate memtest setup from Mox and x530Michal Simek2020-05-082-4/+0
| | | | | | | | | | | | | | | | The commit e89f8aae3d67 ("treewide: Migrate CONFIG_SYS_ALT_MEMTEST to Kconfig") setup correct dependency on MEMTEST that's why there is no reason to enable enable alternate memtest without mtest command. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | cmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH mappingMichal Simek2020-05-0829-32/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no real need to exactly define space for saving patterns for alternate memory test. It is much easier to allocate space on the stack and use it instead of trying to find out space where pattern should be saved. For example if you want to test the whole DDR memory you can't save patter to DDR and you need to find it out. On Xilinx devices DDR or OCM addresses were chosen but that means that OCM needs to be mapped and U-Boot has access permission there. It is easier to remove this limitation and simply save it on stack because it is very clear that memory test can't rewrite U-Boot and U-Boot has also full access to memory where runs from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* | configs: migrate CONFIG_SYS_MTDPARTS_RUNTIME to defconfigsPatrick Delaunay2020-05-082-7/+0
| | | | | | | | | | | | | | Move CONFIG_SYS_MTDPARTS_RUNTIME into Kconfig done by moveconfig.py. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* | configs: migrate CONFIG_SET_DFU_ALT_INFO to defconfigsPatrick Delaunay2020-05-083-4/+0
| | | | | | | | | | | | | | | | Move CONFIG_SET_DFU_ALT_INFO into Kconfig done by moveconfig.py. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* | phy: atheros: add device tree bindings and configMichael Walle2020-05-071-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for configuring the CLK_25M pin as well as the RGMII I/O voltage by the device tree. By default the AT803x PHYs outputs the 25MHz clock of the XTAL input. But this output can also be changed by software to other frequencies. This commit introduces a generic way to configure this output. Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V. An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V option needs an external supply voltage. This commit adds support to switch the internal LDO to 1.8V. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | menu: add support for client defined statusline functionThirupathaiah Annapureddy2020-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently displaying status line is done in a weak function menu_display_statusline(). bootmenu.c overrides the weak default function. It calls menu_default_choice() and interprets the data as struct bootmenu_entry. pxe boot also uses common menu code for pxe menus. If there is a system that enables both bootmenu and pxe, menu_display_statusline() defined in bootmenu.c will be called and it will interpret struct pxe_label as struct bootmenu_entry. This leads to data aborts and pxe menu corruptions. This patch adds support for client defined statusline function to resolve the above bug. Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
* | arm: vexpress64: Remove unneeded CONFIG_ checkAndre Przywara2020-05-071-6/+0
| | | | | | | | | | | | | | | | | | CONFIG_SEMIHOSTING is selected for the VFP target by the means of Kconfig already, there is no need to check this in the header file. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | arm: juno: enable USBAndre Przywara2020-05-071-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Juno board features a standard compliant EHCI/OHCI USB host controller pair, which we can just enable. The platform data is taken from the device tree. This allows to use USB mass storage (the only storage on a Juno r0) for loading. At least on my board USB seems a bit flaky, I need two "usb reset" sequences after the "usb start" to detect an USB hard drive. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | arm: juno: Fix UART clock rateAndre Przywara2020-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The UART base clock rate was typo-ed in the header file, probably because the reference (the Linux .dts) was also wrong[1]. Fix the number to make the baud rate more correct. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=39a1a8941b2 Reviewed-by: Simon Glass <sjg@chromium.org>
* | arm: juno: Fix Juno address variablesAndre Przywara2020-05-071-15/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The U-Boot documentation explains that variables ending with "_r" hold addresses in DRAM, while those without that ending point to flash/ROM. The default variables for the Juno board pointing to the kernel and DTB load addresses were not complying with this scheme: they lack the extension, but point to DRAM. This is particularly confusing since the Juno board features parallel NOR flash, so there *is* a memory mapped NOR address holding a DTB, for instance. Fix the variables to use the proper names, changing initrd_addr to ramdisk_addr_r on the way, which seems to be more prevelant and documented. On the way adjust the FDT load address to be situated *before* the kernel, since users happened to overwrite the DTB by the kernel clearing its .BSS section during initialisation. Also remove the fdt_high and initrd_high variables (which were set to -1), to allow U-Boot moving those images around. This should avoid many problems in the future, but breaks loading Linux kernels < v4.2, since they expect the DTB to be loaded in the same 512MB region as the kernel. If you need to load such an old kernel, please set fdt_high to either 0xffffffffffffffff or 0xa0000000 (if you load the kernel to the beginning of DRAM). That fixes loading debug kernels, which happened to overwrite the DTB on certain setups. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | include/eeprom.h: fix build errorsRasmus Villemoes2020-05-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CMD_EEPROM and ENV_IS_IN_EEPROM can be selected independently, and cmd/eeprom.o gets built in either case, so whether to declare the real prototypes needs to follow the same logic as whether cmd/eeprom.c is built. Otherwise a ENV_IS_IN_EEPROM=y, CMD_EEPROM=n build fails cmd/eeprom.c:73:1: error: expected identifier or ‘(’ before ‘{’ token { While at it, fix the dummy replacements (at least assuming they are meant to allow the code to compile) - they need to have the same type as the expression they replace, or one gets errors such as env/eeprom.c: In function ‘eeprom_bus_read’: env/eeprom.c:37:8: error: void value not ignored as it ought to be rcode = eeprom_read(dev_addr, offset, buffer, cnt); Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-usbTom Rini2020-05-055-6/+121
|\ \ | | | | | | | | | - MediaTek USB host support
| * | xhci: mediatek: Add support for MTK xHCI host controllerChunfeng Yun2020-05-021-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is used to support the on-chip xHCI controller on MediaTek SoCs, currently control/bulk/interrupt transfers are supported. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | usb: dwc3: use the phy bulk API to get physChunfeng Yun2020-05-021-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | Get a group of phys by the phy bulk API Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
| * | phy: Add API for a bulk of physChunfeng Yun2020-05-021-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a "bulk" API to the phy API in order to get/init/exit/power on/off a group of phys associated with a device. The bulk API will avoid adding a copy of the same code to manage a group of phys in drivers. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
| * | dm: core: Add function to get child count of ofnode or deviceChunfeng Yun2020-05-022-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add function used to get the child count of a ofnode or a device Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge tag 'efi-2020-07-rc2-2' of ↵Tom Rini2020-05-053-0/+132
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-07-rc2-2 This patch contains error corrections and code simplifications for the UEFI sub-system.
| * | | efi_loader: disk: add efi_disk_is_system_part()AKASHI Takahiro2020-05-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will check if a given handle to device is an EFI system partition. It will be utilised in implementing capsule-on-disk feature. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Add function description. Return bool. Reviewed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | lib/crypto, efi_loader: move some headers to include/cryptoAKASHI Takahiro2020-05-042-0/+130
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Pkcs7_parse.h and x509_parser.h are used in UEFI subsystem, in particular, secure boot. So move them to include/crypto to avoid relative paths. Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Don't include include x509_parser.h twice. Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xxTom Rini2020-05-0515-29/+137
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add DM model for P1010RDB - Add I2C DM Model support for P1010RDB, T1042RDB, T2080, T4240RDB, MPC8548CDS, T1024RDB, P4080, P3041DS, P2041RDB, P2020RDB, P1020RDB, P5040DS - Fix reference to READM.qe_firmware
| * | | doc: fix references to README.qe_firmwareHeinrich Schuchardt2020-05-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In two files README.qe_firmware is referenced which never made it into the U-Boot tree. The README is available in the Linux kernel tree. Update the references. Cc: Timur Tabi <timur@kernel.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | powerpc: P1010RDB: Disable legacy PCIe driver when DM_PCI is enabledHou Zhiqiang2020-05-041-16/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled for P1010RDB board. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: powerpc: T1040/T1042: add i2c DM supportBiwen Li2020-05-042-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports i2c DM for SoC T1040/T1042 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: powerpc: T2080/T2081: add i2c DM supportBiwen Li2020-05-042-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports i2c DM for SoC T2080/T2081 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: ppc: T4240: add i2c DM supportBiwen Li2020-05-042-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports i2c DM for SoC T4240 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: ppc: MPC8548CDS: add i2c DM supportBiwen Li2020-05-041-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports i2c DM for board MPC8548CDS Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: ppc: p1010: add i2c DM supportBiwen Li2020-05-041-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports i2c DM for SoC P1010 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: powerpc: T1023/T1024: add i2c DM supportBiwen Li2020-05-042-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports i2c DM for SoC T1023/T1024 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: powerpc: P2041RDB: add i2c DM supportBiwen Li2020-05-041-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports i2c DM for board P2041RDB Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: powerpc: P1020: add i2c DM supportBiwen Li2020-05-042-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports i2c DM for SoC P1020 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | dm: powerpc: P5040DS: add i2c DM supportBiwen Li2020-05-041-1/+7
| |/ / | | | | | | | | | | | | | | | | | | This supports i2c DM for board P5040DS Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | Merge tag 'u-boot-imx-20200502' of ↵Tom Rini2020-05-0412-55/+232
|\ \ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.07 ---------------- - imxrt: fix LCD clock, fix doc - new board: Coral Dev - imx8: enable Cache in SPL. SNVS, update SCFW API - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading - MX6ULL : is_imx6ull to include i.MX6ULZ - Net: add config to enable TXC delay Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
| * | arm: imx: Add support for Google's Coral Dev BoardAlifer Moraes2020-05-011-0/+216
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Google's Coral Dev Board based on i.MX8MQ. https://coral.ai/products/dev-board The Phanbell naming has been used here to match the naming convention used in Google's U-Boot source tree: https://coral.googlesource.com/uboot-imx/ Co-developed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com> Tested-by: Marco Franchi <marcofrk@gmail.com>
| * | dt-bindings: pinctrl: imxrt1020: remove useless commentGiulio Benetti2020-05-011-2/+0
| | | | | | | | | | | | | | | | | | | | | A comment note has been left after completing pinctrl listing, so let's remove it since it's useless. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
| * | treewide: Remove unused FSL QSPI config options for IMX platformsKuldeep Singh2020-05-017-52/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of these options are not used by the driver anymore and some of them are obsolete as the information is gathered from the dt. So, remove the unused config options now. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
| * | config: apalis-imx8: Enable FEC TXC delayPhilippe Schenker2020-05-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | define FEC_ENET_ENABLE_TXC_DELAY to enable the delay on TXC line on the MAC. This has to be done in order to meet RGMII specs. According to RGMII specs the clock should get delayed so the edges of the clock are preferrably in the middle of the edges of data-lines so they can be sampled properly. Our PHY expects the MAC to delay TXC line, as it is also written in the spec. This patch makes sure the TXC delay on the FEC is enabled Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | board: apalis_imx6: Add KSZ9131 phy skew settingsPhilippe Schenker2020-05-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds skew register settings for KSZ9131. It checks first which phy is on the board and then applies the correct skew settings. Skew settings calculation for the KSZ9131: The i.MX6 SoC has an output skew tolerance of -100ps to 900ps. All PCB traces where routed exactly the same length so we can calculate the skew settings without taking the length into consideration. The traces are all length matched. RXC skew (PHY to MAC): - We use the 2ns DLL controlled delay on the PHY - We do not use the skew registers This results in the following values: RXC PHY fixed Delay 2000ps PHY Added Delay 0ps T_setup_R min 2.00ns T_setup_R typ 2.00ns T_setup_R max 2.00ns T_hold_R min 1.60ns T_hold_R typ 2.00ns T_hold_R max 2.40ns That means we are well within RGMII specs. TXC skew (MAC to PHY): - We use the 2ns DLL controlled delay on the PHY - We then subtract ~0.6ns with TXD[0:3] and TXC clock pad skew register in a resulting ~1.4ns delay. This results in the following values under consideration of the tolerances: TXC min TXC typ TXC max MAC min -100ps -100ps -100ps MAC max 900ps 900ps 900ps PHY fixed Delay 2000ps 2000ps 2000ps PHY added Delay -340ps -600ps -859ps T_setup_T min 1.56ns 1.30ns 1.04ns T_setup_T typ 2.06ns 1.80ns 1.54ns T_setup_T max 2.56ns 2.30ns 2.04ns T_hold_T min 1.04ns 1.30ns 1.56ns T_hold_T typ 1.94ns 2.20ns 2.46ns T_hold_T max 2.84ns 3.10ns 3.36ns This shows that T_hold_T min and T_setup_T min times are out of spec for RGMII timing. However the KSZ9131 has a minimal value for this time of 0.8ns which is met under all circumstances. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
| * | net: phy: micrel: Add basic support for KSZ9131Philippe Schenker2020-05-011-0/+2
| | | | | | | | | | | | | | | | | | This adds basic support for the new Micrel KSZ9131 phy. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
| * | net: phy: micrel: Use defines for PHY_IDs and MASKPhilippe Schenker2020-05-011-0/+5
| | | | | | | | | | | | Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
generated by cgit (git 2.34.1) at 2026-04-23 02:48:06 +0000