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* dm: core: Move dev_get_addr() etc. into a separate fileSimon Glass2017-06-013-92/+111
| | | | | | | | Move this group of address-related functions into a new file. These use the flat device tree. Future work will provide new versions of these which can support the live tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2017-05-3113-0/+263
|\ | | | | | | | | Please pull another update for Broadcom MIPS. This contains new SoC's, new boards and new drivers and some bugfixes.
| * mips: bmips: extend baud rates supportÁlvaro Fernández Rojas2017-05-311-0/+4
| | | | | | | | | | | | Now that the uart driver has been fixed we support more baud rates. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * MIPS: add BMIPS Sagem F@ST1704 boardÁlvaro Fernández Rojas2017-05-311-0/+15
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add support for Broadcom MIPS BCM6338 SoC familyÁlvaro Fernández Rojas2017-05-313-0/+71
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add BMIPS Netgear CG3100D boardÁlvaro Fernández Rojas2017-05-311-0/+15
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add support for Broadcom MIPS BCM3380 SoC familyÁlvaro Fernández Rojas2017-05-313-0/+64
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add BMIPS Comtrend CT-5361 boardÁlvaro Fernández Rojas2017-05-311-0/+20
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * MIPS: add support for Broadcom MIPS BCM6348 SoC familyÁlvaro Fernández Rojas2017-05-313-0/+74
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2017-05-311-1/+47
|\ \ | | | | | | | | | Mostly including the Armada 37xx pinctrl / gpio driver.
| * | arm: mvebu: clearfog: generic distro bootcmdPatrick Wildt2017-05-311-1/+47
| |/ | | | | | | | | | | | | | | | | | | Switch Clearfog to the generic distro defaults. This has been taken from a Debian mailing list thread: https://lists.debian.org/debian-boot/2016/10/msg00026.html Signed-off-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Stefan Roese <sr@denx.de>
* / Kconfig: Finish migration of hashing commandsDaniel Thompson2017-05-3122-35/+0
|/ | | | | | | | | | | | Currently these (board agnostic) commands cannot be selected using menuconfig and friends. Fix this the obvious way. As part of this, don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v' and "we have a hashing command" as this makes the Kconfig logic odd. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> [trini: Re-apply, add imply for a few cases, run moveconfig.py, also migrate CRC32_VERIFY] Signed-off-by: Tom Rini <trini@konsulko.com>
* power: pmic: tps65218: Fix tps65218_voltage_update functionKeerthy2017-05-291-0/+2
| | | | | | | | | | | | | | Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask. Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf Signed-off-by: Keerthy <j-keerthy@ti.com> Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC") Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: Change 'part_config' to be a u8 not char.Tom Rini2017-05-291-1/+1
| | | | | | | | | | In some places we check if part_config is set to MMCPART_NOAVAILABLE (0xff). With part_config being a char this is always false. We should be using a u8 to store this value instead, after a quick consultation with the Linux Kernel. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-05-2612-86/+176
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| * armv8: LS2080A: Adjust memory map for secure boot headers for NOR-bootUdit Agarwal2017-05-232-10/+10
| | | | | | | | | | | | | | | | | | This patch adjusts memory map for secure boot headers on LS2080AQDS and LS2080ARDB platforms. Secure boot headers are placed on NOR flash at offset 0x00600000. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-bootSantan Kumar2017-05-233-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046AAlison Wang2017-05-233-12/+12
| | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043AAlison Wang2017-05-233-15/+15
| | | | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN firmware load address, QE firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls1021a: Adjust memory mapping for Flash/SD card on LS1021AQDS/TWRAlison Wang2017-05-232-10/+10
| | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial Flash, QE firmware load address and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: Add LS2081ARDB board supportPriyanka Jain2017-05-231-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: Add QSPI-boot supportPriyanka Jain2017-05-233-10/+56
| | | | | | | | | | | | | | | | | | | | QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043ardb: Make NET independent of FManYork Sun2017-05-231-5/+8
| | | | | | | | | | | | | | | | This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
| * armv8: ls1046ardb: Make NET independent of FManYork Sun2017-05-231-6/+9
| | | | | | | | | | | | | | | | This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
| * armv8: ls1012a: fix the size of flash for multiple boardsSuresh Gupta2017-05-231-1/+1
| | | | | | | | | | | | | | LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash of 64MB size. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
| * armv8: layperscape: remove CONFIG_SPI_FLASH_BAR from some platformsSuresh Gupta2017-05-233-3/+0
| | | | | | | | | | | | | | | | ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does not support Bank Address Register commands. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046a: enable PCI command toolHou Zhiqiang2017-05-231-0/+10
| | | | | | | | | | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-262-10/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
| * | nds32: eth: Support ftmac100 DM.rick2017-05-232-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: rick <rick@andestech.com>
* | | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2017-05-232-12/+67
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| * | ARM: rmobile: salvator-x: Enable SCIF2 clockMarek Vasut2017-05-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are two UARTs on the board, so enable the clock for the second one as well. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add USB supportMarek Vasut2017-05-221-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the EHCI USB. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add DVFS and PMIC supportMarek Vasut2017-05-221-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for rebooting the board using the ROHM BD9571MWV I2C PMIC, but keep the CPU reboot option as a fallback. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add RAVB ethernet supportMarek Vasut2017-05-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the AVB ethernet on the Salvator-X board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add SD supportMarek Vasut2017-05-221-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the SD card slots on the Salvator-X board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Adjust UART clockMarek Vasut2017-05-221-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 . Use the internal clock and ignore the early version of the chip. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Set default device treeMarek Vasut2017-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Set default device tree file in the salvator-x_defconfig and use it in the environment. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Move OF_LIBFDT and CMD_FDT to board configMarek Vasut2017-05-221-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Move these two Kconfig symbols to the salvator-x_defconfig. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Add R8A7796 supportMarek Vasut2017-05-221-5/+26
| | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig entry for the R8A7796 RCar M3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Update link address to match latest BL2Marek Vasut2017-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Update the CONFIG_SYS_TEXT_BASE to match BL2 Rev.1.0.9 and newer, which loads the U-Boot to 0x50000000 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | Merge git://git.denx.de/u-boot-sunxiTom Rini2017-05-221-4/+13
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't get Kconfig errors on platforms without SPL, ie sandbox (without SPL). Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | sunxi: Store the device tree name in the SPL headerSiarhei Siamashka2017-05-171-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the mksunxiboot tool to optionally add the default device tree name string to the SPL header. This information can be used by the firmware upgrade tools to protect users from harming themselves by trying to upgrade to an incompatible bootloader. The primary use case here is a non-removable bootable media (such as NAND, eMMC or SPI flash), which already may have a properly working, but a little bit outdated bootloader installed. For example, the user may download or build a new U-Boot image for "Cubieboard", and then attemept to install it on a "Cubieboard2" hardware by mistake as a replacement for the already existing bootloader. If this happens, the flash programming tool can identify this problem and warn the user. The size of the SPL header is also increased from 64 bytes to 96 bytes to provide enough space for the device tree name string. [Andre: split patch to remove OF_LIST hash feature] Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * | | sunxi: enable automatic FIT build for 64-bit SoCsAndre Przywara2017-05-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner SoCs with 64-bit cores use an ARM Trusted Firmware binary, which needs to be loaded alongside U-Boot proper. Set the respective Kconfig options to let them select this feature and also automatically build the FIT image. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [Rename Kconfig path to arch/arm/mach-sunxi/Kconfig] Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | | sunxi: A64: move SPL stack to end of SRAM A2Andre Przywara2017-05-171-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPL stack is usually located at the end of SRAM A1, where it grows towards the end of the SPL. For the really big AArch64 binaries the stack overwrites code pretty soon, so move the SPL stack to the end of SRAM A2, which is unused at this time. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-222-8/+285
|\ \ \ \
| * | | | nds32: Support AE3XX platform.rick2017-05-222-7/+280
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech AE3xx platform: serial, timer device tree flow. Signed-off-by: rick <rick@andestech.com>
| * | | | nds32: Support AG101P serial DM.rick2017-05-221-2/+6
| | |/ / | |/| | | | | | | | | | | | | | | | | | Support AG101P serial device tree flow. Signed-off-by: rick <rick@andestech.com>
* | | | ColdFire: Remove rogue 'CONFIG_SYS_NO_FLASH' embedded within another CONFIG_ ↵Lothar Waßmann2017-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | name The original commit for the MCF54418TWR ColdFire development board support defined a 'CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN' which obviously has a rogue 'CONFIG_SYS_NO_FLASH' embedded in the intended 'CONFIG_SYS_FAULT_ECHO_LINK_DOWN' define. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
* | | | Convert CONFIG_CMD_LZMADEC to KconfigSimon Glass2017-05-221-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_CMD_LZMADEC Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | Convert CONFIG_LZMA to KconfigSimon Glass2017-05-2211-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_LZMA Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2026-01-09 16:04:36 +0000