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* mips: bmips: add NeufBox 4 (Sercomm) boardÁlvaro Fernández Rojas2017-05-101-0/+20
| | | | | | | This serves as an example for bcm6358-leds. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add BMIPS Comtrend VR-3032u boardÁlvaro Fernández Rojas2017-05-101-0/+17
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add support for Broadcom MIPS BCM63268 SoC familyÁlvaro Fernández Rojas2017-05-101-0/+25
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add BMIPS Comtrend AR-5387un boardÁlvaro Fernández Rojas2017-05-101-0/+17
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add support for Broadcom MIPS BCM6328 SoC familyÁlvaro Fernández Rojas2017-05-101-0/+25
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add BMIPS Huawei HG556a boardÁlvaro Fernández Rojas2017-05-101-0/+20
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add support for Broadcom MIPS BCM6358 SoC familyÁlvaro Fernández Rojas2017-05-101-0/+30
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: add initial infrastructure for Broadcom MIPS SoCsÁlvaro Fernández Rojas2017-05-101-0/+23
| | | | | | | | | | | | CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-dmTom Rini2017-05-099-161/+243
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| * drivers: phy: add generic PHY frameworkJean-Jacques Hiblot2017-05-092-0/+225
| | | | | | | | | | | | | | | | | | | | | | The PHY framework provides a set of APIs to control a PHY. This API is derived from the linux version of the generic PHY framework. Currently the API supports init(), deinit(), power_on, power_off() and reset(). The framework provides a way to get a reference to a phy from the device-tree. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * configs: at91sam9263ek: Update for DT and DM supportWenyou Yang2017-05-091-24/+2
| | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * configs: at91sam9rlek: Update for DT and DM supportWenyou Yang2017-05-091-22/+2
| | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * configs: at91sam9260ek/9g20ek: Update for DT and DMWenyou Yang2017-05-091-28/+3
| | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * configs: at91sam9m10g45ek: Update to support DM/DTWenyou Yang2017-05-091-29/+2
| | | | | | | | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * configs: at91sam9n12ek: Update for DT and DM supportWenyou Yang2017-05-091-19/+2
| | | | | | | | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * configs: at91sam9x5ek: Update to support DM/DTWenyou Yang2017-05-091-24/+3
| | | | | | | | | | | | | | | | | | | | | | | | Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * configs: sama5d2_xplained: update for SPLWenyou Yang2017-05-091-4/+4
| | | | | | | | | | | | | | | | Enable config options to support the SPL, increase the malloc memory size for the SPL and board_init_f stage and increase the memory space for the SPL binary. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * configs: sama5d2_xplained: enable CONFIG_DM_ETHWenyou Yang2017-05-091-11/+0
| | | | | | | | | | | | | | | | | | Enable CONFIG_DM_ETH to make MACB to support driver model. Because the USB Ether doesn't support driver model so far, remove this feature. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
* | ARM: mvebu: switch db-88f6820-amc to DM for i2cChris Packham2017-05-091-7/+0
| | | | | | | | | | | | | | | | | | Move existing configuration from header file to defconfig or dts as appropriate. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
* | phy: marvell: cp110: add 5G XFI modeIgal Liberman2017-05-091-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the option to configure a comphy to 5G XFI mode. In order to configure the comphy to 5G XFI, update the comphy node in the device-tree: phy2 { phy-type = <PHY_TYPE_SFI>; phy-speed = <PHY_SPEED_5_15625G>; }; Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* | phy: marvell: add IGNORE COMPHY typeStefan Roese2017-05-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This type tells u-boot to preserve the COMPHY settings as is it is usefull in situations where the COMPHY was initialized by earlier firmware. Note that IGNORE is different from UNCONNECTED since setting UNCONNECTED type will disconnect the COMPHY in the COMPHY MUX which is a desired behaviour Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | phy: marvell: cp110: update utmi phy connection typeStefan Roese2017-05-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | UTMI_PHY_TO_USB_HOST was used in USB3 UTMI dts node only, but there will be USB2 UTMI dts node for some SoCs that have got USB2 controller, so rename TO_USB_HOST to TO_USB3_HOST to distinguish TO_USB2_HOST in later on patches. Signed-off-by: zachary <zhangzg@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | phy: marvell: Replace PHY_TYPE_KR with PHY_TYPE_SFIStefan Roese2017-05-091-1/+1
| | | | | | | | | | | | | | | | Use correct naming as done in the latest Marvell U-Boot version as well. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | arm64: mvebu: a8k: Add NAND configuration parametersKonstantin Porotchkin2017-05-091-0/+11
|/ | | | | | | | | | | Add NAND configuration parameters to A8K shared config file. Add defconfig for db-88f7040 board with boot from NAND setup. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2017-05-081-1/+8
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| * sunxi: video: Add A64/H3/H5 HDMI driverJernej Skrabec2017-04-281-0/+5
| | | | | | | | | | | | | | | | | | This commit adds support for HDMI output. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: i2c: Add support for DM I2CJernej Skrabec2017-04-281-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | ARM: keystone2: Add support for getting external clock dynamicallyLokesh Vutla2017-05-081-1/+1
| | | | | | | | | | | | | | | | | | | | One some keystone2 platforms like K2G ICE, there is an option to switch between 24MHz or 25MHz as sysclk. But the existing driver assumes it is always 24MHz. Add support for getting all reference clocks dynamically by reading boot pins. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | aspeed: Add support for Clocks needed by MACsmaxims@google.com2017-05-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for clocks needed by MACs to ast2500 clock driver. The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and PCLK_MAC2 for MAC1 and MAC2 respectively. The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed SDK. It is not entirely clear from the datasheet how this clock is used by MACs, so not clear if the rate would ever need to be different. So, for now, hardcoding it is probably safer. The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through hardware strapping. So, the network driver would only need to enable these clocks, no need to configure the rate. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | aspeed: Device Tree configuration for Reset Drivermaxims@google.com2017-05-081-0/+45
| | | | | | | | | | | | | | | | Add Reset Driver configuration to ast2500 SoC Device Tree and bindings for various reset signals Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: Simple Watchdog uclassmaxims@google.com2017-05-082-0/+108
| | | | | | | | | | | | | | | | | | | | This is a simple uclass for Watchdog Timers. It has four operations: start, restart, reset, stop. Drivers must implement start, restart and stop operations, while implementing reset is optional: It's default implementation expires watchdog timer in one clock tick. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | igep003x: Add netboot supportPau Pajuelo2017-05-081-1/+12
| | | | | | | | | | | | | | | | netboot allows to boot an external image using TFTP and NFS protocols Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
* | igep003x: Add support for IGEP SMARC AM335xPau Pajuelo2017-05-081-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IGEP SMARC AM335x is an industrial processor module with following highlights: o AM3352 TI processor (Up to AM3359) o Cortex-A8 ARM CPU o SMARC form factor module o Up to 512 MB DDR3 SDRAM / 512 MB FLASH o WiFi a/b/g/n and Bluetooth v4.0 on-board o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board o JTAG debug connector available o Designed for industrial range purposes Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
* | igep003x: UBIizeLadislav Michl2017-05-081-18/+27
| | | | | | | | | | | | | | | | | | | | Convert IGEP board to use UBI volumes for U-Boot, its environment and kernel. With exception of first four sectors read by SoC BootROM whole NAND is UBI managed. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Heiko Schocher<hs@denx.de> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
* | igep0033: Rename to igep003xLadislav Michl2017-05-081-6/+3
| | | | | | | | | | | | | | | | Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034) can use the same source files. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
* | stm32f7: remove not needed configuration from board configVikas Manocha2017-05-081-3/+0
| | | | | | | | | | | | | | | | | | This patch removes: - CONFIG_CMD_MEM: enabled by default - CONFIG_DESIGNWARE_ETH : not being used anywhere. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f7: sdram: correct sdram configuration as per micron sdramVikas Manocha2017-05-082-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | Actually the sdram memory on stm32f746 discovery board is micron part MT48LC_4M32_B2B5_6A. This patch does the modification required in the device tree node & driver for the same. Also we are passing here all the timing parameters in terms of clock cycles, so no need to convert time(ns or ms) to cycles. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f7: enable board info read from device treeVikas Manocha2017-05-081-0/+1
| | | | | | | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f7: stm32f746-disco: read memory info from device treeVikas Manocha2017-05-081-5/+1
| | | | | | | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f746: to switch on user LED1 & read user buttonVikas Manocha2017-05-081-0/+1
| | | | | | | | | | | | | | | | All discovery boards have one user button & one user LED. Here we are just reading the button status & switching ON the user LED. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | stm32f7: use stm32f7 gpio driver supporting driver modelVikas Manocha2017-05-081-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | stm32f7: sdram: use sdram device tree node to configure sdram controllerVikas Manocha2017-05-081-0/+34
| | | | | | | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* | spl: make image arg or fdt blob address reconfigurableVikas Manocha2017-05-081-3/+2
| | | | | | | | | | | | | | | | | | | | | | At present fdt blob or argument address being passed to kernel is fixed at compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from different media like nand, nor flash are copied to the address pointed by the macro. The problem is, it makes args/fdt blob compulsory to copy which is not required in cases like for NOR Flash. This patch removes this limitation. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* | arm: am57xx: cl-som-am57x: fix USB scanUri Mashiach2017-05-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB bus scan attempt: ----------------------------------cut---------------------------------- => usb start starting USB... USB0: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.00 scanning bus 0 for devices... data abort pc : [<fff6240e>] lr : [<fff623b3>] reloc pc : [<8081b40e>] lr : [<8081b3b3>] sp : fdf42930 ip : fdf42960 fp : 00000000 r10: 00000001 r9 : fdf42ef0 r8 : 48890020 r7 : 00000002 r6 : fffa5840 r5 : fff8b140 r4 : fdf429c0 r3 : 00000000 r2 : 00000004 r1 : 00000000 r0 : 00000000 Flags: nZcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... ----------------------------------cut---------------------------------- Fix by enabling USB configuration in the SPL. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Igor Grinberg <grinberg@compulab.co.il>
* | arm: usb: dra7xx: xHCI registers based on USB port indexUri Mashiach2017-05-081-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the determination of the base address of xHCI registers of DRA7XX targets. Before the commit: by the target. After the commit: by the USB port index. Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* | arm: dra7xx: move CONFIG_DRA7XX to KconfigUri Mashiach2017-05-083-6/+0
| | | | | | | | | | | | | | | | The symbol CONFIG_DRA7XX is needed for Kconfig conditions. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com>
* | meson: gxbb: increase CONFIG_SYS_BOOTM_LENxypron.glpk@gmx.de2017-05-051-0/+2
| | | | | | | | | | | | | | | | | | A feature rich Linux kernel needs more than 8 MiB. Hence enlarge CONFIG_SYS_BOOTM_LEN to 64 MiB for the GXBB systems. As all known GXBB systems have at least 512 MiB of RAM this poses no problem. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | meson: gxbb: change ramdisk_addr_rxypron.glpk@gmx.de2017-05-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0x10000000 is the start of a 2 MiB area used by the ARM Trusted Firmware (BL31). See https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/tree/arch/arm64/boot/dts/amlogic/meson-gx.dtsi?id=refs/tags/v4.10.10 So we should not load the ramdisk here. The legacy Ubuntu image for the Odroid C2 comes with the following line in boot.ini: setenv initrd_loadaddr "0x13000000" See http://odroid.in/ubuntu_16.04lts/ubuntu64-16.04-minimal-odroid-c2-20160815.img.xz http://deb.odroid.in/c2/pool/main/u/u-boot/u-boot_20170226-752a100-8_arm64.deb So let's use the same address. With the patch booting Linux with booti succeeds on an Odroid C2, without the patch Linux hangs. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Vagrant Cascadian <vagrant@debian.org>
* | meson: gxbb: enable MMC as boot targetxypron.glpk@gmx.de2017-05-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable automatic booting from SD card or eMMC the MMC devices 0, 1, and 2 are added to the BOOT_TARGET_DEVICES. Booting from SD card, eMMC, and DHCP are tried in sequence. A missing or failing device is gracefully handled. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Tested-by: Andreas Färber <afaerber@suse.de>
* | cmd: add Kconfig option for 'date' commandChris Packham2017-05-01110-129/+0
| | | | | | | | | | | | Signed-off-by: Chris Packham <judge.packham@gmail.com> [trini: default y if DM_RTC, re-sync] Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit (git 2.34.1) at 2024-10-01 19:17:32 +0000