summaryrefslogtreecommitdiffstats
path: root/include
Commit message (Collapse)AuthorAgeFilesLines
...
* | | | phy: marvell: add RX training commandIgal Liberman2021-04-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for running RX training using new command called "rx_training" Usage: rx_training - rx_training <cp id> <comphy id> RX training allows to improve link quality (for SFI mode) by running training sequence between us and the link partner, this allows to reach better link quality then using static configuration. Change-Id: I818fe67ccaf19a87af50d4c34a9db7d6802049a5 Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
* | | | phy: marvell: rename comphy related definitions to COMPHY_XXIgal Liberman2021-04-291-45/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX. Those definition might be confused with MDIO PHY definitions. This patch does the following changes: - PHY_TYPE_XX --> COMPHY_TYPE_XX - PHY_SPEED_XX --> COMPHY_SPEED_XX This improves readability, no functional change. Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* | | | phy: marvell: add comphy type PHY_TYPE_USB3jinghua2021-04-291-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - For some Marvell SoCs, like armada-3700, there are both USB host and device controller, but on PHY level the configuration is the same. - The new type supports both USB device and USB host - This patch is cherry-picked from u-boot-2015 as-is. Change-Id: I01262027edd8ec23391cff6fb409b3009aedfbb9 Signed-off-by: jinghua <jinghua@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
* | | | power: regulator: Add support for regulator-force-boot-offKonstantin Porotchkin2021-04-291-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for regulator-force-boot-off DT property. This property can be used by the board/device drivers for turning off regulators on early init stages as pre-requisite for the other components initialization. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* | | | ARM: rmobile: Enable CONFIG_SYS_FLASH_PROTECTIONMarek Vasut2021-04-283-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_FLASH_PROTECTION on Salvator-X(S), ULCB, Ebisu, which means the Spansion HF PPB protection bits can be operated using the 'protect' U-Boot command. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | sunxi: DT: R40: Update device tree files from Linux 5.12Ivan Uvarov2021-04-283-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update R40 .dts{,i} and dt-binding headers to current version from kernel. Files taken from Linux 5.12-rc1 release (commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8) Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | | | mips: octeon: Add Octeon III NIC23 board supportStefan Roese2021-04-281-0/+21
| |/ / |/| | | | | | | | | | | | | | | | | This patch adds the basic support for the PCIe target board equipped with the Octeon III CN2350 SoC. Signed-off-by: Stefan Roese <sr@denx.de>
* | | lmb: Add 2 config to define the max number of regionsPatrick Delaunay2021-04-221-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 2 configs CONFIG_LMB_MEMORY_REGIONS and CONFIG_LMB_RESERVED_REGIONS to change independently the max number of the regions in lmb library. When CONFIG_LMB_USE_MAX_REGIONS=y, move the lmb property arrays to struct lmb and manage the array size with the element 'max' of struct lmb_region; their are still allocated in stack. When CONFIG_LMB_USE_MAX_REGIONS=n, keep the current location in struct lmb_region to allow compiler optimization. Increase CONFIG_LMB_RESERVED_REGIONS is useful to avoid lmb errors in bootm when the number of reserved regions (not adjacent) is reached: + 1 region for relocated U-Boot + 1 region for initrd + 1 region for relocated linux device tree + reserved memory regions present in Linux device tree. The current limit of 8 regions is reached with only 5 reserved regions in DT. see Linux kernel commit bf23c51f1f49 ("memblock: Move memblock arrays to static storage in memblock.c and make their size a variable") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | lmb: correct size of the regions arrayPatrick Delaunay2021-04-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As in lmb_region, cnt < max and in the lmb library use region[i] only with i in 0...cnt, this region array size can be reduced by 1 element without overflow. This patch allows to reduce the struct lmb size. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | lmb: move MAX_LMB_REGIONS value in KconfigPatrick Delaunay2021-04-221-3/+1
| | | | | | | | | | | | | | | | | | | | | Move MAX_LMB_REGIONS value in Kconfig, the max number of the regions in lmb library. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | lmb: add a max parameter in the struct lmb_regionPatrick Delaunay2021-04-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a max parameter in lmb_region struct to handle test in lmb_add_region without using the MAX_LMB_REGIONS define. This patch allows to modify these size independently for memory of reserved regions in the next patches. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | lmb: remove lmb_region.sizePatrick Delaunay2021-04-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the unused field size of struct lmb_region as it is initialized to 0 and never used after in lmb library. See Linux kernel commit 4734b594c6ca ("memblock: Remove memblock_type.size and add memblock.memory_size instead") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | lmb: move CONFIG_LMB in KconfigPatrick Delaunay2021-04-225-15/+1
| | | | | | | | | | | | | | | | | | Migrate CONFIG_LMB in Kconfig. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | cmd: fs: Use part_get_info_by_dev_and_name_or_num to parse partitionsSean Anderson2021-04-221-1/+11
|/ / | | | | | | | | | | This allows using dev#partlabel syntax. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
* / ARM: imx: udoo_neo: Convert to ethernet DMPeter Robinson2021-04-201-10/+0
|/ | | | | | | | | | Convert the UDOO Neo to ethernet DM support. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org> Cc: Breno Lima <breno.lima@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* psci: add features/reset2 supportIgor Opaniuk2021-04-201-0/+3
| | | | | | | | | | | | | | | | | | | | Adds support for: * PSCI_FEATURES, which was introduced in PSCI 1.0. This provides API that allows discovering whether a specific PSCI function is implemented and its features. * SYSTEM_RESET2, which was introduced in PSCI 1.1, which extends existing SYSTEM_RESET. It provides support for vendor-specific resets, providing reset_type as an additional param. For additional details visit [1]. Implementations of some functions were borrowed from Linux PSCI driver code [2]. [1] https://developer.arm.com/documentation/den0022/latest/ [2] drivers/firmware/psci/psci.c Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
* psci: add v1.0/v1.1 definitions from LinuxIgor Opaniuk2021-04-201-0/+28
| | | | | | Sync and add PSCI API versions 1.0/1.1 definitions from Linux. Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
* sysinfo.h: Add re-inclusion guardTom Rini2021-04-201-0/+4
| | | | | | | Add #ifndef __SYSINFO_H__ ... #endif to prevent re-inclusion of this file. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: highbank: Remove artificial SDRAM sizeAndre Przywara2021-04-201-6/+0
| | | | | | | | | | | | So far we were defining a somewhat confusing PHYS_SDRAM_1_SIZE variable, which originally was only used for setting the memtest boundaries. This definition in highbank.h has been removed about a year ago (moved to Kconfig), so we also don't need the hard-coded size definition any longer. Get rid of the misleading memory size definition, which was actually wrong anyway (it's 4088 MB for those machines with just 4GB of DRAM). Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* net: calxedagmac: Convert to DM_ETHAndre Przywara2021-04-202-3/+0
| | | | | | | | | | | | | | | | | | To squash that nasty warning message and make better use of the newly gained OF_CONTROL feature, let's convert the calxedagmac driver to the "new" driver model. The conversion is pretty straight forward, mostly just adjusting the use of the involved data structures. The only actual change is the required split of the receive routine into a receive and free_pkt part. Also this allows us to get rid of the hardcoded platform information and explicit init calls. This also uses the opportunity to wrap the code decoding the MMIO register base address, to make it safe for using PHYS_64BIT later. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* arm: highbank: Enable OF_CONTROLAndre Przywara2021-04-201-1/+0
| | | | | | | | | | | | | | | | | All Calxeda machines are actually a poster book example of device tree usage: the DT is loaded from flash by the management processor into DRAM, the memory node is populated with the detected DRAM size and this DT is then handed over to the kernel. So it's a shame that U-Boot didn't participate in this chain, but fortunately this is easy to fix: Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial function to tell U-Boot about the (fixed) location of the DTB in DRAM. Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform data from the DT. Also define AHCI, to bring this driver into the driver model world as well. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* arm: highbank: Limit FDT and initrd load addressesAndre Przywara2021-04-201-0/+4
| | | | | | | | | | | | | | | | | | So far on Highbank/Midway machines U-Boot only ever uses 512MB of DRAM, even though the machines have typically 4GB and 8GB, respectively. That means that so far we didn't need an extra limit for placing the DTB and initrd, as the 512MB are lower than the kernel's limit ("lowmem", typically 768MB). With U-Boot now needing to learn about the actual memory size (to correctly populate the EFI memory map), it might relocate fdt and initrd to the end of DRAM, which is out of reach of the kernel. So add limiting values to the fdt_high and initrd_high environment variables, to prevent U-Boot from using too high addresses. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: octeontx: support generic distro configTim Harvey2021-04-201-5/+26
| | | | | | | Support Generic Distro Default config Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: octeontx: move CONFIG_SUPPORT_RAW_INITRD to configsTim Harvey2021-04-201-2/+0
| | | | | | | | Move CONFIG_SUPPORT_RAW_INITRD out of the octeontx_common header and into the defconfig files. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefan Roese <sr@denx.de>
* Fix IDE commands issued, fix endian issues, fix non MMIOReinoud Zandijk2021-04-201-1/+1
| | | | | | | | | | | | | | | | | | | | Fixes IDE issues found on the Malta board under Qemu: 1) DMA implied commands were sent to the controller in stead of the PIO variants. The rest of the code is DMA free and written for PIO operation. 2) direct pointer access was used to read and write the registers instead of the inb/inw/outb/outw functions/macros. Registers don't have to be memory mapped and ATA_CURR_BASE() does not have to return an offset from address zero. 3) Endian isues in ide_ident() and reading/writing data in general. Names were corrupted and sizes misreported. Tested malta_defconfig and maltael_defconfig to work again in Qemu. Signed-off-by: Reinoud Zandijk <reinoud@NetBSD.org> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* configs: meson64: add NVME boot targetNeil Armstrong2021-04-201-0/+7
| | | | | | Let's add a boot target for NVMe so we can do a full boot over NVMe. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* Revert "spl: Drop bd_info in the data section"Alexandru Gagniuc2021-04-191-9/+1
| | | | | | | | | | | | | | | | | | | | | This reverts commit 38d6b7ebdaee3e0e8426ef1b9df88bdce8ae2e75. struct global_data contains a pointer to the bd_info structure. This pointer was populated spl_set_bd() to a pre-allocated bd_info in the ".data" section. The referenced commit replaced this mechanism to one that uses malloc(). That new mechanism is only used if SPL_ALLOC_BD=y. which very few boards do. The result is that (struct global_data)->bd is NULL in SPL on most platforms. This breaks falcon mode, since arch_fixup_fdt() tries to access (struct global_data)->bd and set the "/memory" node in the devicetree. The result is that the "/memory" node contains garbage values, causing linux to panic() as it sets up the page table. Instead of trying to fix the mess, potentially causing other issues, revert to the code that worked, while this change is reworked. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
* Merge https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini2021-04-183-0/+42
|\ | | | | | | | | | | | | | | This is a patchset which makes away with the .bind() controller indexing workaround which was broken since before v2021.04, and then adds PHY support and MX8M support on top of that. Better add it into the release early to get as much testing as possible done, because this really does a lot of changes to the ehci-mx6 driver.
| * ARM: imx8m: verdin-imx8mm: Enable USB Host supportMarek Vasut2021-04-181-0/+5
| | | | | | | | | | | | | | | | | | Enable USB host support on MX8MM Verdin. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * ARM: dts: imx8mn: Add power domain nodesMarek Vasut2021-04-181-0/+15
| | | | | | | | | | | | | | | | | | | | | | Add power domain nodes to DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
| * ARM: dts: imx8mm: Add power domain nodesMarek Vasut2021-04-181-0/+22
| | | | | | | | | | | | | | | | | | | | | | Add power domain nodes to DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
* | env: add ENV_ERASE_PTR macroPatrick Delaunay2021-04-161-0/+1
| | | | | | | | | | | | | | | | | | | | Add ENV_ERASE_PTR macro to handle erase opts and remove the associated ifdef. This patch is a extension of previous commit 82b2f4135719 ("env_internal.h: add alternative ENV_SAVE_PTR macro"). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | env: increment redund flag on read failBrandon Maier2021-04-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If one of the reads fails when importing redundant environments (a single read failure), the env_flags wouldn't get initialized in env_import_redund(). If a user then calls saveenv, the new environment will have the wrong flags value. So on the next load the new environment will be ignored. While debugging this, I also noticed that env/sf.c was not correctly handling a single read failure, as it would not check the crc before assigning it to gd->env_addr. Having a special error path for when there is a single read failure seems unnecessary and may lead to future bugs. Instead collapse the 'single read failure' error to be the same as a 'single crc failure'. That way env_check_redund() either passes or fails, and if it passes we are guaranteed to have checked the CRC. Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Wolfgang Denk <wd@denx.de> CC: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2021-04-161-23/+41
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | This adds support for devices with R40 dual rank DRAM, and asymmetric A64 DRAM devices like the Pinephone/3GB. Also we enable automatic gzipped kernel support, and allow scripted DT overlay support. The rest of the patches are cleanups, but also some sunxi-specific preparatory patches for USB3.0 and improved HDMI support. The bulk of those changes will go through other trees, though. Build-tested for all 156 sunxi boards, and boot tested on a A64, A20, R40, H5, H6 and H616 board. USB, SD card, eMMC, HDMI and Ethernet all work there (where applicable), with the exception of Ethernet on the H5. Since this is already broken in v2021.04, I will send a separate fix.
| * sunxi: arm64: Add addresses for compressed kernel loadArnaud Ferraris2021-04-161-0/+15
| | | | | | | | | | | | | | | | | | | | | | The "booti" command to load arm64 Linux kernels supports automatic decompression of zipped kernel images, but relies on some environment variables to point to usable buffer RAM. Add those variables and let them point to some default values, that should cover most use-cases. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * sunxi: add fdtoverlay_addr_r environment variableJernej Skrabec2021-04-161-23/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 69076dff2284 ("cmd: pxe: add support for FDT overlays") added support for loading DT overlay files to PXE boot. However, it needs additional environment variable which points to memory location which can be used to temporary store overlay data. Add it and in the process unify alignment using spaces and fix comment. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | Merge branch '2021-04-14-assorted-vboot-improvements'Tom Rini2021-04-154-5/+137
|\ \ | |/ |/| | | | | | | - Add ECDSA support to FIT images - Improve FIT image loadables (incl fpga) support - Further FIT improvements with SPL
| * mkimage: Add a 'keyfile' argument for image signingAlexandru Gagniuc2021-04-141-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | It's not always desirable to use 'keydir' and some ad-hoc heuristics to get the filename of the signing key. More often, just passing the filename is the simpler, easier, and logical thing to do. Since mkimage doesn't use long options, we're slowly running out of letters. I've chosen '-G' because it was available. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * lib: Add support for ECDSA image signingAlexandru Gagniuc2021-04-142-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | mkimage supports rsa2048, and rsa4096 signatures. With newer silicon now supporting hardware-accelerated ECDSA, it makes sense to expand signing support to elliptic curves. Implement host-side ECDSA signing and verification with libcrypto. Device-side implementation of signature verification is beyond the scope of this patch. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * lib/rsa: Make fdt_add_bignum() available outside of RSA codeAlexandru Gagniuc2021-04-141-0/+27
| | | | | | | | | | | | | | | | | | | | | | fdt_add_bignum() is useful for algorithms other than just RSA. To allow its use for ECDSA, move it to a common file under lib/. The new file is suffixed with '-libcrypto' because it has a direct dependency on openssl. This is due to the use of the "BIGNUM *" type. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * lib: Rename rsa-checksum.c to hash-checksum.cAlexandru Gagniuc2021-04-142-1/+1
| | | | | | | | | | | | | | | | | | | | | | rsa-checksum.c sontains the hash_calculate() implementations. Despite the "rsa-" file prefix, this function is useful for other algorithms. To prevent confusion, move this file to lib/, and rename it to hash-checksum.c, to give it a more "generic" feel. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | ls1012a: use default scan_dev_for_bootMian Yousaf Kaukab2021-04-155-35/+0
| | | | | | | | | | | | | | | | | | | | scan_dev_for_efi is supposed to be called from scan_dev_for_boot. However, this call is missing for ls1012a boards. As a result EFI boot doesn’t work. Fix this issue by removing custom definition of scan_dev_for_boot and use the default definition instead. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | board: sl28: enable DM_SERIALMichael Walle2021-04-151-2/+0
| | | | | | | | | | | | | | With all preparations in place, switch over to DM_SERIAL. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | dm: core: Correctly read <ranges> of simple-busBin Meng2021-04-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we decode simple bus <ranges> using the following assumption: - parent #address-cells 1 - child #address-cells 1 - child #size-cells 1 However this might not always be the case. Update to use fdt_addr_t and fdt_size_t in 'struct simple_bus_plat', and use fdt_read_ranges() to correctly decode it according to the actual parent and child #address-cells / #size-cells under a Kconfig option CONFIG_SIMPLE_BUS_CORRECT_RANGE which can be turned on for any board that needs it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | sandbox: Add a DSA sandbox driver and unit testClaudiu Manoil2021-04-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DSA sandbox driver is used for unit testing the DSA class code. It implements a simple 2 port switch plus 1 CPU port, and uses a very simple tag to identify the ports. The DSA sandbox device is connected via CPU port to a regular Ethernet sandbox device, called 'dsa-test-eth, managed by the existing eth sandbox driver. The 'dsa-test-eth' is not intended for testing the eth class code however, but it is used to emulate traffic through the 'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa sandbox driver registers a tx handler for the 'dsa-test-eth' device. The switch ports, labeled as 'lan0' and 'lan1', are also registered as eth devices by the dsa class code this time. So pinging through these switch ports is as easy as: => setenv ethact lan0 => ping 1.2.3.5 Unit tests for the dsa class code were also added. The 'dsa_probe' test exercises most API functions from dsa.h. The 'dsa' unit test simply exercises ARP/ICMP traffic through the two switch ports, including tag injection and extraction, with the help of the dsa sandbox driver. I took care to minimize the impact on the existing eth unit tests, though some adjustments needed to be made with the addition of extra eth interfaces used by the dsa unit tests. The additional eth interfaces also require MAC addresses, these have been added to the sandbox default environment. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Message-Id: <20210216224804.3355044-5-olteanv@gmail.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | of: extra: Introduce ofnode_phy_is_fixed_link() APIBin Meng2021-04-151-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a helper API ofnode_phy_is_fixed_link() to detect whether the ethernet controller connects to a fixed-link pseudo-PHY device. Note there are two ways to describe a fixed PHY attached to an Ethernet device: - the new DT binding, where 'fixed-link' is a sub-node of the Ethernet device - the old DT binding, where 'fixed-link' is a property with 5 cells encoding various information about the fixed PHY Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | board/km: add support for seli8 design based on nxp ls102xAleksandar Gerasimovski2021-04-152-0/+337
|/ | | | | | | | | | | | | | | | | | | | | | The SELI8 design is a new tdm service unit card for Hitachi-Powergrids XMC and FOX product lines. It is based on NXP LS1021 SoC and it provides following interfaces: - IFC interface for NOR, NAND and external FPGA's - 1 x RGMII ETH for debug purposes - 2 x SGMII ETH for management communication via back-plane - 1 x uQE HDLC for management communication via back-plane - 1 x I2C for peripheral devices - 1 x SPI for peripheral devices - 1 x UART for debug logging It is foreseen that the design will be later re-used for another XMC and FOX service cards with similar SoC requirements. Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com> Signed-off-by: Matteo Ghidoni <matteo.ghidoni@hitachi-powergrids.com> Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* gpio: Drop dm_gpio_set_dir()Simon Glass2021-04-121-11/+0
| | | | | | | This function is not used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* x86: qemu: move QFW to its own uclassAsherah Connor2021-04-122-32/+169
| | | | | | | | | | | | | We move qfw into its own uclass and split the PIO functions into a specific driver for that uclass. The PIO driver is selected in the qemu-x86 board config (this covers x86 and x86_64). include/qfw.h is cleaned up and documentation added. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* lib: string: Implement strlcatSean Anderson2021-04-121-0/+3
| | | | | | | | | | | | | This introduces strlcat, which provides a safer interface than strncat. It never copies more than its size bytes, including the terminating nul. In addition, it never reads past dest[size - 1], even if dest is not nul-terminated. This also removes the stub for dwc3 now that we have a proper implementation. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2024-06-28 11:43:27 +0000