| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Move these details from main (which doesn't care which parser is used) to
cli.c where they belong.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
This code seems unnecessarily complex. We really just need to check the
global_data. Now that is it all in one place, and not arch-specific, this
is pretty easy.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Add a bootretry_ prefix to these two functions, and remove the need for
the #ifdef around everything (it moves to the Makefile).
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
This code is only used by one board, so it seems a shame to clutter up
the readline code with it. Move it into its own file.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
The autoboot code is complex and long. It deserves its own file with
a simple interface from main.c.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
This makes it clear where the code resides.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
It doesn't make sense to have the simple parser and the readline code
all in main. Split them out into separate files.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Hush is a command-line interpreter, so rename it to make that clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| |\ \ \ \ \ \ |
|
| | | |/ / / /
| | |/| | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Development board for headless gateway platform from Abilis Systems.
Initial commit with working UART and DW GMAC.
For now with generic Ethernet PHY due to problems in Realtek PHY driver.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Christian Ruppert <christian.ruppert@abilis.com>
Cc: Pierrick Hascoet <pierrick.hascoet@abilis.com>
|
| |/ / / / /
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
using UBI and DM together leads in compiler error, as
both define a "struct device", so rename "struct device"
in include/dm/device.h to "struct udevice", as we use
linux code (MTD/UBI/UBIFS some USB code,...) and cannot
change the linux "struct device"
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
|
|\ \ \ \ \ \ |
|
| | |_|_|_|/
| |/| | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Enable CONFIG_SYS_GENERIC_BOARD for the Ethernut 5 board.
Signed-off-by: Tim Schendekehl <tim.schendekehl@egnite.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
|
|/ / / / /
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
convert to generic board
Signed-off-by: Steve Rae <srae@broadcom.com>
|
| |_|/ /
|/| | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add QSPI support for VF610TWR, such as clock and iomux.
Signed-off-by: Alison Wang <Huan.Wang@freescale.com>
Signed-off-by: Chao Fu <b44548@freescale.com>
|
|\ \ \ \ |
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
This family is supported by the TPS65218 PMIC. Implement a scale_vcores
to set the MPU and CORE voltage correctly to the max frequency that is
supported (and what we will be scaling them to in setup_dplls()).
Signed-off-by: Tom Rini <trini@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Add a driver for the TPS65218 PMIC which is used by TI AM43xx SoCs and
may be used by TI AM335x SoCs.
Signed-off-by: Tom Rini <trini@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
in almost all cases we need the i2c commands within the u-boot shell.
So we enable them within the common section.
Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
|
| | | | |
| | | | |
| | | | |
| | | | | |
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
loadbootenv expects devtype variable to be set. This is missing in
mmcboot command. With this the following error comes:
U-Boot# run mmcboot
mmc0 is current device
SD/MMC found on device 0
** Bad device usb 0 **
** Bad device usb 0 **
Fixing this by setting devtype as mmc.
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
commit a0a37183bd7 "ARM: omap: merge GPMC initialization code for
all platform" needs CONFIG_NOR, CONFIG_NAND or CONFIG_CMD_ONENAND
to be set to access flash. Add CONFIG_NAND for tam3517 derived
boards to prevent the following error: "nand: error: Unable to
find NAND settings in GPMC Configuration - quitting"
cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Enable support of nand ecclayout command.
Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Currently PWREMU_MGMT is not configured in the Linux generic UART
driver as this register seems to be specific TI UART IP. So this
needs to be enabled in u-boot to use UART1 from kernel space.
Acked-By: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
With the changes to the i2c framework (and adopting the omap24xx_i2c
driver to them) we can no longer call i2c functions prior to gd having
been set and cleared. When SPL booting, this is handled by setting gd
to point to SRAM in s_init. However in the cases where we are loaded
directly by ROM (memory mapped NOR or QSPI) we need to make use of the
normal hooks to slightly delay these calls.
Signed-off-by: Tom Rini <trini@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
The ePOS EVM and EVM SK have QSPI as an option to boot. Add a qspiboot
target that utilizes QSPI for env and so forth as an example of best
practices. As QSPI is booted from directly we need to chang
CONFIG_SYS_TEXT_BASE.
Note that on ePOS EVM the QSPI and NAND are mutually exclusive choices
we need to handle that elsewhere, once NAND support is also added.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
This patch add support for BCH16_ECC to omap_gpmc driver.
*need to BCH16 ECC scheme*
With newer SLC Flash technologies and MLC NAND, and large densities, pagesizes
Flash devices have become more suspectible to bit-flips. Thus stronger
ECC schemes are required for protecting the data.
But stronger ECC schemes have come with larger-sized ECC syndromes which require
more space in OOB/Spare. This puts constrains like;
(a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data.
(b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy following equation:
OOBsize per page >= 26 * (page-size / 512)
Signed-off-by: Pekon Gupta <pekon@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
GPMC can support simultaneous processing of 8 512Byte data chunks, in parallel
Signed-off-by: Pekon Gupta <pekon@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
GPMC_NAND_ECC_LP_x16_LAYOUT
OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros
to configure GPMC controller for x7 or x8 bit device connected to its interface.
Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above
macros can be completely removed.
Signed-off-by: Pekon Gupta <pekon@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
bus-width
GPMC controller needs to be configured based on bus-width of the NAND device
connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI
parameters is not possible in following situations:
SPL: SPL NAND drivers does not support ONFI parameter reading.
U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init()
which is called before probing for devices, hence any ONFI parameter
information is not available during GPMC initialization.
Thus, OMAP NAND driver expected board developers to explicitely write GPMC
configurations specific to NAND device attached on board in board files itself.
But this was troublesome for board manufacturers as they need to dive into
lengthy platform & SoC documents to find details of GPMC registers and
appropriate configurations to get NAND device working.
This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config
hich indicates that connected NAND device has x16 bus-width. And then based on
this config GPMC driver itself initializes itself based on NAND bus-width. This
keeps board developers free from knowing GPMC controller specific internals.
Signed-off-by: Pekon Gupta <pekon@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
As per following Sections in ONFI Spec, GET_FEATURES and SET_FEATURES also need
byte-addressing on 16-bit devices.
*Section: Target Initialization"
"The Read ID and Read Parameter Page commands only use the lower 8-bits of the
data bus. The host shall not issue commands that use a word data width on x16
devices until the host determines the device supports a 16-bit data bus width
in the parameter page."
*Section: Bus Width Requirements*
"When the host supports a 16-bit bus width, only data is transferred at the
16-bit width. All address and command line transfers shall use only the lower
8-bits of the data bus. During command transfers, the host may place any value
on the upper 8-bits of the data bus. During address transfers, the host shall
set the upper 8-bits of the data bus to 00h."
So porting following commit from linux kernel
commit e34fcb07a6d57411de6e15a47724fbe92c5caa42
Author: David Mosberger <davidm@egauge.net> (preserving authorship)
mtd: nand: fix GET/SET_FEATURES address on 16-bit devices
Signed-off-by: Pekon Gupta <pekon@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
As per following Sections in ONFI Spec, NAND_CMD_READID should use only
lower 8-bit for transfering command, address and data even on x16 NAND device.
*Section: Target Initialization"
"The Read ID and Read Parameter Page commands only use the lower 8-bits of the
data bus. The host shall not issue commands that use a word data width on x16
devices until the host determines the device supports a 16-bit data bus width
in the parameter page."
*Section: Bus Width Requirements*
"When the host supports a 16-bit bus width, only data is transferred at the
16-bit width. All address and command line transfers shall use only the lower
8-bits of the data bus. During command transfers, the host may place any value
on the upper 8-bits of the data bus. During address transfers, the host shall
set the upper 8-bits of the data bus to 00h."
Thus porting following commit from linux-kernel to ensure that column address
is not altered to align to x16 bus when issuing NAND_CMD_READID command.
commit 3dad2344e92c6e1aeae42df1c4824f307c51bcc7
mtd: nand: force NAND_CMD_READID onto 8-bit bus
Author: Brian Norris <computersforpeace@gmail.com> (preserving authorship)
The NAND command helpers tend to automatically shift the column address
for x16 bus devices, since most commands expect a word address, not a
byte address. The Read ID command, however, expects an 8-bit address
(i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or
0x20).
This fixes the column address for a few drivers which imitate the
nand_base defaults.
Signed-off-by: Pekon Gupta <pekon@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
This patch adds macros for following parameters of ELM Hardware engine
- ELM_MAX_CHANNELS: ELM can process 8 data streams simultaneously
- ELM_MAX_ERRORS: ELM can detect upto 16 ECC error when using BCH16 scheme
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
between BCH4/BCH8/BCH16
ELM hardware engine support ECC error detection for multiple ECC strengths like
+------+------------------------+
|Type | ECC syndrome length |
+------+------------------------+
|BCH4 | 6.5 bytes = 13 nibbles |
|BCH8 | 13 byte = 26 nibbles |
|BCH16 | 26 bytes = 52 nibbles |
+------+------------------------+
Current implementation of omap_elm driver uses ECC syndrom length (in 'nibbles')
to differentiate between BCH4/BCH8/BCH16. This patch replaces it with 'bch_type'
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|
|/ / / /
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
For each of Jetson TK1, Venice2, and Beaver:
- Enable the first USB controller in DT, and describe its configuration.
- Enable USB device/gadget support. This allows the user to type e.g.
"ums 0 mmc 0" at the command-line to cause U-Boot to act a USB device
implementing the USB Mass Storage protocol, and expose MMC device 0
that way.
This allows a host PC to mount the Tegra device's MMC, partition it, and
install a filesystem on it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
|\ \ \ \
| |_|/ /
|/| | | |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add CONFIG_SYS_GENERIC_BOARD for all Exynos4 boards.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add the ability to display the code offset of an initcall even after it
is relocated. This makes it much easier to relate initcalls back to the
U-Boot System.map file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
The backlight uses FETs on the TPS65090. Enable this so that the display
is visible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
The TPS65090 pmic chip can be on exynos5250 boards. Therefore,
select the appropriate config option for TPS65090 devices.
This commit should really use exynos5-dt.c, when it is available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This adds driver support for the TPS65090 PMU. Support includes
hooking into the pmic infrastructure so that the pmic commands
can be used on the console. The TPS65090 supports the following
functionality:
- fet enable/disable/querying
- getting and setting of charge state
Even though it is connected to the pmic infrastructure it does
not hook into the pmic charging charging infrastructure.
The device tree binding is from Linux, but only a small subset of
functionality is supported.
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org>
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This enum should be common across all PMICs rather than having it
independently defined with the same name in multiple places.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Commit be3b51aa did this mostly, but several have been added since. Do the
job again.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Support the DDR mode at dw-mmc controller
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Lukasz Majeski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Restore the platdata(property of dt) into host struct.
Then data's information is maintained and reused anywhere.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Exynos serise can be supported the dw-mmc controller.
So, it's good that used the general prefix as "_EXYNOS_DWMMC".
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|