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* dm: core: Adjust uclass setup with of-platdataSimon Glass2021-03-221-0/+3
| | | | | | | | | When OF_PLATDATA_INST is enabled we don't need to create the uclass list. Instead we just need to point to the existing list. Update the code accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Add macros to access the new linker listsSimon Glass2021-03-225-2/+179
| | | | | | | | | | | | Add macros which work with instantiated devices and uclasses, as created at build time by dtoc. Include variants that can be used in data structures. These are mostly used by dtoc but it is worth documenting them fully for the occasional case where they might come up in user code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* linker_lists: Allow use in data structuresSimon Glass2021-03-221-0/+12
| | | | | | | | | | | | | | | At present linker lists are designed for use in code. They make use of statements within expressions ({...}), for example. It is possible to generate a reference to a linker_list entry that can be used in data structures, where such features are not permitted. It requires that the reference first be declared as extern. In other words the existing macro needs to be split into two parts. Add new macros to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* dtoc: Generate uclass devicesSimon Glass2021-03-221-0/+5
| | | | | | | | | | Add support for generating a file containing uclass instances. This avoids the need to create these at run time. Update a test uclass to include a 'priv_auto' member, to increase test coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
* dtoc: Support headers needed for driversSimon Glass2021-03-221-0/+18
| | | | | | | | | | | | | | Typically dtoc can detect the header file needed for a driver by looking for the structs that it uses. For example, if a driver as a .priv_auto that uses 'struct serial_priv', then dtoc can search header files for the definition of that struct and use the file. In some cases, enums are used in drivers, typically with the .data field of struct udevice_id. Since dtoc does not support searching for these, add a way to tell dtoc which header to use. This works as a macro included in the driver definition. Signed-off-by: Simon Glass <sjg@chromium.org>
* dtoc: Support tracking the phase of U-BootSimon Glass2021-03-221-0/+16
| | | | | | | | | | | | | | | | | | | | U-Boot operates in several phases, typically TPL, SPL and U-Boot proper. The latter does not use dtoc. In some rare cases different drivers are used for two phases. For example, in TPL it may not be necessary to use the full PCI subsystem, so a simple driver can be used instead. This works in the build system simply by compiling in one driver or the other (e.g. PCI driver + uclass for SPL; simple_bus for TPL). But dtoc has no way of knowing which code is compiled in for which phase, since it does not inspect Makefiles or dependency graphs. So to make this work for dtoc, we need to be able to explicitly mark drivers with their phase. This is done by adding an empty macro to the driver. Add support for this in dtoc. Signed-off-by: Simon Glass <sjg@chromium.org>
* board: Add MT8183 pumpkin board supportFabien Parent2021-03-201-0/+41
| | | | | | Add the MT8183 pumpkin board support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
* configs: mt8516: use bootcmd from config_distro_bootcmd.hFabien Parent2021-03-201-16/+4
| | | | | | | Instead of redefining our own way to boot, let's just use config_distro_bootcmd.h. Signed-off-by: Fabien Parent <fparent@baylibre.com>
* board: mediatek: rename pumpkin board into mt8516Fabien Parent2021-03-201-2/+2
| | | | | | | | | More than one pumpkin board has been made with different MediaTek SoCs. Rename the pumpkin board to follow the naming convention of all other MediaTek boards and also to not be confusing when other pumpkin boards will be added in follow-up commits. Signed-off-by: Fabien Parent <fparent@baylibre.com>
* arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar2021-03-162-0/+28
| | | | | | | | | | | | | | | The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* arm: rmobile: Add HopeRun HiHope RZ/G2M board supportBiju Das2021-03-161-0/+20
| | | | | | | | | | | | | The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2M board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* Merge tag 'v2021.04-rc4' into nextTom Rini2021-03-1527-103/+205
|\ | | | | | | Prepare v2021.04-rc4
| * Merge tag 'ti-v2021.04-rc4' of ↵Tom Rini2021-03-152-2/+6
| |\ | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-ti - Fix boot for da850-evm and omap3_logic - Optimize SPL size for am65x boards
| | * include: configs: am65x_evm: Optimize size of SPL BSSLokesh Vutla2021-03-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current BSS allocation of SPL is as below: $ size spl/u-boot-spl text data bss dec hex filename 132369 7852 1496 141717 22995 spl/u-boot-spl But 20KB is allocated currently for BSS. Reduce it to 3KB and save some space for stack. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| | * ARM: da850-evm: Fix boot issues from missing SPL_PAD_TOAdam Ford2021-03-151-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a previous attempt to unify config options and remove items from the whitelist file, SPL items were moved into a section enabled with CONFIG_SPL_BUILD. Unfortunately, SPL_PAD_TO is referenced at the head Makefile and uses this define to create padding of the output file. When it was moved to CONFIG_SPL_BUILD, it caused boot errors with devices that are not booting from NOR. Fix the boot issues by moving SPL_PAD_TO out so it's always. Fixes: 7bb33e4684aa ("ARM: da850-evm: Unify config options with Kconfig") Signed-off-by: Adam Ford <aford173@gmail.com>
| * | Merge tag 'u-boot-stm32-20210312' of ↵Tom Rini2021-03-151-1/+0
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver - stm32mp1_trusted_defconfig rely on SCMI support - Remove the nand MTD configuration for NOR boot in stm32mp1 board - STM32programmer update - Bsec: manage clock when present in device tree - stm32mp15: move bootdelay configuration in defconfig - Update for stm32 dsi and dw_mipi_dsi - STM32 MCU's cleanup - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags - Update stm32mp1 doc
| | * configs: stm32mp15: move bootdelay configuration in defconfigPatrick Delaunay2021-03-111-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32MP15 boards have no reason to configure bootdelay in stm32mp1.h as it is already done with CONFIG_BOOTDELAY (default = 2) and in include/env_default.h. This patch allows configuration for customers which reuse stm32mp1.h and reduce the size of the default environment. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * | Merge tag 'u-boot-amlogic-20210308' of ↵Tom Rini2021-03-081-0/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - button: adc: fix treshold typo - configs: meson64: add fdtoverlay_addr_r
| | * | configs: meson64: add fdtoverlay_addr_rNeil Armstrong2021-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support loading FTD Overlays when booting with the pxe command (or extlinux.conf), supported with [1], add the missing fdtoverlay_addr_r used to load the overlay before applying it to the FDT loaded at fdt_addr_r. [1] https://patchwork.ozlabs.org/project/uboot/patch/20210120085453.2783678-1-narmstrong@baylibre.com/ Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
| * | | Merge branch 'v2021.04-rc4' of https://github.com/lftan/u-bootTom Rini2021-03-081-8/+2
| |\ \ \ | | | | | | | | | | | | | | | - Add VAB support
| | * | | Makefile: socfpga: Add target to generate hex output for combined spl and dtbDalon Westergreen2021-03-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex" is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to generate the final configuration bitstream for Intel SOCFPGA SOC64 devices. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
| | * | | configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfigSiew Chin Lim2021-03-081-7/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to *_defconfig file for both Stratix 10 and Agilex. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
| * | | lib/charset: UTF-8 stream conversionHeinrich Schuchardt2021-03-071-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide functions to convert an UTF-8 stream to code page 437 or UTF-32. Add unit tests. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | efi_loader: carve out utf_to_cp()Heinrich Schuchardt2021-03-071-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Carve out a function to translate a Unicode code point to an 8bit codepage. Provide a unit test for the new function. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | efi_loader: move codepage 437 tableHeinrich Schuchardt2021-03-071-0/+5
| |/ / | | | | | | | | | | | | | | | Move the Unicode to codepage 437 table to charset.c Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | ppc: qemu: Drop a custom env variable 'fdt_addr_r'Bin Meng2021-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have switched to CONFIG_OF_CONTROL, and we can use the env variable 'fdtcontroladdr' directly instead of creating one that is duplicated. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Enable RTC support via I2CBin Meng2021-03-051-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The QEMU ppce500 target integrates a Freescale I2C controller and has a Pericom pt7c4338 RTC connected to it. Enable corresponding DM drivers so that 'date' command is actually useful. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Switch over to use DM ETH and PCIBin Meng2021-03-051-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the board supports non-DM version PCI and E1000 drivers. Switch over to use DM ETH and PCI by: - Rewrite the PCI address map functions using DM APIs - Enable CONFIG_MISC_INIT_R to do the PCI initialization and address map - Drop unnecessary ad-hoc config macros - Remove board_eth_init() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Switch over to use DM serialBin Meng2021-03-051-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch over to use the DM version of the driver by: - drop unnecessary ad-hoc config macros - add get_serial_clock() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | test: cmd: Add a basic test for 'addrmap' commandBin Meng2021-03-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a basic test for the newly introduced 'addrmap' command. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> [Rebase] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | lib: addr_map: Move address_map[] type to the header fileBin Meng2021-03-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present address_map[] is static and its type is unknown to external modules. In preparation to create a command to list its contents, this patch moves its type definition and declaration to the header file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | include: Remove extern from addr_map.hBin Meng2021-03-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Remove the extern of the header because they are useless. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | ppc: qemu: Fix CONFIG_SYS_PCI_MAP_ENDBin Meng2021-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_PCI_MAP_END currently points to 0xe8000000, which means the upper end of the virtual address mapped to PCI bus address ends at 0xe8000000. But this is wrong as the CCSBAR was already mapped at 0xe0000000 with a 1 MiB size. Fixes: fa08d3951777 ("PPC 85xx: Add qemu-ppce500 machine") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: fsl: move via specific defines to KconfigRajesh Bhagat2021-03-053-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moves below via specific defines to Kconfig: CONFIG_FSL_VIA Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm: fsl: common: Improve NXP VID driver PMBus supportStephen Carlson2021-03-052-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for more PMBus compatible devices to the NXP drivers for its QorIQ family devices. At runtime, the voltage regulator is queried over I2C, and the required voltage multiplier determined. This change supports the DIRECT and LINEAR PMBus voltage reporting modes. Previously, the driver only supported a few specific devices such as the IR36021 and LTC3882, so this change allows the QorIQ series to be used with a much larger variety of core voltage regulator devices. checkpatch warning "Use if (IS_DEFINED (...))" was ignored to maintain consistency with the existing code. Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com> Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Tested-by: Wasim Khan <wasim.khan@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | Merge tag 'u-boot-imx-20210303' of ↵Tom Rini2021-03-0312-30/+135
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2021.04 ---------------- - new boards: - i.MX8MN Beacon EmbeddedWorks (2GB) - Gateworks Venice imx8mm - convert to DM: - imx53-qsb, mx53loco, mx51evk, mx23-evk - Fixes : - Network : FEC ethernet quirks - DH dh-imx6 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
| | * | board: gateworks: imx8mm: Add Gateworks Venice board supportTim Harvey2021-03-031-0/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Gateworks Venice product family based on the i.MX 8M Mini SoC Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| | * | imx: Add 2GB lpddr support for i.MX8MN Beacon EmbeddedWorks devkit.Adam Ford2021-03-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a second lpddr configuration with 2GB of RAM, but this requires different RAM timings, so in addition to adding the timing file, a separate defconfig is necessary. Signed-off-by: Adam Ford <aford173@gmail.com>
| | * | mx51evk: Convert to driver modelFabio Estevam2021-03-011-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the conversion to driver model as it is mandatory. Tested booting the Linux kernel from the SD card. Signed-off-by: Fabio Estevam <festevam@gmail.com>
| | * | mx53loco: Convert to driver modelFabio Estevam2021-03-011-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the conversion to driver model as it is mandatory. Remove the SATA support for now as the i.MX53 support has not been added yet. Signed-off-by: Fabio Estevam <festevam@gmail.com>
| | * | board: toradex: move RGMII delays to PHY sideOleksandr Suvorov2021-03-012-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RGMII link delays can be set on either MAC or PHY side. Set the rgmii-id PHY mode for FEC and remove FEC_ENET_ENABLE_.XC_DELAY setting, so that these definitions aren't used anymore throughout the U-Boot. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
| | * | ARM: imx8: Add missing FEC ENET quirk for i.MX8/i.MX8XOleksandr Suvorov2021-03-017-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both NXP SoCs i.MX8 and i.MX8X have ENET gigabit MAC. Define FEC_QUIRK_ENET_MAC for the imx8 platform and remove this definition from configs of boards, based on MX8/MX8X. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
| | * | ARM: imx6: mx6sabre-common: Search for boot components in /boot tooMarek Vasut2021-03-011-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some root filesystem configurations do not have separate /boot partition, but rather place kernel, DT, scripts into /boot directory. Search the /boot directory for these boot components in case they are not found in /, which is the old behavior. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| | * | ARM: imx6: mx6sabre-common: Replace fatload with FS_GENERIC loadMarek Vasut2021-03-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace filesystem specific fatload command with a filesystem agnostic load command, so the board can boot from e.g. ext4 too. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| | * | ARM: imx6: dh-imx6: Drop the SF hunk in configMarek Vasut2021-02-271-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is now CONFIG_SPL_DM_SPI{,_FLASH}, however keeping CONFIG_DM_SPI{,_FLASH} enabled in SPL seems to grow the SPL by a couple of bytes: text data bss dec hex filename - 34069 1568 96 35733 8b95 spl/u-boot-spl + 34075 1568 96 35739 8b9b spl/u-boot-spl In either case, the binary is bootable, so remove the part in board config. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@konsulko.com>
| | * | ARM: imx: Revert "dh_imx6: Switch to full DM-aware"Marek Vasut2021-02-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 03a673cf49e ("dh_imx6: Switch to full DM-aware"). According to discussion [1], the patch is known to break the dh_imx6 board, however it made it upstream just before 2021.01-rc4, likely by mistake. Revert this patch to put the board back into working order. Also note that this board has no DM SPL support due to OCRAM size limitations, but that is fine, as SPL DM support is optional. [1] https://lists.denx.de/pipermail/u-boot/2020-June/417986.html Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@konsulko.com>
| * | | Nokia RX-51: Enable usbtty serial console by defaultPali Rohár2021-03-031-14/+7
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now when usbtty serial console is fixed in U-Boot enable CONFIG_USB_TTY for Nokia RX-51 board by default. Fix also USB product id as U-Boot ignores CONFIG_USBD_PRODUCTID macro and include U-Boot string into USB product name to indicate usage of U-Boot. CONFIG_CONSOLE_MUX is already used and U-Boot console is available for all in/out devices. Therefore there is no need to have separate commands 'run sercon', 'run usbcon' and 'run vgacon', so remove them. As space for U-Boot is limited to 256kB, enable CONFIG_OPTIMIZE_INLINING and disable some other unused options so CONFIG_USB_TTY can be enabled. Nokia RX-51 does not have easily accessible UART serial console so the only option for easy debugging is to use device's keyboard+screen or this usbtty serial console over USB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
* | | common: SCP03 control (enable and provision of keys)Jorge Ramirez-Ortiz2021-03-132-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This Trusted Application allows enabling SCP03 as well as provisioning the keys on TEE controlled secure element (ie, NXP SE050). All the information flowing on buses (ie I2C) between the processor and the secure element must be encrypted. Secure elements are pre-provisioned with a set of keys known to the user so that the secure channel protocol (encryption) can be enforced on the first boot. This situation is however unsafe since the keys are publically available. For example, in the case of the NXP SE050, these keys would be available in the OP-TEE source tree [2] and of course in the documentation corresponding to the part. To address that, users are required to rotate/provision those keys (ie, generate new keys and write them in the secure element's persistent memory). For information on SCP03, check the Global Platform HomePage and google for that term [1] [1] globalplatform.org [2] https://github.com/OP-TEE/optee_os/ check: core/drivers/crypto/se050/adaptors/utils/scp_config.c Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | log: Add return-checking macros for 0 being successSimon Glass2021-03-121-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | The existing log_ret() and log_msg_ret() macros consider an error to be less than zero. But some function may return a positive number to indicate a different kind of failure. Add macros to check for that also. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | log: Handle line continuationSimon Glass2021-03-122-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When multiple log() calls are used which don't end in newline, the log prefix is prepended multiple times in the same line. This makes the output look strange. Fix this by detecting when the previous log record did not end in newline. In that case, setting a flag. Drop the unused BUFFSIZE in the test while we are here. As an example implementation, update log_console to check the flag and produce the expected output. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2024-06-24 04:45:36 +0000