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* video: dw-mipi-dsi: permit configuring the escape clock rateNeil Armstrong2020-10-181-0/+1
| | | | | | | | | | | | The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency higher than 10MHz for the TX Escape Clock, thus make the target rate configurable. This is based on the Linux commit [1] and adapted to the U-Boot driver. [1] a328ca7e4af3 ("drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* video: dw-mipi-dsi: driver-specific configuration of phy timingsNeil Armstrong2020-10-181-0/+16
| | | | | | | | | | | | | | | | The timing values for dw-dsi are often dependent on the used display and according to Philippe Cornu will most likely also depend on the used phy technology in the soc-specific implementation. To solve this and allow specific implementations to define them as needed add a new get_timing callback to phy_ops and call this from the dphy_timing function to retrieve the necessary values for the specific mode. This is based on the Linux commit [1] and adapted to the U-Boot driver. [1] 25ed8aeb9c39 ("drm/bridge/synopsys: dsi: driver-specific configuration of phy timings") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* video: mipi update panel platform dataYannick Fertre2020-06-281-0/+6
| | | | | | | | Add new fields "lanes, format & mode_flags" to structure mipi_dsi_panel_plat. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: add support of MIPI DSI interfaceYannick Fertré2019-10-131-0/+466
Mipi_display.c contains a set of dsi helpers. This file is a copy of file drm_mipi_dsi.c (linux kernel). Signed-off-by: Yannick Fertré <yannick.fertre@st.com>