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* rockchip: add config decide whether to build common.chuang lin2015-12-011-0/+3
| | | | | | | | some rockchips soc will not use uclass in SPL stage, so define config to decide whether to build common.c Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: add timer driverhuang lin2015-12-011-1/+2
| | | | | | | | some rockchip soc will not include lib/timer.c in SPL stage, so implement timer driver for some soc can use us delay function in SPL. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: firefly: Save the environment on SD cardSjoerd Simons2015-12-013-1/+9
| | | | | | | | Save the environment on the SD card for Firefly in the empty space between the SPL and the u-boot image. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: Also load the initrd below 512MSjoerd Simons2015-12-011-0/+1
| | | | | | | | | Similar to load an fdt, when loading an initrd about the 512Mb mark things seem to break. For now force loading below 512Mb until the reason why this fails has been determined/solved. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* dm: pci: Avoid a driver model build error with CONFIG_CMD_PCI_ENUMSimon Glass2015-12-016-6/+0
| | | | | | | | | | | | | This is not supported with driver model, so print a message instead of generating a build error. Rescanning PCI is not yet implemented. This function will be implemented later once some additional PCI driver model improvements are merged. It was confirmed on the mailing list that no one on the tegra side will miss this feature, so it is disabled for tegra. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* dm: tegra: pci: Move CONFIG_PCI_TEGRA to KconfigSimon Glass2015-12-016-6/+0
| | | | | | | Move this option to Kconfig and fix up all users. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* x86: tsc: Move tsc_timer.c to drivers/timerBin Meng2015-12-011-2/+0
| | | | | | | | To group all dm timer drivers together, move tsc timer to drivers/timer directory. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-11-301-0/+122
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| * arm: atmel: Add SAMA5D2 Xplained boardWenyou Yang2015-11-301-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | The board supports following features: - Boot media support: SD card/e.MMC/SPI flash, - Support LCD display (optional, disabled by default), - Support ethernet, - Support USB mass storage. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> [fix checkpatch warnings] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-11-308-34/+454
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| * | armv8: ls2080a: Define CONFIG_ENV_OVERWRITE to overwrite serial and ethaddrAlison Wang2015-11-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | As the environment variables "serial#" and "ethaddr" need to be overwriten by the users, CONFIG_ENV_OVERWRITE is defined to disable the write protection. Anybody can change or delete these parameters. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | arm: ls102xa: Update fdt_high and initrd_high for LS1021AQDS boardAlison Wang2015-11-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel fails to access the device tree blob on boot. The reason is that u-boot relocates the device tree blob into high memory when booting the kernel and the kernel is unable to access the blob. To avoid this issue, fdt_high is set to the value of 0xffffffff. The device tree blob will not get relocated and is still in low memory to make it accessible to the kernel. For the same reason, initrd_high is set to the value of 0xffffffff too. This patch is to update fdt_high and initrd_high for LS1021AQDS board. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043ardb: add USB supportGong Qianyu2015-11-301-0/+13
| | | | | | | | | | | | | | | | | | | | | Add support for the third USB controller for LS1043A. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043ardb: add DSPI supportGong Qianyu2015-11-301-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Use the U-Boot Driver Model. Just enable Freescale DSPI driver and set DSPI related parameters in dts file. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043aqds: add LS1043AQDS board supportShaohui Xie2015-11-301-0/+387
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1043AQDS Specification: ------------------------- Memory subsystem: * 2GByte DDR4 DIMM * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two RGMII ports * XFI 10G port * SGMII * QSGMII with 4x 1G ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> [York Sun: Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-303-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-305-11/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
| * | driver: net: fsl-mc: Add DPAA2 commands to manage MCPrabhakar Kushwaha2015-11-302-24/+0
| |/ | | | | | | | | | | | | | | | | | | | | Management complex Firmware, DPL and DPC are depolyed during u-boot boot sequence. Add new DPAA2 commands to manage Management Complex (MC) i.e. start mc, aiop and apply DPL from u-boot command prompt. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-11-307-11/+100
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| * | arm: socfpga: Remove fsloadcmd from environmentChin Liang See2015-11-305-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove fsloadcmd / ext2load as we are using load command which use the corresponding latest file system command. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
| * | mmc: socfpga_dw_mmc: Move drvsel and smplsel to dtsChin Liang See2015-11-301-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | socfpga_dw_mmc driver will obtain the drvsel and smplsel value from device tree instead of definition in config header file. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Repair SoCrates boardMarek Vasut2015-11-301-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board was constantly parasiting on the CV SoCDK, so split it into it's own separate directory. Moreover, the board config was missing important bits, like simple-bus support in SPL, the DRAM configuration was incorrect and the DTS was also missing the pre reloc bits. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Jan Viktorin <viktorin@rehivetech.com>
| * | ARM: socfpga: rename the cyclone5 and arria5 base address fileDinh Nguyen2015-11-305-5/+5
| |/ | | | | | | | | | | | | | | | | When adding support for the Arria10 platform, we're going to name the file base_addr_a10.h, so to be systematic about it, rename the socfpga_base_addr.h to be base_addr_ac5.h for the Arria5 and Cyclone5 platform. Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* / arm: kirkwood: add ZyXEL NSA310S deviceGerald Kerma2015-11-291-0/+99
|/ | | | | | | | | | | | | | | | | | | | | | | This patch add ZyXEL NSA310S 1-Bay Media Server The ZyXEL NSA310S device is a Kirkwood based NAS: - SoC: Marvell 88F6702 1000Mhz - SDRAM memory: 256MB DDR2 400Mhz - Gigabit ethernet: PHY Marvell 88E1318 - Flash memory: 128MB - 1 Power button - 1 Power LED (blue) - 4 Status LED (green) - 1 Copy/Sync button - 1 Reset button - 1 SATA II port - 2 USB 2.0 ports (front and back) - Smart fan Signed-off-by: Gerald Kerma <dreagle@doukki.net> Signed-off-by: Tony Dinh <mibodhi@gmail.com> Signed-off-by: Luka Perkov <luka.perkov@sartura.hr>
* sf: Move SPI flash drivers to defconfigBin Meng2015-11-25124-179/+0
| | | | | | | | There are already Kconfig options for SPI flash drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* spi: Move SPI drivers to defconfigBin Meng2015-11-2543-46/+0
| | | | | | | | There are already Kconfig options for SPI drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-11-222-5/+27
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| * sunxi: Add basic H3 supportJens Kuske2015-11-221-0/+2
| | | | | | | | | | | | | | | | Add initial sun8i H3 support, only uart + mmc are supported for now. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Enable DFU for RAMSiarhei Siamashka2015-11-221-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DFU protocol implementation in U-Boot is much faster than the FEL protocol implementation in the boot ROM on Allwinner devices. Using DFU instead of FEL improves the USB transfer speed from 500-900 KB/s to 3.2-3.7 MB/s. This is particularly useful for reducing the time needed for booting systems with large initrd images. FEL is still useful for loading the U-Boot bootloader and a boot script, which may then activate DFU in the following way: setenv dfu_alt_info ${dfu_alt_info_ram} dfu 0 ram 0 bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r} The rest of the files can be transferred to the device using the "dfu-util" tool. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | vexpress64: store env in flashRyan Harkin2015-11-211-17/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for storing the environment in CFI NOR flash on Juno and FVP models. I also removed some config values that are not used by CFI flash parts. Juno has 1 flash part with 259 sectors. The first 255 sectors are 0x40000 (256kb) and are followed by 4 sectors of 0x10000 (64KB). FVP models simulate a 64MB NOR flash part at base address 0x0FFC0000. This part has 256 x 256kb sectors. We use the last sector to store the environment. To save the NOR flash to a file, the following parameters should be passed to the model: -C bp.flashloader1.fname=${FILENAME} -C bp.flashloader1.fnameWrite=${FILENAME} Foundation models don't simulate the NOR flash, but having NOR support in the u-boot binary does not harm: attempting to write to the NOR will fail gracefully. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | vexpress64: remove #errorRyan Harkin2015-11-211-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows vexpress64 targets to be compiled when CONFIG_SYS_FLASH_CFI is enabled. I considered using #warning instead of #error, but this just clutters up the build output and hides real warnings. Without this patch, you see errors during compilation like this: include/configs/vexpress_aemv8a.h:42:2: error: #error "Unknown board variant" #error "Unknown board variant" include/configs/vexpress_aemv8a.h:115:2: error: #error "Unknown board variant" #error "Unknown board variant" include/configs/vexpress_aemv8a.h:280:2: error: #error "Unknown board variant" #error "Unknown board variant" make[1]: *** [tools/envcrc.o] Error 1 make: *** [tools] Error 2 In file included from include/config.h:5:0, from tools/envcrc.c:19: Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | vexpress64: use 2nd DRAM bank only on junoRyan Harkin2015-11-211-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the 2nd DRAM bank available on Juno only and not on other vexpress64 targets, eg. the FVP models. The commit below added a 2nd bank of NOR flash for Juno, but also for all vexpress64 targets: commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059 Author: Liviu Dudau <Liviu.Dudau@foss.arm.com> Date: Mon Oct 19 11:08:31 2015 +0100 vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel. Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation model. Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot the kernel. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Acked-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | eeprom: Zap CONFIG_SYS_I2C_MULTI_EEPROMSMarek Vasut2015-11-2129-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This option only complicates the code unnecessarily, just use CONFIG_SYS_DEF_EEPROM_ADDR as the default address if there are only five arguments to eeprom {read/write} if this is defined. If CONFIG_SYS_DEF_EEPROM_ADDR is not defined, we mandate all six arguments. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* | ARM: keystone2: configs: Correct burn_uboot_sp erase sizeCooper Jr., Franklin2015-11-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The NOR flash on Keystone 2 evms has a u-boot-spl partition size of 0x80000. Currently burn_uboot_spi will erase 0x100000 from the spi NOR which will cause a partial erase of the misc partition. Fix this by correcting the erase size. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
* | nios2: 10m50: change to ns16550 uartThomas Chou2015-11-211-0/+1
| | | | | | | | | | | | | | | | | | Change to ns16550 uart for 10m50 devboard based on a new Altera release. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: move CONFIG_SYS_NS16550 to KconfigThomas Chou2015-11-21126-126/+0
| | | | | | | | | | | | Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | ns16550: zap CONFIG_NS16550_SERIALThomas Chou2015-11-2113-30/+2
| | | | | | | | | | | | | | | | | | Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers is completed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_omapThomas Chou2015-11-218-13/+14
| | | | | | | | | | | | | | | | Unify serial_omap, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_tegraThomas Chou2015-11-211-1/+2
| | | | | | | | | | | | | | | | Unify serial_tegra, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_dwThomas Chou2015-11-213-3/+3
| | | | | | | | | | | | | | | | Unify serial_dw, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_keystoneThomas Chou2015-11-211-1/+1
|/ | | | | | | | Unify serial_keystone, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* sandbox: Enable USB keyboardSimon Glass2015-11-191-1/+1
| | | | | | | Enable the USB keyboard on sandbox, now that we have a suitable emulation driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Enable console recording and silent consoleSimon Glass2015-11-191-0/+1
| | | | | | | Allow console recording so that tests can use it. Also allow the console output to be suppressed, to reduce test output 'noise'. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: qemu: Convert to use driver model keyboardBin Meng2015-11-191-1/+1
| | | | | | | Convert to use driver model keyboard on QEMU. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: crownbay: Convert to use driver model keyboardBin Meng2015-11-191-1/+1
| | | | | | | Convert to use driver model keyboard on Intel Crown Bay. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Drop CONFIG_ISA_KEYBOARDSimon Glass2015-11-192-10/+0
| | | | | | | This option is mentioned but does not do anything. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add an i8042 device for boards that have itSimon Glass2015-11-195-8/+2
| | | | | | | | | | | | Some boards have an i8042 device. Enable the driver for all x86 boards, and add a device tree node for those which may have this keyboard. Also adjust the configuration so that i8042 is always separate from the VGA, and rename the stdin driver accordingly. With this commit the keyboard will not work, but it is fixed in the next commit. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* sandbox: add a sandbox timer and basic testThomas Chou2015-11-191-0/+2
| | | | | | | | Add a sandbox timer which get time from host os and a basic test. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org>
* video: Drop unused console functionsSimon Glass2015-11-194-4/+0
| | | | | | | | | | | | | | | | | | CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and CONFIG_CONSOLE_TIME are not used by any board. The implementation is not great and stands in the way of a refactor of i8042. Drop these for now. They can be re-introduced quite easily later, perhaps with driver-model real-time-clock (RTC) support. When reintroducing, it might be useful to make a few changes: - Blink time would be more useful than blink count - The confusing #ifdefs should be avoided - The time functions should support driver model - It would be best keyed off console_tstc() or some similar idle loop rather than a particular input driver (i8042 in this case) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-11-191-0/+2
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