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* fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM MailboxChee Hong Ang2020-10-091-4/+5
| | | | | | | | | Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver because it is using generic SDM (Secure Device Manager) Mailbox interface shared by other platform (e.g. Agilex) as well. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
* arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device tableAng, Chee Hong2018-12-201-0/+4
| | | | | | | Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
* arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration DriverAng, Chee Hong2018-12-201-0/+4
| | | | | | Enable FPGA reconfiguration support for Stratix 10 SoC. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* fpga: altera: Add StratixV supportStefan Roese2016-03-241-0/+20
| | | | | | | | | | | | This patch adds support for programming of the StratixV FPGAs. Programming is done in this case (board theadorable) via SPI. The board may provide board specific code for bitstream programming. This StratixV support will be used by the theadorable board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: socfpga: fpga: Add SoCFPGA FPGA programming interfacePavel Machek2014-10-061-0/+6
| | | | | | | | | | | | | | | | | | | Add code necessary to program the FPGA part of SoCFPGA from U-Boot with an RBF blob. This patch also integrates the code into the FPGA driver framework in U-Boot so it can be used via the 'fpga' command. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> V2: Move the not-CPU specific stuff into drivers/fpga/ and base this on the cleaned up altera FPGA support.
* fpga: altera: Clean up enums in altera.hMarek Vasut2014-10-061-27/+49
| | | | | | | | | | | | | | Get rid of the line-over-80 problems and zap the typedef that went alongside those enums. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
* whitespace cleanupsPavel Machek2014-07-221-1/+1
| | | | | | Whitespace cleanups. Signed-off-by: Pavel Machek <pavel@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-18/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* fpga: Remove all CONFIG_SYS_* fpga related optionsMichal Simek2013-05-061-17/+0
| | | | | | | | All these macros are completely unused by any code. CONFIG_FPGA is not a bitfield anymore. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* fpga: constify to fix build warningWolfgang Denk2011-08-011-4/+4
| | | | | | | | | | | | | | | Fix compiler warning: cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data' from incompatible pointer type Adding the needed 'const' here entails a whole bunch of additonal changes all over the FPGA code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
* cosmetic: spell fixes etc.Michael Jones2011-07-281-5/+5
| | | | | Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Detlev Zundel <dzu@denx.de>
* fpga: Remove relocation fixupsPeter Tyser2009-10-031-1/+0
| | | | | | | | PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-8/+8
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Altera Stratix II supporteran liberty2008-04-131-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds Support for Altera's Stratix II. Within your board specific init file you will have to call 1. fpga_init (/* relocated code offset. usually => */ gd->reloc_off); 2. fpga_add (fpga_altera, (Altera_desc*)&altera_desc); Altera_desc* contines (for example): { Altera_StratixII, /* part type */ passive_serial, /* interface type */ 1, /* bytes of data part can accept */ (void *)(&funcs), /* interface function table */ 0L, /* base interface address */ 0 /* implementation specific cookie */ } funcs is the interface. It is of type altera_board_specific_func. It looks like this: altera_board_specific_func func = { pre_fn, config_fn, status_fn, done_fn, clk_fn, data_fn, abort_fn, post_fn, }; you will have to implement these functions, which is usually bit banging some gpio. Signed-off-by: Eran Liberty <liberty@extricom.com>
* Add FPGA Altera Cyclone 2 supportStefan Roese2006-08-151-0/+4
| | | | Patch by Heiko Schocher, 15 Aug 2006
* * Patch by Steven Scholz, 10 Oct 2003LABEL_2003_10_09_2320wdenk2003-10-091-28/+45
| | | | | | | | | | - Add support for Altera FPGA ACEX1K * Patches by Thomas Lange, 09 Oct 2003: - Endian swap ATA identity for all big endian CPUs, not just PPC - MIPS only: New option CONFIG_MEMSIZE_IN_BYTES for passing memsize args to linux - add support for dbau1x00 board (MIPS32)
* Initial revisionwdenk2002-11-031-0/+73
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